| commit | ec34d52e2adb48d961dc51037886f2373a3407d2 | [log] [tgz] |
|---|---|---|
| author | Dongjin Kim <tobetter@gmail.com> | Mon Feb 04 21:30:15 2013 -0800 |
| committer | Kukjin Kim <kgene.kim@samsung.com> | Thu Mar 07 19:39:50 2013 +0900 |
| tree | 37c184e397ecb92dce69429182e44fe627cb3a5e | |
| parent | e88d5ae61a00b602cdd6a6c07f9fe6fbcaad06d7 [diff] |
ARM: dts: Fix the timing property of MSHC controller for exynos4412-odroidx This fixes the property of dw-mshc-sdr-timing and dw-mshc-ddr-timing as per its current binding, it only has two cells. Signed-off-by: Dongjin Kim <tobetter@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>