commit ef1e8d03b13126261c6e7dcf058fb5d80d34b33c
author Aristeu Rozanski <arozansk@redhat.com> Wed Oct 30 13:26:56 2013 -0300
committer Mauro Carvalho Chehab <m.chehab@samsung.com> Thu Nov 14 16:20:37 2013 -0200
tree f8f6c67c6e28adc0336c395bcc2ce468d015ef2b
parent 5e01dc7b26d9f24f39abace5da98ccbd6a5ceb52

sb_edac: make RANK_CFG_A value part of sbridge_info

This is in preparation of Ivy Bridge support.

Signed-off-by: Aristeu Rozanski <arozansk@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>

drivers/edac/sb_edac.c

diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index e04462b..3f8c890 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -262,7 +262,7 @@
 
 /* Device 17, function 0 */
 
-#define RANK_CFG_A		0x0328
+#define SB_RANK_CFG_A		0x0328
 
 #define IS_RDIMM_ENABLED(reg)		GET_BITFIELD(reg, 11, 11)
 
@@ -275,6 +275,7 @@
 
 struct sbridge_info {
 	u32	mcmtr;
+	u32	rankcfgr;
 };
 
 struct sbridge_channel {
@@ -520,6 +521,8 @@
 	enum edac_type mode;
 	enum mem_type mtype;
 
+	pvt->info.rankcfgr = SB_RANK_CFG_A;
+
 	pci_read_config_dword(pvt->pci_br, SAD_TARGET, &reg);
 	pvt->sbridge_dev->source_id = SOURCE_ID(reg);
 
@@ -558,7 +561,8 @@
 	}
 
 	if (pvt->pci_ddrio) {
-		pci_read_config_dword(pvt->pci_ddrio, RANK_CFG_A, &reg);
+		pci_read_config_dword(pvt->pci_ddrio, pvt->info.rankcfgr,
+				      &reg);
 		if (IS_RDIMM_ENABLED(reg)) {
 			/* FIXME: Can also be LRDIMM */
 			edac_dbg(0, "Memory is registered\n");