tree 201608d0ba6b8b705ea20f9c64fc02364b402cdf
parent 4975b86add254e1c706c82cded06ca2911f90ae3
author Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> 1393940083 +0000
committer Ralf Baechle <ralf@linux-mips.org> 1395871762 +0100

MIPS: Add support for the M5150 processor

The M5150 core is a 32-bit MIPS RISC which implements the
MIPS Architecture Release-5  in a 5-stage pipeline.
In addition, it includes the MIPS Architecture Virtualization Module
that enables virtualization of operating systems,
which provides a scalable, trusted, and secure execution environment.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>