tree 2e98c0b346690eeca0ea6cad6f8f21a9e16af476
parent 7e307c7ad5340b226966da6e564ec7f717da3adb
author Sathya Perla <sathyap@serverengines.com> 1277770277 +0000
committer David S. Miller <davem@davemloft.net> 1277929602 -0700

be2net: memory barrier fixes on IBM p7 platform

The ibm p7 architecure seems to reorder memory accesses more
aggressively than previous ppc64 architectures. This requires memory
barriers to ensure that rx/tx doorbells are pressed only after
memory to be DMAed is written.

Signed-off-by: Sathya Perla <sathyap@serverengines.com>
Signed-off-by: David S. Miller <davem@davemloft.net>