| commit | f430dea7c150dab2c103d28fa32efb59b5ae80b4 | [log] [tgz] |
|---|---|---|
| author | Sean Wang <sean.wang@mediatek.com> | Thu Sep 22 10:33:55 2016 +0800 |
| committer | David S. Miller <davem@davemloft.net> | Thu Sep 22 08:21:21 2016 -0400 |
| tree | 0c936f92d17ba70706a82cd18b0901e407a62486 | |
| parent | 572de608e36279f249c9a6350f142e69f23dacab [diff] |
net: ethernet: mediatek: add support for GMAC0 connecting with external PHY through TRGMII Changing dynamically source clock, TX/RX delay and interface mode used by TRGMII hardware module inside PHY capability polling routine for adapting to the various speed of RGMII used by external PHY for GMAC0. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>