| commit | f4cdb6a00c148e7724ada0998643b293a52b5f62 | [log] [tgz] |
|---|---|---|
| author | Ralf Baechle <ralf@linux-mips.org> | Tue Mar 12 16:06:07 2013 +0100 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Tue Mar 12 18:58:09 2013 +0100 |
| tree | 69d7d9ccfca7d8f9fee2effd69a0b2ae055b3b2f | |
| parent | 631b0af98c1efb160f02154743ae9f13fe03e347 [diff] |
MIPS: SEAD3: Enable LL/SC. All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are MIPS32 or MIPS64 CPUs that have ll/sc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>