tree 31f6f195e4caf59a33eb4859aa8b92d60321c672
parent 3dad5c5fa1d24c3bbb3e9e8ac0c52f35e045b807
author Mark Kuo <mkuo@nvidia.com> 1452799476 -0500
committer Thierry Reding <treding@nvidia.com> 1454424565 +0100

clk: tegra: Do not disable PLLE when under hardware control

Software should not disable PLLE if PLLE is already put under hardware
control.

Signed-off-by: Mark Kuo <mkuo@nvidia.com>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>