drm/msm/sde: reorganize top level interrupt handling code
Re-organize interrupt handling code to match device hierarchy
such that the top level handler maps to MDSS level, and core
level handler maps to MDP level. They are moved to separate
files corresponding to top and core respectively. This improves
maintainability of the interrupt handling abstraction.
Change-Id: Ib76cfa0f157722d9c1926bf21fc789c2be19b495
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index 353ee69..5c3dbd0 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -37,6 +37,7 @@
sde/sde_encoder_phys_vid.o \
sde/sde_encoder_phys_cmd.o \
sde/sde_irq.o \
+ sde/sde_core_irq.o \
sde/sde_rm.o \
sde/sde_kms_utils.o \
sde/sde_kms.o \