| commit | f629ba2c04c949aa62c85b48c0b73b915b98defc | [log] [tgz] |
|---|---|---|
| author | Addy Ke <addy.ke@rock-chips.com> | Thu Jul 31 14:01:38 2014 +0800 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Tue Sep 09 13:58:59 2014 +0200 |
| tree | a96d3041262eb032c00bb329cf55f78f864301cf | |
| parent | 8ca28610e5e37193cd61fefa4310941e28de10ca [diff] |
mmc: dw_mmc: add support for RK3288 This patch focuses on clock setting for RK3288 mmc controller. In RK3288 mmc controller, CLKDIV register can only be set 0 or 1, and if DDR 8bit mode, CLKDIV register must be set 1. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>