tree efec5eacc34a9e412a193a79d575cbf3b90acf23
parent efb9ca08b5a2374b29938cdcab417ce4feb14b54
author Ralf Baechle <ralf@linux-mips.org> 1194544949 +0000
committer Ralf Baechle <ralf@linux-mips.org> 1195168909 +0000

[MIPS] Fix shadow register support.

Shadow register support would not possibly have worked on multicore
systems.  The support code for it was also depending not on MIPS R2 but
VSMP or SMTC kernels even though it makes perfect sense with UP kernels.

SR sets are a scarce resource and the expected usage pattern is that
users actually hardcode the register set numbers in their code.  So fix
the allocator by ditching it.  Move the remaining CPU probe bits into
the generic CPU probe.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>