kbuild: make better section mismatch reports on i386, arm and mips
On i386, ARM and MIPS, warn_sec_mismatch() sometimes fails to show
usefull symbol name. This is because empty 'refsym' due to 0 r_addend
value. This patch is to adjust r_addend value, consulting with
apply_relocate() routine in kernel code.
Without this patch:
MODPOST vmlinux
WARNING: init/built-in.o - Section mismatch: reference to .init.text: from .text between 'rest_init' (at offset 0xf4) and 'try_name'
WARNING: mm/built-in.o - Section mismatch: reference to .init.text: from .text between 'kmem_cache_create' (at offset 0x18a39) and 'cache_reap'
WARNING: mm/built-in.o - Section mismatch: reference to .init.text: from .text between 'kmem_cache_create' (at offset 0x18a6b) and 'cache_reap'
With this patch:
MODPOST vmlinux
WARNING: mm/built-in.o - Section mismatch: reference to .init.text:set_up_list3s from .text between 'kmem_cache_create' (at offset 0x18a39) and 'cache_reap'
WARNING: mm/built-in.o - Section mismatch: reference to .init.text:set_up_list3s from .text between 'kmem_cache_create' (at offset 0x18a6b) and 'cache_reap'
Now modpost can detect "kernel_init" name (and whitelist it) and show
"set_up_list3s" name.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 2fcdbc7a..ce7e0d1 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -384,6 +384,7 @@
sechdrs[i].sh_size = TO_NATIVE(sechdrs[i].sh_size);
sechdrs[i].sh_link = TO_NATIVE(sechdrs[i].sh_link);
sechdrs[i].sh_name = TO_NATIVE(sechdrs[i].sh_name);
+ sechdrs[i].sh_info = TO_NATIVE(sechdrs[i].sh_info);
}
/* Find symbol table. */
for (i = 1; i < hdr->e_shnum; i++) {
@@ -773,6 +774,8 @@
for (sym = elf->symtab_start; sym < elf->symtab_stop; sym++) {
if (sym->st_shndx != relsym->st_shndx)
continue;
+ if (ELF_ST_TYPE(sym->st_info) == STT_SECTION)
+ continue;
if (sym->st_value == addr)
return sym;
}
@@ -910,6 +913,68 @@
}
}
+static void addend_386_rel(struct elf_info *elf, int section, Elf_Rela *r)
+{
+ Elf_Shdr *sechdrs = elf->sechdrs;
+ unsigned int r_typ;
+ unsigned int *location;
+
+ r_typ = ELF_R_TYPE(r->r_info);
+ location = (void *)elf->hdr +
+ sechdrs[sechdrs[section].sh_info].sh_offset + r->r_offset;
+ switch (r_typ) {
+ case R_386_32:
+ r->r_addend = TO_NATIVE(*location);
+ break;
+ case R_386_PC32:
+ r->r_addend = TO_NATIVE(*location) + 4;
+ break;
+ }
+}
+
+static void addend_arm_rel(struct elf_info *elf, int section, Elf_Rela *r)
+{
+ Elf_Shdr *sechdrs = elf->sechdrs;
+ unsigned int r_typ;
+ unsigned int *location;
+
+ r_typ = ELF_R_TYPE(r->r_info);
+ location = (void *)elf->hdr +
+ sechdrs[sechdrs[section].sh_info].sh_offset + r->r_offset;
+ switch (r_typ) {
+ case R_ARM_ABS32:
+ r->r_addend = TO_NATIVE(*location);
+ break;
+ case R_ARM_PC24:
+ r->r_addend = ((TO_NATIVE(*location) & 0x00ffffff) << 2) + 8;
+ break;
+ }
+}
+
+static int addend_mips_rel(struct elf_info *elf, int section, Elf_Rela *r)
+{
+ Elf_Shdr *sechdrs = elf->sechdrs;
+ unsigned int r_typ;
+ unsigned int *location;
+ unsigned int inst;
+
+ r_typ = ELF_R_TYPE(r->r_info);
+ if (r_typ == R_MIPS_HI16)
+ return 1; /* skip this */
+ location = (void *)elf->hdr +
+ sechdrs[sechdrs[section].sh_info].sh_offset + r->r_offset;
+ inst = TO_NATIVE(*location);
+ switch (r_typ) {
+ case R_MIPS_LO16:
+ r->r_addend = ((inst & 0xffff) ^ 0x8000) - 0x8000;
+ break;
+ case R_MIPS_26:
+ r->r_addend = (inst & 0x03ffffff) << 2;
+ break;
+ }
+ return 0;
+}
+
/**
* A module includes a number of sections that are discarded
* either when loaded or when used as built-in.
@@ -953,8 +1018,11 @@
r.r_offset = TO_NATIVE(rela->r_offset);
#if KERNEL_ELFCLASS == ELFCLASS64
if (hdr->e_machine == EM_MIPS) {
+ unsigned int r_typ;
r_sym = ELF64_MIPS_R_SYM(rela->r_info);
r_sym = TO_NATIVE(r_sym);
+ r_typ = ELF64_MIPS_R_TYPE(rela->r_info);
+ r.r_info = ELF64_R_INFO(r_sym, r_typ);
} else {
r.r_info = TO_NATIVE(rela->r_info);
r_sym = ELF_R_SYM(r.r_info);
@@ -987,8 +1055,11 @@
r.r_offset = TO_NATIVE(rel->r_offset);
#if KERNEL_ELFCLASS == ELFCLASS64
if (hdr->e_machine == EM_MIPS) {
+ unsigned int r_typ;
r_sym = ELF64_MIPS_R_SYM(rel->r_info);
r_sym = TO_NATIVE(r_sym);
+ r_typ = ELF64_MIPS_R_TYPE(rel->r_info);
+ r.r_info = ELF64_R_INFO(r_sym, r_typ);
} else {
r.r_info = TO_NATIVE(rel->r_info);
r_sym = ELF_R_SYM(r.r_info);
@@ -998,6 +1069,14 @@
r_sym = ELF_R_SYM(r.r_info);
#endif
r.r_addend = 0;
+ if (hdr->e_machine == EM_386)
+ addend_386_rel(elf, i, &r);
+ else if (hdr->e_machine == EM_ARM)
+ addend_arm_rel(elf, i, &r);
+ else if (hdr->e_machine == EM_MIPS) {
+ if (addend_mips_rel(elf, i, &r))
+ continue;
+ }
sym = elf->symtab_start + r_sym;
/* Skip special sections */
if (sym->st_shndx >= SHN_LORESERVE)