commit | f8ebb7f2497537fa5fb14f31ced9035b1b81e14b | [log] [tgz] |
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author | Mayank Rana <mrana@codeaurora.org> | Thu Sep 08 11:09:37 2016 -0700 |
committer | Mayank Rana <mrana@codeaurora.org> | Wed Dec 14 11:11:43 2016 -0800 |
tree | 75cef6606acdbf978bee0e5b5338f2194d0db976 | |
parent | de1df69085b5b3038457c783931facd1dfe06f75 [diff] |
dwc3: core: clear DELAYP1TRANS with USB3PIPECTL register Commit fd115e68971b ("dwc3: core: Don't perform controller and PHYs soft reset") removed clearing DELAYP1TRANS. It is recommended to clear DELAYP1TRANS bit with USB3PIPECTL register which controls USB controller allowing USB QMP PHY low power transitions. Change-Id: I54ba694f4c997bf5ecc540cee274e2cb07b77446 Signed-off-by: Mayank Rana <mrana@codeaurora.org>