Sprinkle a few more .set mipsX over xchg to make sure we dont' end up with
64-bit instructions on 32-bit processors, they tend to be unhappy about
that kind of food ;-)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index b1ac3f5..b126545 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -302,7 +302,9 @@
" .set mips3 \n"
"1: ll %0, %2 # __cmpxchg_u32 \n"
" bne %0, %z3, 2f \n"
+ " .set mips0 \n"
" move $1, %z4 \n"
+ " .set mips3 \n"
" sc $1, %1 \n"
" beqzl $1, 1b \n"
#ifdef CONFIG_SMP
@@ -320,7 +322,9 @@
" .set mips3 \n"
"1: ll %0, %2 # __cmpxchg_u32 \n"
" bne %0, %z3, 2f \n"
+ " .set mips0 \n"
" move $1, %z4 \n"
+ " .set mips3 \n"
" sc $1, %1 \n"
" beqz $1, 1b \n"
#ifdef CONFIG_SMP