usb: gadget: ci13xxx: rename register layouts
Currently, the register prefixes in the driver seem to be mixed: the
capability registers are the ones that contain capability information,
such as number of hardware endpoints, while the registers that are
used to program the controller are called operational registers.
Normally, capability registers start at 0x100 offset of the register
window and are followed by operational registers. In some versions,
however, capability registers start at 0x0 offset.
This patch renames the register and adjusts their offsets appropriately,
leaving the possibility of having a non-standard capability offset.
I couldn't find any mentions of the TESTMODE register anywhere, so I
suspect it might only be enabled in chipidea internal versions of the
controller and I'm really inclined to remove it from the driver or at
least hiding it behind a config option.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/drivers/usb/gadget/ci13xxx_pci.c b/drivers/usb/gadget/ci13xxx_pci.c
index 63ef96c..c890e1c 100644
--- a/drivers/usb/gadget/ci13xxx_pci.c
+++ b/drivers/usb/gadget/ci13xxx_pci.c
@@ -55,6 +55,7 @@
const struct pci_device_id *id)
{
void __iomem *regs = NULL;
+ uintptr_t capoffset = DEF_CAPOFFSET;
int retval = 0;
if (id == NULL)
@@ -86,7 +87,11 @@
pci_set_master(pdev);
pci_try_set_mwi(pdev);
- retval = udc_probe(&ci13xxx_pci_udc_driver, &pdev->dev, regs);
+ if (pdev->vendor == PCI_VENDOR_ID_INTEL)
+ capoffset = 0;
+
+ retval = udc_probe(&ci13xxx_pci_udc_driver, &pdev->dev, regs,
+ capoffset);
if (retval)
goto iounmap;