tree f8c60a43cd9de72939d8fffe00f64b820ddd0442
parent 0c6287ec12fa8f7e295a6ebc5fd331647c5a5469
parent ef70728c7a6571a1a7115031e932b811f1740b2e
author Dave Airlie <airlied@gmail.com> 1407405202 +1000
committer Dave Airlie <airlied@gmail.com> 1407405202 +1000
mergetag object ef70728c7a6571a1a7115031e932b811f1740b2e
 type commit
 tag drm/tegra/for-3.17-rc1
 tagger Thierry Reding <treding@nvidia.com> 1407338097 +0200
 
 drm/tegra: Changes for v3.17-rc1
 
 Mostly some cleanup all over the place. Pitch alignment limitations of
 the display controller are now honored and job submission is 64-bit
 safe.
 
 The SOR output (used for eDP) properly configures sync signal polarities
 according to the display mode rather than hard-coding them to some value
 and the number of bits per color is now taken from the panel rather than
 hard-coded to properly support 24-bit vs. 18-bit panels.
 
 The DSI controller now properly supports non-continuous clock mode.
 
 GEM objects can now have their flags and tiling mode modified via IOCTLs
 to allow buffers imported from Nouveau to be properly displayed. Newer
 generations of the Tegra display controller can also detile block linear
 buffers at scan-out time.
 
 Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it
 to be automatically loaded when built as a module.
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Merge tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v3.17-rc1

Mostly some cleanup all over the place. Pitch alignment limitations of
the display controller are now honored and job submission is 64-bit
safe.

The SOR output (used for eDP) properly configures sync signal polarities
according to the display mode rather than hard-coding them to some value
and the number of bits per color is now taken from the panel rather than
hard-coded to properly support 24-bit vs. 18-bit panels.

The DSI controller now properly supports non-continuous clock mode.

GEM objects can now have their flags and tiling mode modified via IOCTLs
to allow buffers imported from Nouveau to be properly displayed. Newer
generations of the Tegra display controller can also detile block linear
buffers at scan-out time.

Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it
to be automatically loaded when built as a module.

* tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux:
  drm/tegra: add MODULE_DEVICE_TABLEs
  drm/tegra: dc - Reset controller on driver remove
  drm/tegra: Properly align stride for framebuffers
  drm/tegra: sor - Configure proper sync polarities
  drm/tegra: sor - Use bits-per-color from panel
  drm/tegra: Make job submission 64-bit safe
  drm/tegra: Allow non-authenticated processes to create buffer objects
  drm/tegra: Add SET/GET_FLAGS IOCTLs
  drm/tegra: Add SET/GET_TILING IOCTLs
  drm/tegra: Implement more tiling modes
  drm/tegra: dsi - Handle non-continuous clock flag
  drm/tegra: sor - missing unlock on error