| commit | fcde2bf0b9a0581db9fe5382e0c90f526c011114 | [log] [tgz] |
|---|---|---|
| author | Vladimir Zapolskiy <vz@mleia.com> | Wed Oct 19 22:39:12 2011 +0300 |
| committer | Greg Kroah-Hartman <gregkh@suse.de> | Wed Oct 19 13:42:49 2011 -0700 |
| tree | 58569442130b97413eb27b98f35e6d374a3c4800 | |
| parent | 6b7200fe0a59d7bda59e9e028b235b25a137dff9 [diff] |
staging: tidspbridge: MMU2 registers are limited to 32-bit data access According to OMAP3 TRM access to MMU registers shall be strictly 32-bit aligned. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>