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Abhijit Pagare30b88632010-01-26 20:12:54 -07001/*
2 * OMAP4 Clock domains framework
3 *
Benoit Cousson3c95b702011-07-09 19:15:06 -06004 * Copyright (C) 2009-2011 Texas Instruments, Inc.
5 * Copyright (C) 2009-2011 Nokia Corporation
Abhijit Pagare30b88632010-01-26 20:12:54 -07006 *
7 * Abhijit Pagare (abhijitpagare@ti.com)
8 * Benoit Cousson (b-cousson@ti.com)
Benoit Cousson3c95b702011-07-09 19:15:06 -06009 * Paul Walmsley (paul@pwsan.com)
Abhijit Pagare30b88632010-01-26 20:12:54 -070010 *
11 * This file is automatically generated from the OMAP hardware databases.
12 * We respectfully ask that any modifications to this file be coordinated
13 * with the public linux-omap@vger.kernel.org mailing list and the
14 * authors above to ensure that the autogeneration scripts are kept
15 * up-to-date with the file contents.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
Paul Walmsleydc0b3a72010-12-21 20:01:20 -070022#include <linux/kernel.h>
23#include <linux/io.h>
Abhijit Pagare30b88632010-01-26 20:12:54 -070024
Paul Walmsley1540f2142010-12-21 21:05:15 -070025#include "clockdomain.h"
Paul Walmsley59fb6592010-12-21 15:30:55 -070026#include "cm1_44xx.h"
27#include "cm2_44xx.h"
Abhijit Pagare30b88632010-01-26 20:12:54 -070028
Paul Walmsleydc0b3a72010-12-21 20:01:20 -070029#include "cm-regbits-44xx.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -070030#include "prm44xx.h"
Paul Walmsleybd2122c2010-12-21 21:05:15 -070031#include "prcm44xx.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -070032#include "prcm_mpu44xx.h"
33
Rajendra Nayak514c5942011-02-25 15:48:13 -070034/* Static Dependencies for OMAP4 Clock Domains */
35
Benoit Cousson3c95b702011-07-09 19:15:06 -060036static struct clkdm_dep d2d_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -060037 { .clkdm_name = "abe_clkdm" },
38 { .clkdm_name = "ivahd_clkdm" },
39 { .clkdm_name = "l3_1_clkdm" },
40 { .clkdm_name = "l3_2_clkdm" },
41 { .clkdm_name = "l3_emif_clkdm" },
42 { .clkdm_name = "l3_init_clkdm" },
43 { .clkdm_name = "l4_cfg_clkdm" },
44 { .clkdm_name = "l4_per_clkdm" },
Benoit Cousson3c95b702011-07-09 19:15:06 -060045 { NULL },
46};
47
Rajendra Nayak514c5942011-02-25 15:48:13 -070048static struct clkdm_dep ducati_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -060049 { .clkdm_name = "abe_clkdm" },
50 { .clkdm_name = "ivahd_clkdm" },
51 { .clkdm_name = "l3_1_clkdm" },
52 { .clkdm_name = "l3_2_clkdm" },
53 { .clkdm_name = "l3_dss_clkdm" },
54 { .clkdm_name = "l3_emif_clkdm" },
55 { .clkdm_name = "l3_gfx_clkdm" },
56 { .clkdm_name = "l3_init_clkdm" },
57 { .clkdm_name = "l4_cfg_clkdm" },
58 { .clkdm_name = "l4_per_clkdm" },
59 { .clkdm_name = "l4_secure_clkdm" },
60 { .clkdm_name = "l4_wkup_clkdm" },
61 { .clkdm_name = "tesla_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -070062 { NULL },
63};
64
65static struct clkdm_dep iss_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -060066 { .clkdm_name = "ivahd_clkdm" },
67 { .clkdm_name = "l3_1_clkdm" },
68 { .clkdm_name = "l3_emif_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -070069 { NULL },
70};
71
72static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -060073 { .clkdm_name = "l3_1_clkdm" },
74 { .clkdm_name = "l3_emif_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -070075 { NULL },
76};
77
Rajendra Nayak514c5942011-02-25 15:48:13 -070078static struct clkdm_dep l3_dma_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -060079 { .clkdm_name = "abe_clkdm" },
80 { .clkdm_name = "ducati_clkdm" },
81 { .clkdm_name = "ivahd_clkdm" },
82 { .clkdm_name = "l3_1_clkdm" },
83 { .clkdm_name = "l3_dss_clkdm" },
84 { .clkdm_name = "l3_emif_clkdm" },
85 { .clkdm_name = "l3_init_clkdm" },
86 { .clkdm_name = "l4_cfg_clkdm" },
87 { .clkdm_name = "l4_per_clkdm" },
88 { .clkdm_name = "l4_secure_clkdm" },
89 { .clkdm_name = "l4_wkup_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -070090 { NULL },
91};
92
93static struct clkdm_dep l3_dss_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -060094 { .clkdm_name = "ivahd_clkdm" },
95 { .clkdm_name = "l3_2_clkdm" },
96 { .clkdm_name = "l3_emif_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -070097 { NULL },
98};
99
100static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -0600101 { .clkdm_name = "ivahd_clkdm" },
102 { .clkdm_name = "l3_1_clkdm" },
103 { .clkdm_name = "l3_emif_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -0700104 { NULL },
105};
106
107static struct clkdm_dep l3_init_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -0600108 { .clkdm_name = "abe_clkdm" },
109 { .clkdm_name = "ivahd_clkdm" },
110 { .clkdm_name = "l3_emif_clkdm" },
111 { .clkdm_name = "l4_cfg_clkdm" },
112 { .clkdm_name = "l4_per_clkdm" },
113 { .clkdm_name = "l4_secure_clkdm" },
114 { .clkdm_name = "l4_wkup_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -0700115 { NULL },
116};
117
118static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -0600119 { .clkdm_name = "l3_1_clkdm" },
120 { .clkdm_name = "l3_emif_clkdm" },
121 { .clkdm_name = "l4_per_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -0700122 { NULL },
123};
124
Benoit Cousson3c95b702011-07-09 19:15:06 -0600125static struct clkdm_dep mpu_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -0600126 { .clkdm_name = "abe_clkdm" },
127 { .clkdm_name = "ducati_clkdm" },
128 { .clkdm_name = "ivahd_clkdm" },
129 { .clkdm_name = "l3_1_clkdm" },
130 { .clkdm_name = "l3_2_clkdm" },
131 { .clkdm_name = "l3_dss_clkdm" },
132 { .clkdm_name = "l3_emif_clkdm" },
133 { .clkdm_name = "l3_gfx_clkdm" },
134 { .clkdm_name = "l3_init_clkdm" },
135 { .clkdm_name = "l4_cfg_clkdm" },
136 { .clkdm_name = "l4_per_clkdm" },
137 { .clkdm_name = "l4_secure_clkdm" },
138 { .clkdm_name = "l4_wkup_clkdm" },
139 { .clkdm_name = "tesla_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -0700140 { NULL },
141};
142
143static struct clkdm_dep tesla_wkup_sleep_deps[] = {
Paul Walmsleya5ffef62011-09-14 16:01:21 -0600144 { .clkdm_name = "abe_clkdm" },
145 { .clkdm_name = "ivahd_clkdm" },
146 { .clkdm_name = "l3_1_clkdm" },
147 { .clkdm_name = "l3_2_clkdm" },
148 { .clkdm_name = "l3_emif_clkdm" },
149 { .clkdm_name = "l3_init_clkdm" },
150 { .clkdm_name = "l4_cfg_clkdm" },
151 { .clkdm_name = "l4_per_clkdm" },
152 { .clkdm_name = "l4_wkup_clkdm" },
Rajendra Nayak514c5942011-02-25 15:48:13 -0700153 { NULL },
154};
Abhijit Pagare30b88632010-01-26 20:12:54 -0700155
156static struct clockdomain l4_cefuse_44xx_clkdm = {
157 .name = "l4_cefuse_clkdm",
158 .pwrdm = { .name = "cefuse_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700159 .prcm_partition = OMAP4430_CM2_PARTITION,
160 .cm_inst = OMAP4430_CM2_CEFUSE_INST,
161 .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700162 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700163};
164
165static struct clockdomain l4_cfg_44xx_clkdm = {
166 .name = "l4_cfg_clkdm",
167 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700168 .prcm_partition = OMAP4430_CM2_PARTITION,
169 .cm_inst = OMAP4430_CM2_CORE_INST,
170 .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700171 .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700172 .flags = CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700173};
174
175static struct clockdomain tesla_44xx_clkdm = {
176 .name = "tesla_clkdm",
177 .pwrdm = { .name = "tesla_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700178 .prcm_partition = OMAP4430_CM1_PARTITION,
179 .cm_inst = OMAP4430_CM1_TESLA_INST,
180 .clkdm_offs = OMAP4430_CM1_TESLA_TESLA_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700181 .dep_bit = OMAP4430_TESLA_STATDEP_SHIFT,
182 .wkdep_srcs = tesla_wkup_sleep_deps,
183 .sleepdep_srcs = tesla_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700184 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700185};
186
187static struct clockdomain l3_gfx_44xx_clkdm = {
188 .name = "l3_gfx_clkdm",
189 .pwrdm = { .name = "gfx_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700190 .prcm_partition = OMAP4430_CM2_PARTITION,
191 .cm_inst = OMAP4430_CM2_GFX_INST,
192 .clkdm_offs = OMAP4430_CM2_GFX_GFX_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700193 .dep_bit = OMAP4430_GFX_STATDEP_SHIFT,
194 .wkdep_srcs = l3_gfx_wkup_sleep_deps,
195 .sleepdep_srcs = l3_gfx_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700196 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700197};
198
199static struct clockdomain ivahd_44xx_clkdm = {
200 .name = "ivahd_clkdm",
201 .pwrdm = { .name = "ivahd_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700202 .prcm_partition = OMAP4430_CM2_PARTITION,
203 .cm_inst = OMAP4430_CM2_IVAHD_INST,
204 .clkdm_offs = OMAP4430_CM2_IVAHD_IVAHD_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700205 .dep_bit = OMAP4430_IVAHD_STATDEP_SHIFT,
206 .wkdep_srcs = ivahd_wkup_sleep_deps,
207 .sleepdep_srcs = ivahd_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700208 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700209};
210
211static struct clockdomain l4_secure_44xx_clkdm = {
212 .name = "l4_secure_clkdm",
213 .pwrdm = { .name = "l4per_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700214 .prcm_partition = OMAP4430_CM2_PARTITION,
215 .cm_inst = OMAP4430_CM2_L4PER_INST,
216 .clkdm_offs = OMAP4430_CM2_L4PER_L4SEC_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700217 .dep_bit = OMAP4430_L4SEC_STATDEP_SHIFT,
218 .wkdep_srcs = l4_secure_wkup_sleep_deps,
219 .sleepdep_srcs = l4_secure_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700220 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700221};
222
223static struct clockdomain l4_per_44xx_clkdm = {
224 .name = "l4_per_clkdm",
225 .pwrdm = { .name = "l4per_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700226 .prcm_partition = OMAP4430_CM2_PARTITION,
227 .cm_inst = OMAP4430_CM2_L4PER_INST,
228 .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700229 .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700230 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700231};
232
233static struct clockdomain abe_44xx_clkdm = {
234 .name = "abe_clkdm",
235 .pwrdm = { .name = "abe_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700236 .prcm_partition = OMAP4430_CM1_PARTITION,
237 .cm_inst = OMAP4430_CM1_ABE_INST,
238 .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700239 .dep_bit = OMAP4430_ABE_STATDEP_SHIFT,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700240 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700241};
242
Abhijit Pagare6b04e0d2010-01-26 20:12:58 -0700243static struct clockdomain l3_instr_44xx_clkdm = {
244 .name = "l3_instr_clkdm",
245 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700246 .prcm_partition = OMAP4430_CM2_PARTITION,
247 .cm_inst = OMAP4430_CM2_CORE_INST,
248 .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
Abhijit Pagare6b04e0d2010-01-26 20:12:58 -0700249};
250
Abhijit Pagare30b88632010-01-26 20:12:54 -0700251static struct clockdomain l3_init_44xx_clkdm = {
252 .name = "l3_init_clkdm",
253 .pwrdm = { .name = "l3init_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700254 .prcm_partition = OMAP4430_CM2_PARTITION,
255 .cm_inst = OMAP4430_CM2_L3INIT_INST,
256 .clkdm_offs = OMAP4430_CM2_L3INIT_L3INIT_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700257 .dep_bit = OMAP4430_L3INIT_STATDEP_SHIFT,
258 .wkdep_srcs = l3_init_wkup_sleep_deps,
259 .sleepdep_srcs = l3_init_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700260 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700261};
262
Benoit Cousson3c95b702011-07-09 19:15:06 -0600263static struct clockdomain d2d_44xx_clkdm = {
264 .name = "d2d_clkdm",
265 .pwrdm = { .name = "core_pwrdm" },
266 .prcm_partition = OMAP4430_CM2_PARTITION,
267 .cm_inst = OMAP4430_CM2_CORE_INST,
268 .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
269 .wkdep_srcs = d2d_wkup_sleep_deps,
270 .sleepdep_srcs = d2d_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700271 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700272};
273
274static struct clockdomain mpu0_44xx_clkdm = {
275 .name = "mpu0_clkdm",
276 .pwrdm = { .name = "cpu0_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700277 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
278 .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
Benoit Cousson1a9f5e82011-02-08 14:30:31 -0700279 .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700280 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700281};
282
283static struct clockdomain mpu1_44xx_clkdm = {
284 .name = "mpu1_clkdm",
285 .pwrdm = { .name = "cpu1_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700286 .prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
287 .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
Benoit Cousson1a9f5e82011-02-08 14:30:31 -0700288 .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700289 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700290};
291
292static struct clockdomain l3_emif_44xx_clkdm = {
293 .name = "l3_emif_clkdm",
294 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700295 .prcm_partition = OMAP4430_CM2_PARTITION,
296 .cm_inst = OMAP4430_CM2_CORE_INST,
297 .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700298 .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700299 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700300};
301
302static struct clockdomain l4_ao_44xx_clkdm = {
303 .name = "l4_ao_clkdm",
304 .pwrdm = { .name = "always_on_core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700305 .prcm_partition = OMAP4430_CM2_PARTITION,
306 .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST,
307 .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700308 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700309};
310
311static struct clockdomain ducati_44xx_clkdm = {
312 .name = "ducati_clkdm",
313 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700314 .prcm_partition = OMAP4430_CM2_PARTITION,
315 .cm_inst = OMAP4430_CM2_CORE_INST,
316 .clkdm_offs = OMAP4430_CM2_CORE_DUCATI_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700317 .dep_bit = OMAP4430_DUCATI_STATDEP_SHIFT,
318 .wkdep_srcs = ducati_wkup_sleep_deps,
319 .sleepdep_srcs = ducati_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700320 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700321};
322
Benoit Cousson3c95b702011-07-09 19:15:06 -0600323static struct clockdomain mpu_44xx_clkdm = {
Benoit Coussona5322c62011-07-10 05:56:29 -0600324 .name = "mpuss_clkdm",
Benoit Cousson3c95b702011-07-09 19:15:06 -0600325 .pwrdm = { .name = "mpu_pwrdm" },
326 .prcm_partition = OMAP4430_CM1_PARTITION,
327 .cm_inst = OMAP4430_CM1_MPU_INST,
328 .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
329 .wkdep_srcs = mpu_wkup_sleep_deps,
330 .sleepdep_srcs = mpu_wkup_sleep_deps,
331 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Benoit Cousson3c95b702011-07-09 19:15:06 -0600332};
333
Abhijit Pagare30b88632010-01-26 20:12:54 -0700334static struct clockdomain l3_2_44xx_clkdm = {
335 .name = "l3_2_clkdm",
336 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700337 .prcm_partition = OMAP4430_CM2_PARTITION,
338 .cm_inst = OMAP4430_CM2_CORE_INST,
339 .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700340 .dep_bit = OMAP4430_L3_2_STATDEP_SHIFT,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700341 .flags = CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700342};
343
344static struct clockdomain l3_1_44xx_clkdm = {
345 .name = "l3_1_clkdm",
346 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700347 .prcm_partition = OMAP4430_CM2_PARTITION,
348 .cm_inst = OMAP4430_CM2_CORE_INST,
349 .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700350 .dep_bit = OMAP4430_L3_1_STATDEP_SHIFT,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700351 .flags = CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700352};
353
Abhijit Pagare30b88632010-01-26 20:12:54 -0700354static struct clockdomain iss_44xx_clkdm = {
355 .name = "iss_clkdm",
356 .pwrdm = { .name = "cam_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700357 .prcm_partition = OMAP4430_CM2_PARTITION,
358 .cm_inst = OMAP4430_CM2_CAM_INST,
359 .clkdm_offs = OMAP4430_CM2_CAM_CAM_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700360 .wkdep_srcs = iss_wkup_sleep_deps,
361 .sleepdep_srcs = iss_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700362 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700363};
364
365static struct clockdomain l3_dss_44xx_clkdm = {
366 .name = "l3_dss_clkdm",
367 .pwrdm = { .name = "dss_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700368 .prcm_partition = OMAP4430_CM2_PARTITION,
369 .cm_inst = OMAP4430_CM2_DSS_INST,
370 .clkdm_offs = OMAP4430_CM2_DSS_DSS_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700371 .dep_bit = OMAP4430_DSS_STATDEP_SHIFT,
372 .wkdep_srcs = l3_dss_wkup_sleep_deps,
373 .sleepdep_srcs = l3_dss_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700374 .flags = CLKDM_CAN_HWSUP_SWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700375};
376
377static struct clockdomain l4_wkup_44xx_clkdm = {
378 .name = "l4_wkup_clkdm",
379 .pwrdm = { .name = "wkup_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700380 .prcm_partition = OMAP4430_PRM_PARTITION,
381 .cm_inst = OMAP4430_PRM_WKUP_CM_INST,
382 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700383 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT,
Paul Walmsley006c7f12012-07-04 05:22:53 -0600384 .flags = CLKDM_CAN_HWSUP | CLKDM_ACTIVE_WITH_MPU,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700385};
386
387static struct clockdomain emu_sys_44xx_clkdm = {
388 .name = "emu_sys_clkdm",
389 .pwrdm = { .name = "emu_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700390 .prcm_partition = OMAP4430_PRM_PARTITION,
391 .cm_inst = OMAP4430_PRM_EMU_CM_INST,
392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
Paul Walmsley7a82ebd2012-04-04 08:25:25 -0600393 .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700394};
395
396static struct clockdomain l3_dma_44xx_clkdm = {
397 .name = "l3_dma_clkdm",
398 .pwrdm = { .name = "core_pwrdm" },
Paul Walmsleybd2122c2010-12-21 21:05:15 -0700399 .prcm_partition = OMAP4430_CM2_PARTITION,
400 .cm_inst = OMAP4430_CM2_CORE_INST,
401 .clkdm_offs = OMAP4430_CM2_CORE_SDMA_CDOFFS,
Rajendra Nayak514c5942011-02-25 15:48:13 -0700402 .wkdep_srcs = l3_dma_wkup_sleep_deps,
403 .sleepdep_srcs = l3_dma_wkup_sleep_deps,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700404 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
Abhijit Pagare30b88632010-01-26 20:12:54 -0700405};
406
Benoit Cousson3c95b702011-07-09 19:15:06 -0600407/* As clockdomains are added or removed above, this list must also be changed */
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700408static struct clockdomain *clockdomains_omap44xx[] __initdata = {
409 &l4_cefuse_44xx_clkdm,
410 &l4_cfg_44xx_clkdm,
411 &tesla_44xx_clkdm,
412 &l3_gfx_44xx_clkdm,
413 &ivahd_44xx_clkdm,
414 &l4_secure_44xx_clkdm,
415 &l4_per_44xx_clkdm,
416 &abe_44xx_clkdm,
417 &l3_instr_44xx_clkdm,
418 &l3_init_44xx_clkdm,
Benoit Cousson3c95b702011-07-09 19:15:06 -0600419 &d2d_44xx_clkdm,
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700420 &mpu0_44xx_clkdm,
421 &mpu1_44xx_clkdm,
422 &l3_emif_44xx_clkdm,
423 &l4_ao_44xx_clkdm,
424 &ducati_44xx_clkdm,
Benoit Cousson3c95b702011-07-09 19:15:06 -0600425 &mpu_44xx_clkdm,
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700426 &l3_2_44xx_clkdm,
427 &l3_1_44xx_clkdm,
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700428 &iss_44xx_clkdm,
429 &l3_dss_44xx_clkdm,
430 &l4_wkup_44xx_clkdm,
431 &emu_sys_44xx_clkdm,
432 &l3_dma_44xx_clkdm,
Paul Walmsley6ba5a692012-04-19 13:33:49 -0600433 &prm_common_clkdm,
434 &cm_common_clkdm,
Benoit Cousson3c95b702011-07-09 19:15:06 -0600435 NULL
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700436};
Abhijit Pagare30b88632010-01-26 20:12:54 -0700437
Paul Walmsley08cb9702011-09-14 16:01:20 -0600438
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700439void __init omap44xx_clockdomains_init(void)
440{
Paul Walmsley08cb9702011-09-14 16:01:20 -0600441 clkdm_register_platform_funcs(&omap4_clkdm_operations);
442 clkdm_register_clkdms(clockdomains_omap44xx);
443 clkdm_complete_init();
Paul Walmsleydc0b3a72010-12-21 20:01:20 -0700444}