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Ben Dooksec549a02009-03-31 15:25:39 -07001/* linux/drivers/video/s3c-fb.c
2 *
3 * Copyright 2008 Openmoko Inc.
Ben Dooks50a55032010-08-10 18:02:33 -07004 * Copyright 2008-2010 Simtec Electronics
Ben Dooksec549a02009-03-31 15:25:39 -07005 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Samsung SoC Framebuffer driver
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070012 * published by the Free Software FoundatIon.
Ben Dooksec549a02009-03-31 15:25:39 -070013*/
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/dma-mapping.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Ben Dooksec549a02009-03-31 15:25:39 -070020#include <linux/init.h>
Ben Dooksec549a02009-03-31 15:25:39 -070021#include <linux/clk.h>
22#include <linux/fb.h>
23#include <linux/io.h>
Pawel Osciakefdc8462010-08-10 18:02:38 -070024#include <linux/uaccess.h>
25#include <linux/interrupt.h>
Jingoo Han49592122010-12-17 16:45:46 +090026#include <linux/pm_runtime.h>
Ben Dooksec549a02009-03-31 15:25:39 -070027
28#include <mach/map.h>
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070029#include <plat/regs-fb-v4.h>
Ben Dooksec549a02009-03-31 15:25:39 -070030#include <plat/fb.h>
31
32/* This driver will export a number of framebuffer interfaces depending
33 * on the configuration passed in via the platform data. Each fb instance
34 * maps to a hardware window. Currently there is no support for runtime
35 * setting of the alpha-blending functions that each window has, so only
36 * window 0 is actually useful.
37 *
38 * Window 0 is treated specially, it is used for the basis of the LCD
39 * output timings and as the control for the output power-down state.
40*/
41
Ben Dooks50a55032010-08-10 18:02:33 -070042/* note, the previous use of <mach/regs-fb.h> to get platform specific data
43 * has been replaced by using the platform device name to pick the correct
44 * configuration data for the system.
Ben Dooksec549a02009-03-31 15:25:39 -070045*/
46
47#ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
48#undef writel
49#define writel(v, r) do { \
50 printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
Jingoo Hanb73a21fc2011-04-01 07:17:27 +000051 __raw_writel(v, r); } while (0)
Ben Dooksec549a02009-03-31 15:25:39 -070052#endif /* FB_S3C_DEBUG_REGWRITE */
53
Pawel Osciakefdc8462010-08-10 18:02:38 -070054/* irq_flags bits */
55#define S3C_FB_VSYNC_IRQ_EN 0
56
57#define VSYNC_TIMEOUT_MSEC 50
58
Ben Dooksec549a02009-03-31 15:25:39 -070059struct s3c_fb;
60
Ben Dooks50a55032010-08-10 18:02:33 -070061#define VALID_BPP(x) (1 << ((x) - 1))
62
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070063#define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
64#define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
65#define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
66#define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
67#define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
68
Ben Dooks50a55032010-08-10 18:02:33 -070069/**
70 * struct s3c_fb_variant - fb variant information
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070071 * @is_2443: Set if S3C2443/S3C2416 style hardware.
Ben Dooks50a55032010-08-10 18:02:33 -070072 * @nr_windows: The number of windows.
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070073 * @vidtcon: The base for the VIDTCONx registers
74 * @wincon: The base for the WINxCON registers.
75 * @winmap: The base for the WINxMAP registers.
76 * @keycon: The abse for the WxKEYCON registers.
77 * @buf_start: Offset of buffer start registers.
78 * @buf_size: Offset of buffer size registers.
79 * @buf_end: Offset of buffer end registers.
80 * @osd: The base for the OSD registers.
Ben Dooks50a55032010-08-10 18:02:33 -070081 * @palette: Address of palette memory, or 0 if none.
Pawel Osciak067b2262010-08-10 18:02:38 -070082 * @has_prtcon: Set if has PRTCON register.
Pawel Osciakf5ec5462010-08-10 18:02:40 -070083 * @has_shadowcon: Set if has SHADOWCON register.
Jingoo Hanb5480ed2011-08-22 12:16:04 +090084 * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
Ben Dooks50a55032010-08-10 18:02:33 -070085 */
86struct s3c_fb_variant {
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070087 unsigned int is_2443:1;
Ben Dooks50a55032010-08-10 18:02:33 -070088 unsigned short nr_windows;
Ben Dooksc4bb6ff2010-08-10 18:02:34 -070089 unsigned short vidtcon;
90 unsigned short wincon;
91 unsigned short winmap;
92 unsigned short keycon;
93 unsigned short buf_start;
94 unsigned short buf_end;
95 unsigned short buf_size;
96 unsigned short osd;
97 unsigned short osd_stride;
Ben Dooks50a55032010-08-10 18:02:33 -070098 unsigned short palette[S3C_FB_MAX_WIN];
Pawel Osciak067b2262010-08-10 18:02:38 -070099
100 unsigned int has_prtcon:1;
Pawel Osciakf5ec5462010-08-10 18:02:40 -0700101 unsigned int has_shadowcon:1;
Jingoo Hanb5480ed2011-08-22 12:16:04 +0900102 unsigned int has_clksel:1;
Ben Dooks50a55032010-08-10 18:02:33 -0700103};
104
105/**
106 * struct s3c_fb_win_variant
107 * @has_osd_c: Set if has OSD C register.
108 * @has_osd_d: Set if has OSD D register.
Pawel Osciakf676ec22010-08-10 18:02:40 -0700109 * @has_osd_alpha: Set if can change alpha transparency for a window.
Ben Dooks50a55032010-08-10 18:02:33 -0700110 * @palette_sz: Size of palette in entries.
111 * @palette_16bpp: Set if palette is 16bits wide.
Pawel Osciakf676ec22010-08-10 18:02:40 -0700112 * @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
113 * register is located at the given offset from OSD_BASE.
Ben Dooks50a55032010-08-10 18:02:33 -0700114 * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
115 *
116 * valid_bpp bit x is set if (x+1)BPP is supported.
117 */
118struct s3c_fb_win_variant {
119 unsigned int has_osd_c:1;
120 unsigned int has_osd_d:1;
Pawel Osciakf676ec22010-08-10 18:02:40 -0700121 unsigned int has_osd_alpha:1;
Ben Dooks50a55032010-08-10 18:02:33 -0700122 unsigned int palette_16bpp:1;
Pawel Osciakf676ec22010-08-10 18:02:40 -0700123 unsigned short osd_size_off;
Ben Dooks50a55032010-08-10 18:02:33 -0700124 unsigned short palette_sz;
125 u32 valid_bpp;
126};
127
128/**
129 * struct s3c_fb_driverdata - per-device type driver data for init time.
130 * @variant: The variant information for this driver.
131 * @win: The window information for each window.
132 */
133struct s3c_fb_driverdata {
134 struct s3c_fb_variant variant;
135 struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
136};
137
Ben Dooksec549a02009-03-31 15:25:39 -0700138/**
Ben Dooksbc2da1b2010-08-10 18:02:34 -0700139 * struct s3c_fb_palette - palette information
140 * @r: Red bitfield.
141 * @g: Green bitfield.
142 * @b: Blue bitfield.
143 * @a: Alpha bitfield.
144 */
145struct s3c_fb_palette {
146 struct fb_bitfield r;
147 struct fb_bitfield g;
148 struct fb_bitfield b;
149 struct fb_bitfield a;
150};
151
152/**
Ben Dooksec549a02009-03-31 15:25:39 -0700153 * struct s3c_fb_win - per window private data for each framebuffer.
154 * @windata: The platform data supplied for the window configuration.
155 * @parent: The hardware that this window is part of.
156 * @fbinfo: Pointer pack to the framebuffer info for this window.
Ben Dooks50a55032010-08-10 18:02:33 -0700157 * @varint: The variant information for this window.
Ben Dooksec549a02009-03-31 15:25:39 -0700158 * @palette_buffer: Buffer/cache to hold palette entries.
159 * @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
160 * @index: The window number of this window.
161 * @palette: The bitfields for changing r/g/b into a hardware palette entry.
162 */
163struct s3c_fb_win {
164 struct s3c_fb_pd_win *windata;
165 struct s3c_fb *parent;
166 struct fb_info *fbinfo;
167 struct s3c_fb_palette palette;
Ben Dooks50a55032010-08-10 18:02:33 -0700168 struct s3c_fb_win_variant variant;
Ben Dooksec549a02009-03-31 15:25:39 -0700169
170 u32 *palette_buffer;
171 u32 pseudo_palette[16];
172 unsigned int index;
173};
174
175/**
Pawel Osciakefdc8462010-08-10 18:02:38 -0700176 * struct s3c_fb_vsync - vsync information
177 * @wait: a queue for processes waiting for vsync
178 * @count: vsync interrupt count
179 */
180struct s3c_fb_vsync {
181 wait_queue_head_t wait;
182 unsigned int count;
183};
184
185/**
Ben Dooksec549a02009-03-31 15:25:39 -0700186 * struct s3c_fb - overall hardware state of the hardware
Jingoo Hanb07f3bbe2011-04-11 07:25:37 +0000187 * @slock: The spinlock protection for this data sturcture.
Ben Dooksec549a02009-03-31 15:25:39 -0700188 * @dev: The device that we bound to, for printing, etc.
189 * @regs_res: The resource we claimed for the IO registers.
190 * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
Jingoo Hanb5480ed2011-08-22 12:16:04 +0900191 * @lcd_clk: The clk (sclk) feeding pixclk.
Ben Dooksec549a02009-03-31 15:25:39 -0700192 * @regs: The mapped hardware registers.
Ben Dooks50a55032010-08-10 18:02:33 -0700193 * @variant: Variant information for this hardware.
Ben Dooksec549a02009-03-31 15:25:39 -0700194 * @enabled: A bitmask of enabled hardware windows.
Mark Brownf4f51472011-12-27 14:16:10 +0000195 * @output_on: Flag if the physical output is enabled.
Ben Dooksec549a02009-03-31 15:25:39 -0700196 * @pdata: The platform configuration data passed with the device.
197 * @windows: The hardware windows that have been claimed.
Pawel Osciakefdc8462010-08-10 18:02:38 -0700198 * @irq_no: IRQ line number
199 * @irq_flags: irq flags
200 * @vsync_info: VSYNC-related information (count, queues...)
Ben Dooksec549a02009-03-31 15:25:39 -0700201 */
202struct s3c_fb {
Jingoo Hanb07f3bbe2011-04-11 07:25:37 +0000203 spinlock_t slock;
Ben Dooksec549a02009-03-31 15:25:39 -0700204 struct device *dev;
205 struct resource *regs_res;
206 struct clk *bus_clk;
Jingoo Hanb5480ed2011-08-22 12:16:04 +0900207 struct clk *lcd_clk;
Ben Dooksec549a02009-03-31 15:25:39 -0700208 void __iomem *regs;
Ben Dooks50a55032010-08-10 18:02:33 -0700209 struct s3c_fb_variant variant;
Ben Dooksec549a02009-03-31 15:25:39 -0700210
211 unsigned char enabled;
Mark Brownf4f51472011-12-27 14:16:10 +0000212 bool output_on;
Ben Dooksec549a02009-03-31 15:25:39 -0700213
214 struct s3c_fb_platdata *pdata;
215 struct s3c_fb_win *windows[S3C_FB_MAX_WIN];
Pawel Osciakefdc8462010-08-10 18:02:38 -0700216
217 int irq_no;
218 unsigned long irq_flags;
219 struct s3c_fb_vsync vsync_info;
Ben Dooksec549a02009-03-31 15:25:39 -0700220};
221
222/**
Ben Dooks50a55032010-08-10 18:02:33 -0700223 * s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
224 * @win: The device window.
225 * @bpp: The bit depth.
Ben Dooksec549a02009-03-31 15:25:39 -0700226 */
Ben Dooks50a55032010-08-10 18:02:33 -0700227static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
Ben Dooksec549a02009-03-31 15:25:39 -0700228{
Ben Dooks50a55032010-08-10 18:02:33 -0700229 return win->variant.valid_bpp & VALID_BPP(bpp);
Ben Dooksec549a02009-03-31 15:25:39 -0700230}
231
232/**
233 * s3c_fb_check_var() - framebuffer layer request to verify a given mode.
234 * @var: The screen information to verify.
235 * @info: The framebuffer device.
236 *
237 * Framebuffer layer call to verify the given information and allow us to
238 * update various information depending on the hardware capabilities.
239 */
240static int s3c_fb_check_var(struct fb_var_screeninfo *var,
241 struct fb_info *info)
242{
243 struct s3c_fb_win *win = info->par;
Ben Dooksec549a02009-03-31 15:25:39 -0700244 struct s3c_fb *sfb = win->parent;
245
246 dev_dbg(sfb->dev, "checking parameters\n");
247
Jingoo Han13e6af82011-06-09 04:26:38 +0000248 var->xres_virtual = max(var->xres_virtual, var->xres);
249 var->yres_virtual = max(var->yres_virtual, var->yres);
Ben Dooksec549a02009-03-31 15:25:39 -0700250
Ben Dooks50a55032010-08-10 18:02:33 -0700251 if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
Ben Dooksec549a02009-03-31 15:25:39 -0700252 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
253 win->index, var->bits_per_pixel);
254 return -EINVAL;
255 }
256
257 /* always ensure these are zero, for drop through cases below */
258 var->transp.offset = 0;
259 var->transp.length = 0;
260
261 switch (var->bits_per_pixel) {
262 case 1:
263 case 2:
264 case 4:
265 case 8:
Ben Dooks50a55032010-08-10 18:02:33 -0700266 if (sfb->variant.palette[win->index] != 0) {
Ben Dooksec549a02009-03-31 15:25:39 -0700267 /* non palletised, A:1,R:2,G:3,B:2 mode */
268 var->red.offset = 4;
269 var->green.offset = 2;
270 var->blue.offset = 0;
271 var->red.length = 5;
272 var->green.length = 3;
273 var->blue.length = 2;
274 var->transp.offset = 7;
275 var->transp.length = 1;
276 } else {
277 var->red.offset = 0;
278 var->red.length = var->bits_per_pixel;
279 var->green = var->red;
280 var->blue = var->red;
281 }
282 break;
283
284 case 19:
285 /* 666 with one bit alpha/transparency */
286 var->transp.offset = 18;
287 var->transp.length = 1;
288 case 18:
289 var->bits_per_pixel = 32;
290
291 /* 666 format */
292 var->red.offset = 12;
293 var->green.offset = 6;
294 var->blue.offset = 0;
295 var->red.length = 6;
296 var->green.length = 6;
297 var->blue.length = 6;
298 break;
299
300 case 16:
301 /* 16 bpp, 565 format */
302 var->red.offset = 11;
303 var->green.offset = 5;
304 var->blue.offset = 0;
305 var->red.length = 5;
306 var->green.length = 6;
307 var->blue.length = 5;
308 break;
309
Jingoo Hanaf1ce6b2011-05-24 08:55:23 +0000310 case 32:
Ben Dooksec549a02009-03-31 15:25:39 -0700311 case 28:
312 case 25:
313 var->transp.length = var->bits_per_pixel - 24;
314 var->transp.offset = 24;
315 /* drop through */
316 case 24:
317 /* our 24bpp is unpacked, so 32bpp */
318 var->bits_per_pixel = 32;
Ben Dooksec549a02009-03-31 15:25:39 -0700319 var->red.offset = 16;
320 var->red.length = 8;
321 var->green.offset = 8;
322 var->green.length = 8;
323 var->blue.offset = 0;
324 var->blue.length = 8;
325 break;
326
327 default:
328 dev_err(sfb->dev, "invalid bpp\n");
329 }
330
331 dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
332 return 0;
333}
334
335/**
336 * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
337 * @sfb: The hardware state.
338 * @pixclock: The pixel clock wanted, in picoseconds.
339 *
340 * Given the specified pixel clock, work out the necessary divider to get
341 * close to the output frequency.
342 */
Mark Browneb29a5c2010-01-15 17:01:40 -0800343static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
Ben Dooksec549a02009-03-31 15:25:39 -0700344{
Jingoo Hanb5480ed2011-08-22 12:16:04 +0900345 unsigned long clk;
Mark Browneb29a5c2010-01-15 17:01:40 -0800346 unsigned long long tmp;
Ben Dooksec549a02009-03-31 15:25:39 -0700347 unsigned int result;
348
Jingoo Hanb5480ed2011-08-22 12:16:04 +0900349 if (sfb->variant.has_clksel)
350 clk = clk_get_rate(sfb->bus_clk);
351 else
352 clk = clk_get_rate(sfb->lcd_clk);
353
Mark Browneb29a5c2010-01-15 17:01:40 -0800354 tmp = (unsigned long long)clk;
355 tmp *= pixclk;
356
357 do_div(tmp, 1000000000UL);
358 result = (unsigned int)tmp / 1000;
Ben Dooksec549a02009-03-31 15:25:39 -0700359
360 dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
361 pixclk, clk, result, clk / result);
362
363 return result;
364}
365
366/**
367 * s3c_fb_align_word() - align pixel count to word boundary
368 * @bpp: The number of bits per pixel
369 * @pix: The value to be aligned.
370 *
371 * Align the given pixel count so that it will start on an 32bit word
372 * boundary.
373 */
374static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
375{
376 int pix_per_word;
377
378 if (bpp > 16)
379 return pix;
380
381 pix_per_word = (8 * 32) / bpp;
382 return ALIGN(pix, pix_per_word);
383}
384
385/**
Pawel Osciakf676ec22010-08-10 18:02:40 -0700386 * vidosd_set_size() - set OSD size for a window
387 *
388 * @win: the window to set OSD size for
389 * @size: OSD size register value
390 */
391static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
392{
393 struct s3c_fb *sfb = win->parent;
394
395 /* OSD can be set up if osd_size_off != 0 for this window */
396 if (win->variant.osd_size_off)
397 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
398 + win->variant.osd_size_off);
399}
400
401/**
402 * vidosd_set_alpha() - set alpha transparency for a window
403 *
404 * @win: the window to set OSD size for
405 * @alpha: alpha register value
406 */
407static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
408{
409 struct s3c_fb *sfb = win->parent;
410
411 if (win->variant.has_osd_alpha)
412 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
413}
414
415/**
Pawel Osciakf5ec5462010-08-10 18:02:40 -0700416 * shadow_protect_win() - disable updating values from shadow registers at vsync
417 *
418 * @win: window to protect registers for
419 * @protect: 1 to protect (disable updates)
420 */
421static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
422{
423 struct s3c_fb *sfb = win->parent;
424 u32 reg;
425
426 if (protect) {
427 if (sfb->variant.has_prtcon) {
428 writel(PRTCON_PROTECT, sfb->regs + PRTCON);
429 } else if (sfb->variant.has_shadowcon) {
430 reg = readl(sfb->regs + SHADOWCON);
431 writel(reg | SHADOWCON_WINx_PROTECT(win->index),
432 sfb->regs + SHADOWCON);
433 }
434 } else {
435 if (sfb->variant.has_prtcon) {
436 writel(0, sfb->regs + PRTCON);
437 } else if (sfb->variant.has_shadowcon) {
438 reg = readl(sfb->regs + SHADOWCON);
439 writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
440 sfb->regs + SHADOWCON);
441 }
442 }
443}
444
445/**
Mark Browna2b77dc2011-12-27 14:16:08 +0000446 * s3c_fb_enable() - Set the state of the main LCD output
447 * @sfb: The main framebuffer state.
448 * @enable: The state to set.
449 */
450static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
451{
452 u32 vidcon0 = readl(sfb->regs + VIDCON0);
453
Mark Brownf4f51472011-12-27 14:16:10 +0000454 if (enable && !sfb->output_on)
455 pm_runtime_get_sync(sfb->dev);
456
457 if (enable) {
Mark Browna2b77dc2011-12-27 14:16:08 +0000458 vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
Mark Brownf4f51472011-12-27 14:16:10 +0000459 } else {
Mark Browna2b77dc2011-12-27 14:16:08 +0000460 /* see the note in the framebuffer datasheet about
461 * why you cannot take both of these bits down at the
462 * same time. */
463
Mark Brownf4f51472011-12-27 14:16:10 +0000464 if (vidcon0 & VIDCON0_ENVID) {
465 vidcon0 |= VIDCON0_ENVID;
466 vidcon0 &= ~VIDCON0_ENVID_F;
467 }
Mark Browna2b77dc2011-12-27 14:16:08 +0000468 }
469
470 writel(vidcon0, sfb->regs + VIDCON0);
Mark Brownf4f51472011-12-27 14:16:10 +0000471
472 if (!enable && sfb->output_on)
473 pm_runtime_put_sync(sfb->dev);
474
475 sfb->output_on = enable;
Mark Browna2b77dc2011-12-27 14:16:08 +0000476}
477
478/**
Ben Dooksec549a02009-03-31 15:25:39 -0700479 * s3c_fb_set_par() - framebuffer request to set new framebuffer state.
480 * @info: The framebuffer to change.
481 *
482 * Framebuffer layer request to set a new mode for the specified framebuffer
483 */
484static int s3c_fb_set_par(struct fb_info *info)
485{
486 struct fb_var_screeninfo *var = &info->var;
487 struct s3c_fb_win *win = info->par;
488 struct s3c_fb *sfb = win->parent;
489 void __iomem *regs = sfb->regs;
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700490 void __iomem *buf = regs;
Ben Dooksec549a02009-03-31 15:25:39 -0700491 int win_no = win->index;
Pawel Osciakf676ec22010-08-10 18:02:40 -0700492 u32 alpha = 0;
Ben Dooksec549a02009-03-31 15:25:39 -0700493 u32 data;
494 u32 pagewidth;
495 int clkdiv;
496
497 dev_dbg(sfb->dev, "setting framebuffer parameters\n");
498
Mark Brown5751b232011-12-27 14:16:11 +0000499 pm_runtime_get_sync(sfb->dev);
500
Pawel Osciaka8bdabc2010-08-10 18:02:41 -0700501 shadow_protect_win(win, 1);
502
Ben Dooksec549a02009-03-31 15:25:39 -0700503 switch (var->bits_per_pixel) {
504 case 32:
505 case 24:
506 case 16:
507 case 12:
508 info->fix.visual = FB_VISUAL_TRUECOLOR;
509 break;
510 case 8:
Ben Dooks50a55032010-08-10 18:02:33 -0700511 if (win->variant.palette_sz >= 256)
Ben Dooksec549a02009-03-31 15:25:39 -0700512 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
513 else
514 info->fix.visual = FB_VISUAL_TRUECOLOR;
515 break;
516 case 1:
517 info->fix.visual = FB_VISUAL_MONO01;
518 break;
519 default:
520 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
521 break;
522 }
523
524 info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
525
Pawel Osciak067b2262010-08-10 18:02:38 -0700526 info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
527 info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
528
Ben Dooksec549a02009-03-31 15:25:39 -0700529 /* disable the window whilst we update it */
530 writel(0, regs + WINCON(win_no));
531
InKi Daead044902010-08-10 18:02:31 -0700532 /* use platform specified window as the basis for the lcd timings */
Ben Dooksec549a02009-03-31 15:25:39 -0700533
InKi Daead044902010-08-10 18:02:31 -0700534 if (win_no == sfb->pdata->default_win) {
Mark Browneb29a5c2010-01-15 17:01:40 -0800535 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
Ben Dooksec549a02009-03-31 15:25:39 -0700536
537 data = sfb->pdata->vidcon0;
538 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
539
540 if (clkdiv > 1)
541 data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
542 else
543 data &= ~VIDCON0_CLKDIR; /* 1:1 clock */
544
545 /* write the timing data to the panel */
546
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700547 if (sfb->variant.is_2443)
548 data |= (1 << 5);
549
Ben Dooksec549a02009-03-31 15:25:39 -0700550 writel(data, regs + VIDCON0);
551
Mark Browna2b77dc2011-12-27 14:16:08 +0000552 s3c_fb_enable(sfb, 1);
553
Ben Dooksec549a02009-03-31 15:25:39 -0700554 data = VIDTCON0_VBPD(var->upper_margin - 1) |
555 VIDTCON0_VFPD(var->lower_margin - 1) |
556 VIDTCON0_VSPW(var->vsync_len - 1);
557
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700558 writel(data, regs + sfb->variant.vidtcon);
Ben Dooksec549a02009-03-31 15:25:39 -0700559
560 data = VIDTCON1_HBPD(var->left_margin - 1) |
561 VIDTCON1_HFPD(var->right_margin - 1) |
562 VIDTCON1_HSPW(var->hsync_len - 1);
563
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700564 /* VIDTCON1 */
565 writel(data, regs + sfb->variant.vidtcon + 4);
Ben Dooksec549a02009-03-31 15:25:39 -0700566
567 data = VIDTCON2_LINEVAL(var->yres - 1) |
568 VIDTCON2_HOZVAL(var->xres - 1);
Jingoo Hanb73a21fc2011-04-01 07:17:27 +0000569 writel(data, regs + sfb->variant.vidtcon + 8);
Ben Dooksec549a02009-03-31 15:25:39 -0700570 }
571
572 /* write the buffer address */
573
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700574 /* start and end registers stride is 8 */
575 buf = regs + win_no * 8;
576
577 writel(info->fix.smem_start, buf + sfb->variant.buf_start);
Ben Dooksec549a02009-03-31 15:25:39 -0700578
579 data = info->fix.smem_start + info->fix.line_length * var->yres;
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700580 writel(data, buf + sfb->variant.buf_end);
Ben Dooksec549a02009-03-31 15:25:39 -0700581
582 pagewidth = (var->xres * var->bits_per_pixel) >> 3;
583 data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
584 VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700585 writel(data, regs + sfb->variant.buf_size + (win_no * 4));
Ben Dooksec549a02009-03-31 15:25:39 -0700586
587 /* write 'OSD' registers to control position of framebuffer */
588
589 data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700590 writel(data, regs + VIDOSD_A(win_no, sfb->variant));
Ben Dooksec549a02009-03-31 15:25:39 -0700591
592 data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
593 var->xres - 1)) |
594 VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
595
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700596 writel(data, regs + VIDOSD_B(win_no, sfb->variant));
Ben Dooksec549a02009-03-31 15:25:39 -0700597
598 data = var->xres * var->yres;
InKi Dae39000d62009-06-16 15:34:27 -0700599
Pawel Osciakf676ec22010-08-10 18:02:40 -0700600 alpha = VIDISD14C_ALPHA1_R(0xf) |
InKi Dae39000d62009-06-16 15:34:27 -0700601 VIDISD14C_ALPHA1_G(0xf) |
602 VIDISD14C_ALPHA1_B(0xf);
603
Pawel Osciakf676ec22010-08-10 18:02:40 -0700604 vidosd_set_alpha(win, alpha);
605 vidosd_set_size(win, data);
Ben Dooksec549a02009-03-31 15:25:39 -0700606
Jingoo Hanfab7c5b2011-06-09 04:26:45 +0000607 /* Enable DMA channel for this window */
608 if (sfb->variant.has_shadowcon) {
609 data = readl(sfb->regs + SHADOWCON);
610 data |= SHADOWCON_CHx_ENABLE(win_no);
611 writel(data, sfb->regs + SHADOWCON);
612 }
613
Ben Dooksec549a02009-03-31 15:25:39 -0700614 data = WINCONx_ENWIN;
Jingoo Han2d9ae7a2011-12-02 19:07:17 +0900615 sfb->enabled |= (1 << win->index);
Ben Dooksec549a02009-03-31 15:25:39 -0700616
617 /* note, since we have to round up the bits-per-pixel, we end up
618 * relying on the bitfield information for r/g/b/a to work out
619 * exactly which mode of operation is intended. */
620
621 switch (var->bits_per_pixel) {
622 case 1:
623 data |= WINCON0_BPPMODE_1BPP;
624 data |= WINCONx_BITSWP;
625 data |= WINCONx_BURSTLEN_4WORD;
626 break;
627 case 2:
628 data |= WINCON0_BPPMODE_2BPP;
629 data |= WINCONx_BITSWP;
630 data |= WINCONx_BURSTLEN_8WORD;
631 break;
632 case 4:
633 data |= WINCON0_BPPMODE_4BPP;
634 data |= WINCONx_BITSWP;
635 data |= WINCONx_BURSTLEN_8WORD;
636 break;
637 case 8:
638 if (var->transp.length != 0)
639 data |= WINCON1_BPPMODE_8BPP_1232;
640 else
641 data |= WINCON0_BPPMODE_8BPP_PALETTE;
642 data |= WINCONx_BURSTLEN_8WORD;
643 data |= WINCONx_BYTSWP;
644 break;
645 case 16:
646 if (var->transp.length != 0)
647 data |= WINCON1_BPPMODE_16BPP_A1555;
648 else
649 data |= WINCON0_BPPMODE_16BPP_565;
650 data |= WINCONx_HAWSWP;
651 data |= WINCONx_BURSTLEN_16WORD;
652 break;
653 case 24:
654 case 32:
655 if (var->red.length == 6) {
656 if (var->transp.length != 0)
657 data |= WINCON1_BPPMODE_19BPP_A1666;
658 else
659 data |= WINCON1_BPPMODE_18BPP_666;
InKi Dae39000d62009-06-16 15:34:27 -0700660 } else if (var->transp.length == 1)
661 data |= WINCON1_BPPMODE_25BPP_A1888
662 | WINCON1_BLD_PIX;
Jingoo Han4420dd22011-11-07 15:03:01 +0900663 else if ((var->transp.length == 4) ||
664 (var->transp.length == 8))
InKi Dae39000d62009-06-16 15:34:27 -0700665 data |= WINCON1_BPPMODE_28BPP_A4888
666 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
Ben Dooksec549a02009-03-31 15:25:39 -0700667 else
668 data |= WINCON0_BPPMODE_24BPP_888;
669
InKi Daedc8498c2010-08-10 18:02:32 -0700670 data |= WINCONx_WSWP;
Ben Dooksec549a02009-03-31 15:25:39 -0700671 data |= WINCONx_BURSTLEN_16WORD;
672 break;
673 }
674
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700675 /* Enable the colour keying for the window below this one */
InKi Dae39000d62009-06-16 15:34:27 -0700676 if (win_no > 0) {
677 u32 keycon0_data = 0, keycon1_data = 0;
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700678 void __iomem *keycon = regs + sfb->variant.keycon;
InKi Dae39000d62009-06-16 15:34:27 -0700679
680 keycon0_data = ~(WxKEYCON0_KEYBL_EN |
681 WxKEYCON0_KEYEN_F |
682 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
683
684 keycon1_data = WxKEYCON1_COLVAL(0xffffff);
685
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700686 keycon += (win_no - 1) * 8;
687
688 writel(keycon0_data, keycon + WKEYCON0);
689 writel(keycon1_data, keycon + WKEYCON1);
InKi Dae39000d62009-06-16 15:34:27 -0700690 }
691
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700692 writel(data, regs + sfb->variant.wincon + (win_no * 4));
693 writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
Ben Dooksec549a02009-03-31 15:25:39 -0700694
Pawel Osciaka8bdabc2010-08-10 18:02:41 -0700695 shadow_protect_win(win, 0);
696
Mark Brown5751b232011-12-27 14:16:11 +0000697 pm_runtime_put_sync(sfb->dev);
698
Ben Dooksec549a02009-03-31 15:25:39 -0700699 return 0;
700}
701
702/**
703 * s3c_fb_update_palette() - set or schedule a palette update.
704 * @sfb: The hardware information.
705 * @win: The window being updated.
706 * @reg: The palette index being changed.
707 * @value: The computed palette value.
708 *
709 * Change the value of a palette register, either by directly writing to
710 * the palette (this requires the palette RAM to be disconnected from the
711 * hardware whilst this is in progress) or schedule the update for later.
712 *
713 * At the moment, since we have no VSYNC interrupt support, we simply set
714 * the palette entry directly.
715 */
716static void s3c_fb_update_palette(struct s3c_fb *sfb,
717 struct s3c_fb_win *win,
718 unsigned int reg,
719 u32 value)
720{
721 void __iomem *palreg;
722 u32 palcon;
723
Ben Dooks50a55032010-08-10 18:02:33 -0700724 palreg = sfb->regs + sfb->variant.palette[win->index];
Ben Dooksec549a02009-03-31 15:25:39 -0700725
726 dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
727 __func__, win->index, reg, palreg, value);
728
729 win->palette_buffer[reg] = value;
730
731 palcon = readl(sfb->regs + WPALCON);
732 writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
733
Ben Dooks50a55032010-08-10 18:02:33 -0700734 if (win->variant.palette_16bpp)
735 writew(value, palreg + (reg * 2));
Ben Dooksec549a02009-03-31 15:25:39 -0700736 else
Ben Dooks50a55032010-08-10 18:02:33 -0700737 writel(value, palreg + (reg * 4));
Ben Dooksec549a02009-03-31 15:25:39 -0700738
739 writel(palcon, sfb->regs + WPALCON);
740}
741
742static inline unsigned int chan_to_field(unsigned int chan,
743 struct fb_bitfield *bf)
744{
745 chan &= 0xffff;
746 chan >>= 16 - bf->length;
747 return chan << bf->offset;
748}
749
750/**
751 * s3c_fb_setcolreg() - framebuffer layer request to change palette.
752 * @regno: The palette index to change.
753 * @red: The red field for the palette data.
754 * @green: The green field for the palette data.
755 * @blue: The blue field for the palette data.
756 * @trans: The transparency (alpha) field for the palette data.
757 * @info: The framebuffer being changed.
758 */
759static int s3c_fb_setcolreg(unsigned regno,
760 unsigned red, unsigned green, unsigned blue,
761 unsigned transp, struct fb_info *info)
762{
763 struct s3c_fb_win *win = info->par;
764 struct s3c_fb *sfb = win->parent;
765 unsigned int val;
766
767 dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
768 __func__, win->index, regno, red, green, blue);
769
Mark Brown5751b232011-12-27 14:16:11 +0000770 pm_runtime_get_sync(sfb->dev);
771
Ben Dooksec549a02009-03-31 15:25:39 -0700772 switch (info->fix.visual) {
773 case FB_VISUAL_TRUECOLOR:
774 /* true-colour, use pseudo-palette */
775
776 if (regno < 16) {
777 u32 *pal = info->pseudo_palette;
778
779 val = chan_to_field(red, &info->var.red);
780 val |= chan_to_field(green, &info->var.green);
781 val |= chan_to_field(blue, &info->var.blue);
782
783 pal[regno] = val;
784 }
785 break;
786
787 case FB_VISUAL_PSEUDOCOLOR:
Ben Dooks50a55032010-08-10 18:02:33 -0700788 if (regno < win->variant.palette_sz) {
Ben Dooksec549a02009-03-31 15:25:39 -0700789 val = chan_to_field(red, &win->palette.r);
790 val |= chan_to_field(green, &win->palette.g);
791 val |= chan_to_field(blue, &win->palette.b);
792
793 s3c_fb_update_palette(sfb, win, regno, val);
794 }
795
796 break;
797
798 default:
Mark Brown5751b232011-12-27 14:16:11 +0000799 pm_runtime_put_sync(sfb->dev);
Ben Dooksec549a02009-03-31 15:25:39 -0700800 return 1; /* unknown type */
801 }
802
Mark Brown5751b232011-12-27 14:16:11 +0000803 pm_runtime_put_sync(sfb->dev);
Ben Dooksec549a02009-03-31 15:25:39 -0700804 return 0;
805}
806
807/**
Ben Dooksec549a02009-03-31 15:25:39 -0700808 * s3c_fb_blank() - blank or unblank the given window
809 * @blank_mode: The blank state from FB_BLANK_*
810 * @info: The framebuffer to blank.
811 *
812 * Framebuffer layer request to change the power state.
813 */
814static int s3c_fb_blank(int blank_mode, struct fb_info *info)
815{
816 struct s3c_fb_win *win = info->par;
817 struct s3c_fb *sfb = win->parent;
818 unsigned int index = win->index;
819 u32 wincon;
820
821 dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
822
Mark Brown5751b232011-12-27 14:16:11 +0000823 pm_runtime_get_sync(sfb->dev);
824
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700825 wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
Ben Dooksec549a02009-03-31 15:25:39 -0700826
827 switch (blank_mode) {
828 case FB_BLANK_POWERDOWN:
829 wincon &= ~WINCONx_ENWIN;
830 sfb->enabled &= ~(1 << index);
831 /* fall through to FB_BLANK_NORMAL */
832
833 case FB_BLANK_NORMAL:
834 /* disable the DMA and display 0x0 (black) */
Jingoo Hanff8c9102011-12-08 18:08:00 +0900835 shadow_protect_win(win, 1);
Ben Dooksec549a02009-03-31 15:25:39 -0700836 writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700837 sfb->regs + sfb->variant.winmap + (index * 4));
Jingoo Hanff8c9102011-12-08 18:08:00 +0900838 shadow_protect_win(win, 0);
Ben Dooksec549a02009-03-31 15:25:39 -0700839 break;
840
841 case FB_BLANK_UNBLANK:
Jingoo Hanff8c9102011-12-08 18:08:00 +0900842 shadow_protect_win(win, 1);
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700843 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
Jingoo Hanff8c9102011-12-08 18:08:00 +0900844 shadow_protect_win(win, 0);
Ben Dooksec549a02009-03-31 15:25:39 -0700845 wincon |= WINCONx_ENWIN;
846 sfb->enabled |= (1 << index);
847 break;
848
849 case FB_BLANK_VSYNC_SUSPEND:
850 case FB_BLANK_HSYNC_SUSPEND:
851 default:
Mark Brown5751b232011-12-27 14:16:11 +0000852 pm_runtime_put_sync(sfb->dev);
Ben Dooksec549a02009-03-31 15:25:39 -0700853 return 1;
854 }
855
Jingoo Hanff8c9102011-12-08 18:08:00 +0900856 shadow_protect_win(win, 1);
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700857 writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
Jingoo Hanff8c9102011-12-08 18:08:00 +0900858 shadow_protect_win(win, 0);
Ben Dooksec549a02009-03-31 15:25:39 -0700859
860 /* Check the enabled state to see if we need to be running the
861 * main LCD interface, as if there are no active windows then
862 * it is highly likely that we also do not need to output
863 * anything.
864 */
865
866 /* We could do something like the following code, but the current
867 * system of using framebuffer events means that we cannot make
868 * the distinction between just window 0 being inactive and all
869 * the windows being down.
870 *
871 * s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
872 */
873
874 /* we're stuck with this until we can do something about overriding
875 * the power control using the blanking event for a single fb.
876 */
Jingoo Hanff8c9102011-12-08 18:08:00 +0900877 if (index == sfb->pdata->default_win) {
878 shadow_protect_win(win, 1);
Ben Dooksec549a02009-03-31 15:25:39 -0700879 s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
Jingoo Hanff8c9102011-12-08 18:08:00 +0900880 shadow_protect_win(win, 0);
881 }
Ben Dooksec549a02009-03-31 15:25:39 -0700882
Mark Brown5751b232011-12-27 14:16:11 +0000883 pm_runtime_put_sync(sfb->dev);
884
Ben Dooksec549a02009-03-31 15:25:39 -0700885 return 0;
886}
887
Pawel Osciak067b2262010-08-10 18:02:38 -0700888/**
889 * s3c_fb_pan_display() - Pan the display.
890 *
891 * Note that the offsets can be written to the device at any time, as their
892 * values are latched at each vsync automatically. This also means that only
893 * the last call to this function will have any effect on next vsync, but
894 * there is no need to sleep waiting for it to prevent tearing.
895 *
896 * @var: The screen information to verify.
897 * @info: The framebuffer device.
898 */
899static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
900 struct fb_info *info)
901{
902 struct s3c_fb_win *win = info->par;
903 struct s3c_fb *sfb = win->parent;
904 void __iomem *buf = sfb->regs + win->index * 8;
905 unsigned int start_boff, end_boff;
906
Mark Brown5751b232011-12-27 14:16:11 +0000907 pm_runtime_get_sync(sfb->dev);
908
Pawel Osciak067b2262010-08-10 18:02:38 -0700909 /* Offset in bytes to the start of the displayed area */
910 start_boff = var->yoffset * info->fix.line_length;
911 /* X offset depends on the current bpp */
912 if (info->var.bits_per_pixel >= 8) {
913 start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
914 } else {
915 switch (info->var.bits_per_pixel) {
916 case 4:
917 start_boff += var->xoffset >> 1;
918 break;
919 case 2:
920 start_boff += var->xoffset >> 2;
921 break;
922 case 1:
923 start_boff += var->xoffset >> 3;
924 break;
925 default:
926 dev_err(sfb->dev, "invalid bpp\n");
Mark Brown5751b232011-12-27 14:16:11 +0000927 pm_runtime_put_sync(sfb->dev);
Pawel Osciak067b2262010-08-10 18:02:38 -0700928 return -EINVAL;
929 }
930 }
931 /* Offset in bytes to the end of the displayed area */
Laurent Pinchartd8e7a742011-05-25 11:34:52 +0200932 end_boff = start_boff + info->var.yres * info->fix.line_length;
Pawel Osciak067b2262010-08-10 18:02:38 -0700933
934 /* Temporarily turn off per-vsync update from shadow registers until
935 * both start and end addresses are updated to prevent corruption */
Pawel Osciakf5ec5462010-08-10 18:02:40 -0700936 shadow_protect_win(win, 1);
Pawel Osciak067b2262010-08-10 18:02:38 -0700937
938 writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
939 writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
940
Pawel Osciakf5ec5462010-08-10 18:02:40 -0700941 shadow_protect_win(win, 0);
Pawel Osciak067b2262010-08-10 18:02:38 -0700942
Mark Brown5751b232011-12-27 14:16:11 +0000943 pm_runtime_put_sync(sfb->dev);
Pawel Osciak067b2262010-08-10 18:02:38 -0700944 return 0;
945}
946
Pawel Osciakefdc8462010-08-10 18:02:38 -0700947/**
948 * s3c_fb_enable_irq() - enable framebuffer interrupts
949 * @sfb: main hardware state
950 */
951static void s3c_fb_enable_irq(struct s3c_fb *sfb)
952{
953 void __iomem *regs = sfb->regs;
954 u32 irq_ctrl_reg;
955
956 if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
957 /* IRQ disabled, enable it */
958 irq_ctrl_reg = readl(regs + VIDINTCON0);
959
960 irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
961 irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
962
963 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
964 irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
965 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
966 irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
967
968 writel(irq_ctrl_reg, regs + VIDINTCON0);
969 }
970}
971
972/**
973 * s3c_fb_disable_irq() - disable framebuffer interrupts
974 * @sfb: main hardware state
975 */
976static void s3c_fb_disable_irq(struct s3c_fb *sfb)
977{
978 void __iomem *regs = sfb->regs;
979 u32 irq_ctrl_reg;
980
981 if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
982 /* IRQ enabled, disable it */
983 irq_ctrl_reg = readl(regs + VIDINTCON0);
984
985 irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
986 irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
987
988 writel(irq_ctrl_reg, regs + VIDINTCON0);
989 }
990}
991
992static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
993{
994 struct s3c_fb *sfb = dev_id;
995 void __iomem *regs = sfb->regs;
996 u32 irq_sts_reg;
997
Jingoo Hanb07f3bbe2011-04-11 07:25:37 +0000998 spin_lock(&sfb->slock);
999
Pawel Osciakefdc8462010-08-10 18:02:38 -07001000 irq_sts_reg = readl(regs + VIDINTCON1);
1001
1002 if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
1003
1004 /* VSYNC interrupt, accept it */
1005 writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
1006
1007 sfb->vsync_info.count++;
1008 wake_up_interruptible(&sfb->vsync_info.wait);
1009 }
1010
1011 /* We only support waiting for VSYNC for now, so it's safe
1012 * to always disable irqs here.
1013 */
1014 s3c_fb_disable_irq(sfb);
1015
Jingoo Hanb07f3bbe2011-04-11 07:25:37 +00001016 spin_unlock(&sfb->slock);
Pawel Osciakefdc8462010-08-10 18:02:38 -07001017 return IRQ_HANDLED;
1018}
1019
1020/**
1021 * s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
1022 * @sfb: main hardware state
1023 * @crtc: head index.
1024 */
1025static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
1026{
1027 unsigned long count;
1028 int ret;
1029
1030 if (crtc != 0)
1031 return -ENODEV;
1032
Mark Brown5751b232011-12-27 14:16:11 +00001033 pm_runtime_get_sync(sfb->dev);
1034
Pawel Osciakefdc8462010-08-10 18:02:38 -07001035 count = sfb->vsync_info.count;
1036 s3c_fb_enable_irq(sfb);
1037 ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
1038 count != sfb->vsync_info.count,
1039 msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
Mark Brown5751b232011-12-27 14:16:11 +00001040
1041 pm_runtime_put_sync(sfb->dev);
1042
Pawel Osciakefdc8462010-08-10 18:02:38 -07001043 if (ret == 0)
1044 return -ETIMEDOUT;
1045
1046 return 0;
1047}
1048
1049static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
1050 unsigned long arg)
1051{
1052 struct s3c_fb_win *win = info->par;
1053 struct s3c_fb *sfb = win->parent;
1054 int ret;
1055 u32 crtc;
1056
1057 switch (cmd) {
1058 case FBIO_WAITFORVSYNC:
1059 if (get_user(crtc, (u32 __user *)arg)) {
1060 ret = -EFAULT;
1061 break;
1062 }
1063
1064 ret = s3c_fb_wait_for_vsync(sfb, crtc);
1065 break;
1066 default:
1067 ret = -ENOTTY;
1068 }
1069
1070 return ret;
1071}
1072
Ben Dooksec549a02009-03-31 15:25:39 -07001073static struct fb_ops s3c_fb_ops = {
1074 .owner = THIS_MODULE,
1075 .fb_check_var = s3c_fb_check_var,
1076 .fb_set_par = s3c_fb_set_par,
1077 .fb_blank = s3c_fb_blank,
1078 .fb_setcolreg = s3c_fb_setcolreg,
1079 .fb_fillrect = cfb_fillrect,
1080 .fb_copyarea = cfb_copyarea,
1081 .fb_imageblit = cfb_imageblit,
Pawel Osciak067b2262010-08-10 18:02:38 -07001082 .fb_pan_display = s3c_fb_pan_display,
Pawel Osciakefdc8462010-08-10 18:02:38 -07001083 .fb_ioctl = s3c_fb_ioctl,
Ben Dooksec549a02009-03-31 15:25:39 -07001084};
1085
1086/**
Maurus Cuelenaere2bb567a2010-08-10 18:02:44 -07001087 * s3c_fb_missing_pixclock() - calculates pixel clock
1088 * @mode: The video mode to change.
1089 *
1090 * Calculate the pixel clock when none has been given through platform data.
1091 */
1092static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
1093{
1094 u64 pixclk = 1000000000000ULL;
1095 u32 div;
1096
1097 div = mode->left_margin + mode->hsync_len + mode->right_margin +
1098 mode->xres;
1099 div *= mode->upper_margin + mode->vsync_len + mode->lower_margin +
1100 mode->yres;
1101 div *= mode->refresh ? : 60;
1102
1103 do_div(pixclk, div);
1104
1105 mode->pixclock = pixclk;
1106}
1107
1108/**
Ben Dooksec549a02009-03-31 15:25:39 -07001109 * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1110 * @sfb: The base resources for the hardware.
1111 * @win: The window to initialise memory for.
1112 *
1113 * Allocate memory for the given framebuffer.
1114 */
1115static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1116 struct s3c_fb_win *win)
1117{
1118 struct s3c_fb_pd_win *windata = win->windata;
1119 unsigned int real_size, virt_size, size;
1120 struct fb_info *fbi = win->fbinfo;
1121 dma_addr_t map_dma;
1122
1123 dev_dbg(sfb->dev, "allocating memory for display\n");
1124
1125 real_size = windata->win_mode.xres * windata->win_mode.yres;
1126 virt_size = windata->virtual_x * windata->virtual_y;
1127
1128 dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1129 real_size, windata->win_mode.xres, windata->win_mode.yres,
1130 virt_size, windata->virtual_x, windata->virtual_y);
1131
1132 size = (real_size > virt_size) ? real_size : virt_size;
1133 size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1134 size /= 8;
1135
1136 fbi->fix.smem_len = size;
1137 size = PAGE_ALIGN(size);
1138
1139 dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1140
1141 fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1142 &map_dma, GFP_KERNEL);
1143 if (!fbi->screen_base)
1144 return -ENOMEM;
1145
1146 dev_dbg(sfb->dev, "mapped %x to %p\n",
1147 (unsigned int)map_dma, fbi->screen_base);
1148
1149 memset(fbi->screen_base, 0x0, size);
1150 fbi->fix.smem_start = map_dma;
1151
1152 return 0;
1153}
1154
1155/**
1156 * s3c_fb_free_memory() - free the display memory for the given window
1157 * @sfb: The base resources for the hardware.
1158 * @win: The window to free the display memory for.
1159 *
1160 * Free the display memory allocated by s3c_fb_alloc_memory().
1161 */
1162static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1163{
1164 struct fb_info *fbi = win->fbinfo;
1165
Pawel Osciakcd7d7e02010-08-10 18:02:35 -07001166 if (fbi->screen_base)
1167 dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
Ben Dooksec549a02009-03-31 15:25:39 -07001168 fbi->screen_base, fbi->fix.smem_start);
1169}
1170
1171/**
1172 * s3c_fb_release_win() - release resources for a framebuffer window.
1173 * @win: The window to cleanup the resources for.
1174 *
1175 * Release the resources that where claimed for the hardware window,
1176 * such as the framebuffer instance and any memory claimed for it.
1177 */
1178static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1179{
Pawel Osciak04ab9ef2010-08-10 18:02:43 -07001180 u32 data;
1181
Krzysztof Heltddc518d2009-06-16 15:34:33 -07001182 if (win->fbinfo) {
Pawel Osciak04ab9ef2010-08-10 18:02:43 -07001183 if (sfb->variant.has_shadowcon) {
1184 data = readl(sfb->regs + SHADOWCON);
1185 data &= ~SHADOWCON_CHx_ENABLE(win->index);
1186 data &= ~SHADOWCON_CHx_LOCAL_ENABLE(win->index);
1187 writel(data, sfb->regs + SHADOWCON);
1188 }
Krzysztof Heltddc518d2009-06-16 15:34:33 -07001189 unregister_framebuffer(win->fbinfo);
Pawel Osciakcd7d7e02010-08-10 18:02:35 -07001190 if (win->fbinfo->cmap.len)
1191 fb_dealloc_cmap(&win->fbinfo->cmap);
Krzysztof Heltddc518d2009-06-16 15:34:33 -07001192 s3c_fb_free_memory(sfb, win);
1193 framebuffer_release(win->fbinfo);
1194 }
Ben Dooksec549a02009-03-31 15:25:39 -07001195}
1196
1197/**
1198 * s3c_fb_probe_win() - register an hardware window
1199 * @sfb: The base resources for the hardware
Ben Dooks50a55032010-08-10 18:02:33 -07001200 * @variant: The variant information for this window.
Ben Dooksec549a02009-03-31 15:25:39 -07001201 * @res: Pointer to where to place the resultant window.
1202 *
1203 * Allocate and do the basic initialisation for one of the hardware's graphics
1204 * windows.
1205 */
1206static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
Ben Dooks50a55032010-08-10 18:02:33 -07001207 struct s3c_fb_win_variant *variant,
Ben Dooksec549a02009-03-31 15:25:39 -07001208 struct s3c_fb_win **res)
1209{
1210 struct fb_var_screeninfo *var;
1211 struct fb_videomode *initmode;
1212 struct s3c_fb_pd_win *windata;
1213 struct s3c_fb_win *win;
1214 struct fb_info *fbinfo;
1215 int palette_size;
1216 int ret;
1217
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001218 dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
Ben Dooksec549a02009-03-31 15:25:39 -07001219
Pawel Osciakefdc8462010-08-10 18:02:38 -07001220 init_waitqueue_head(&sfb->vsync_info.wait);
1221
Ben Dooks50a55032010-08-10 18:02:33 -07001222 palette_size = variant->palette_sz * 4;
Ben Dooksec549a02009-03-31 15:25:39 -07001223
1224 fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1225 palette_size * sizeof(u32), sfb->dev);
1226 if (!fbinfo) {
1227 dev_err(sfb->dev, "failed to allocate framebuffer\n");
1228 return -ENOENT;
1229 }
1230
1231 windata = sfb->pdata->win[win_no];
1232 initmode = &windata->win_mode;
1233
1234 WARN_ON(windata->max_bpp == 0);
1235 WARN_ON(windata->win_mode.xres == 0);
1236 WARN_ON(windata->win_mode.yres == 0);
1237
1238 win = fbinfo->par;
Pawel Osciakcd7d7e02010-08-10 18:02:35 -07001239 *res = win;
Ben Dooksec549a02009-03-31 15:25:39 -07001240 var = &fbinfo->var;
Ben Dooks50a55032010-08-10 18:02:33 -07001241 win->variant = *variant;
Ben Dooksec549a02009-03-31 15:25:39 -07001242 win->fbinfo = fbinfo;
1243 win->parent = sfb;
1244 win->windata = windata;
1245 win->index = win_no;
1246 win->palette_buffer = (u32 *)(win + 1);
1247
1248 ret = s3c_fb_alloc_memory(sfb, win);
1249 if (ret) {
1250 dev_err(sfb->dev, "failed to allocate display memory\n");
Krzysztof Heltddc518d2009-06-16 15:34:33 -07001251 return ret;
Ben Dooksec549a02009-03-31 15:25:39 -07001252 }
1253
1254 /* setup the r/b/g positions for the window's palette */
Ben Dooksbc2da1b2010-08-10 18:02:34 -07001255 if (win->variant.palette_16bpp) {
1256 /* Set RGB 5:6:5 as default */
1257 win->palette.r.offset = 11;
1258 win->palette.r.length = 5;
1259 win->palette.g.offset = 5;
1260 win->palette.g.length = 6;
1261 win->palette.b.offset = 0;
1262 win->palette.b.length = 5;
1263
1264 } else {
1265 /* Set 8bpp or 8bpp and 1bit alpha */
1266 win->palette.r.offset = 16;
1267 win->palette.r.length = 8;
1268 win->palette.g.offset = 8;
1269 win->palette.g.length = 8;
1270 win->palette.b.offset = 0;
1271 win->palette.b.length = 8;
1272 }
Ben Dooksec549a02009-03-31 15:25:39 -07001273
1274 /* setup the initial video mode from the window */
1275 fb_videomode_to_var(&fbinfo->var, initmode);
1276
1277 fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
1278 fbinfo->fix.accel = FB_ACCEL_NONE;
1279 fbinfo->var.activate = FB_ACTIVATE_NOW;
1280 fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
1281 fbinfo->var.bits_per_pixel = windata->default_bpp;
1282 fbinfo->fbops = &s3c_fb_ops;
1283 fbinfo->flags = FBINFO_FLAG_DEFAULT;
1284 fbinfo->pseudo_palette = &win->pseudo_palette;
1285
1286 /* prepare to actually start the framebuffer */
1287
1288 ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1289 if (ret < 0) {
1290 dev_err(sfb->dev, "check_var failed on initial video params\n");
Krzysztof Heltddc518d2009-06-16 15:34:33 -07001291 return ret;
Ben Dooksec549a02009-03-31 15:25:39 -07001292 }
1293
1294 /* create initial colour map */
1295
Ben Dooks50a55032010-08-10 18:02:33 -07001296 ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
Ben Dooksec549a02009-03-31 15:25:39 -07001297 if (ret == 0)
1298 fb_set_cmap(&fbinfo->cmap, fbinfo);
1299 else
1300 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1301
1302 s3c_fb_set_par(fbinfo);
1303
1304 dev_dbg(sfb->dev, "about to register framebuffer\n");
1305
1306 /* run the check_var and set_par on our configuration. */
1307
1308 ret = register_framebuffer(fbinfo);
1309 if (ret < 0) {
1310 dev_err(sfb->dev, "failed to register framebuffer\n");
Krzysztof Heltddc518d2009-06-16 15:34:33 -07001311 return ret;
Ben Dooksec549a02009-03-31 15:25:39 -07001312 }
1313
Ben Dooksec549a02009-03-31 15:25:39 -07001314 dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1315
1316 return 0;
Ben Dooksec549a02009-03-31 15:25:39 -07001317}
1318
1319/**
1320 * s3c_fb_clear_win() - clear hardware window registers.
1321 * @sfb: The base resources for the hardware.
1322 * @win: The window to process.
1323 *
1324 * Reset the specific window registers to a known state.
1325 */
1326static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1327{
1328 void __iomem *regs = sfb->regs;
Pawel Osciaka8bdabc2010-08-10 18:02:41 -07001329 u32 reg;
Ben Dooksec549a02009-03-31 15:25:39 -07001330
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001331 writel(0, regs + sfb->variant.wincon + (win * 4));
1332 writel(0, regs + VIDOSD_A(win, sfb->variant));
1333 writel(0, regs + VIDOSD_B(win, sfb->variant));
1334 writel(0, regs + VIDOSD_C(win, sfb->variant));
Pawel Osciaka8bdabc2010-08-10 18:02:41 -07001335 reg = readl(regs + SHADOWCON);
1336 writel(reg & ~SHADOWCON_WINx_PROTECT(win), regs + SHADOWCON);
Ben Dooksec549a02009-03-31 15:25:39 -07001337}
1338
1339static int __devinit s3c_fb_probe(struct platform_device *pdev)
1340{
Jingoo Hanb73a21fc2011-04-01 07:17:27 +00001341 const struct platform_device_id *platid;
Ben Dooks50a55032010-08-10 18:02:33 -07001342 struct s3c_fb_driverdata *fbdrv;
Ben Dooksec549a02009-03-31 15:25:39 -07001343 struct device *dev = &pdev->dev;
1344 struct s3c_fb_platdata *pd;
1345 struct s3c_fb *sfb;
1346 struct resource *res;
1347 int win;
1348 int ret = 0;
1349
Jingoo Hanb73a21fc2011-04-01 07:17:27 +00001350 platid = platform_get_device_id(pdev);
1351 fbdrv = (struct s3c_fb_driverdata *)platid->driver_data;
Ben Dooks50a55032010-08-10 18:02:33 -07001352
1353 if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1354 dev_err(dev, "too many windows, cannot attach\n");
1355 return -EINVAL;
1356 }
1357
Ben Dooksec549a02009-03-31 15:25:39 -07001358 pd = pdev->dev.platform_data;
1359 if (!pd) {
1360 dev_err(dev, "no platform data specified\n");
1361 return -EINVAL;
1362 }
1363
1364 sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1365 if (!sfb) {
1366 dev_err(dev, "no memory for framebuffers\n");
1367 return -ENOMEM;
1368 }
1369
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001370 dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1371
Ben Dooksec549a02009-03-31 15:25:39 -07001372 sfb->dev = dev;
1373 sfb->pdata = pd;
Ben Dooks50a55032010-08-10 18:02:33 -07001374 sfb->variant = fbdrv->variant;
Ben Dooksec549a02009-03-31 15:25:39 -07001375
Jingoo Hanb07f3bbe2011-04-11 07:25:37 +00001376 spin_lock_init(&sfb->slock);
1377
Ben Dooksec549a02009-03-31 15:25:39 -07001378 sfb->bus_clk = clk_get(dev, "lcd");
1379 if (IS_ERR(sfb->bus_clk)) {
1380 dev_err(dev, "failed to get bus clock\n");
axel lin942b8d02011-02-11 08:51:10 +00001381 ret = PTR_ERR(sfb->bus_clk);
Ben Dooksec549a02009-03-31 15:25:39 -07001382 goto err_sfb;
1383 }
1384
1385 clk_enable(sfb->bus_clk);
1386
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001387 if (!sfb->variant.has_clksel) {
1388 sfb->lcd_clk = clk_get(dev, "sclk_fimd");
1389 if (IS_ERR(sfb->lcd_clk)) {
1390 dev_err(dev, "failed to get lcd clock\n");
1391 ret = PTR_ERR(sfb->lcd_clk);
1392 goto err_bus_clk;
1393 }
1394
1395 clk_enable(sfb->lcd_clk);
1396 }
1397
Jingoo Han49592122010-12-17 16:45:46 +09001398 pm_runtime_enable(sfb->dev);
1399
Ben Dooksec549a02009-03-31 15:25:39 -07001400 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1401 if (!res) {
1402 dev_err(dev, "failed to find registers\n");
1403 ret = -ENOENT;
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001404 goto err_lcd_clk;
Ben Dooksec549a02009-03-31 15:25:39 -07001405 }
1406
1407 sfb->regs_res = request_mem_region(res->start, resource_size(res),
1408 dev_name(dev));
1409 if (!sfb->regs_res) {
1410 dev_err(dev, "failed to claim register region\n");
1411 ret = -ENOENT;
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001412 goto err_lcd_clk;
Ben Dooksec549a02009-03-31 15:25:39 -07001413 }
1414
1415 sfb->regs = ioremap(res->start, resource_size(res));
1416 if (!sfb->regs) {
1417 dev_err(dev, "failed to map registers\n");
1418 ret = -ENXIO;
1419 goto err_req_region;
1420 }
1421
Pawel Osciakefdc8462010-08-10 18:02:38 -07001422 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1423 if (!res) {
1424 dev_err(dev, "failed to acquire irq resource\n");
1425 ret = -ENOENT;
1426 goto err_ioremap;
1427 }
1428 sfb->irq_no = res->start;
1429 ret = request_irq(sfb->irq_no, s3c_fb_irq,
1430 0, "s3c_fb", sfb);
1431 if (ret) {
1432 dev_err(dev, "irq request failed\n");
1433 goto err_ioremap;
1434 }
1435
Ben Dooksec549a02009-03-31 15:25:39 -07001436 dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1437
Jingoo Han49592122010-12-17 16:45:46 +09001438 platform_set_drvdata(pdev, sfb);
1439 pm_runtime_get_sync(sfb->dev);
1440
Ben Dooksec549a02009-03-31 15:25:39 -07001441 /* setup gpio and output polarity controls */
1442
1443 pd->setup_gpio();
1444
1445 writel(pd->vidcon1, sfb->regs + VIDCON1);
1446
1447 /* zero all windows before we do anything */
1448
Ben Dooks50a55032010-08-10 18:02:33 -07001449 for (win = 0; win < fbdrv->variant.nr_windows; win++)
Ben Dooksec549a02009-03-31 15:25:39 -07001450 s3c_fb_clear_win(sfb, win);
1451
Ben Dooks94947032010-08-10 18:02:32 -07001452 /* initialise colour key controls */
Ben Dooks50a55032010-08-10 18:02:33 -07001453 for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001454 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1455
1456 regs += (win * 8);
1457 writel(0xffffff, regs + WKEYCON0);
1458 writel(0xffffff, regs + WKEYCON1);
Ben Dooks94947032010-08-10 18:02:32 -07001459 }
1460
Ben Dooksec549a02009-03-31 15:25:39 -07001461 /* we have the register setup, start allocating framebuffers */
1462
Ben Dooks50a55032010-08-10 18:02:33 -07001463 for (win = 0; win < fbdrv->variant.nr_windows; win++) {
Ben Dooksec549a02009-03-31 15:25:39 -07001464 if (!pd->win[win])
1465 continue;
1466
Maurus Cuelenaere2bb567a2010-08-10 18:02:44 -07001467 if (!pd->win[win]->win_mode.pixclock)
1468 s3c_fb_missing_pixclock(&pd->win[win]->win_mode);
1469
Ben Dooks50a55032010-08-10 18:02:33 -07001470 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1471 &sfb->windows[win]);
Ben Dooksec549a02009-03-31 15:25:39 -07001472 if (ret < 0) {
1473 dev_err(dev, "failed to create window %d\n", win);
1474 for (; win >= 0; win--)
1475 s3c_fb_release_win(sfb, sfb->windows[win]);
Mark Brown3500b0b2011-12-27 14:16:09 +00001476 goto err_pm_runtime;
Ben Dooksec549a02009-03-31 15:25:39 -07001477 }
1478 }
1479
1480 platform_set_drvdata(pdev, sfb);
Mark Brownfe05f8b2011-12-27 14:16:07 +00001481 pm_runtime_put_sync(sfb->dev);
Ben Dooksec549a02009-03-31 15:25:39 -07001482
1483 return 0;
1484
Mark Brown3500b0b2011-12-27 14:16:09 +00001485err_pm_runtime:
1486 pm_runtime_put_sync(sfb->dev);
Pawel Osciakefdc8462010-08-10 18:02:38 -07001487 free_irq(sfb->irq_no, sfb);
1488
Ben Dooksec549a02009-03-31 15:25:39 -07001489err_ioremap:
1490 iounmap(sfb->regs);
1491
1492err_req_region:
Julia Lawall683e7cd2011-04-22 20:11:21 +00001493 release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
Ben Dooksec549a02009-03-31 15:25:39 -07001494
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001495err_lcd_clk:
Mark Brown3500b0b2011-12-27 14:16:09 +00001496 pm_runtime_disable(sfb->dev);
1497
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001498 if (!sfb->variant.has_clksel) {
1499 clk_disable(sfb->lcd_clk);
1500 clk_put(sfb->lcd_clk);
1501 }
1502
1503err_bus_clk:
Ben Dooksec549a02009-03-31 15:25:39 -07001504 clk_disable(sfb->bus_clk);
1505 clk_put(sfb->bus_clk);
1506
1507err_sfb:
1508 kfree(sfb);
1509 return ret;
1510}
1511
1512/**
1513 * s3c_fb_remove() - Cleanup on module finalisation
1514 * @pdev: The platform device we are bound to.
1515 *
1516 * Shutdown and then release all the resources that the driver allocated
1517 * on initialisation.
1518 */
1519static int __devexit s3c_fb_remove(struct platform_device *pdev)
1520{
1521 struct s3c_fb *sfb = platform_get_drvdata(pdev);
1522 int win;
1523
Mark Brownfe05f8b2011-12-27 14:16:07 +00001524 pm_runtime_get_sync(sfb->dev);
1525
Pawel Osciakc42b1102009-07-29 15:02:10 -07001526 for (win = 0; win < S3C_FB_MAX_WIN; win++)
Marek Szyprowski17663e52009-05-28 14:34:35 -07001527 if (sfb->windows[win])
1528 s3c_fb_release_win(sfb, sfb->windows[win]);
Ben Dooksec549a02009-03-31 15:25:39 -07001529
Pawel Osciakefdc8462010-08-10 18:02:38 -07001530 free_irq(sfb->irq_no, sfb);
1531
Ben Dooksec549a02009-03-31 15:25:39 -07001532 iounmap(sfb->regs);
1533
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001534 if (!sfb->variant.has_clksel) {
1535 clk_disable(sfb->lcd_clk);
1536 clk_put(sfb->lcd_clk);
1537 }
1538
Ben Dooksec549a02009-03-31 15:25:39 -07001539 clk_disable(sfb->bus_clk);
1540 clk_put(sfb->bus_clk);
1541
Julia Lawall683e7cd2011-04-22 20:11:21 +00001542 release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
Ben Dooksec549a02009-03-31 15:25:39 -07001543
Jingoo Han49592122010-12-17 16:45:46 +09001544 pm_runtime_put_sync(sfb->dev);
1545 pm_runtime_disable(sfb->dev);
1546
Jingoo Han72ba4cb2011-06-09 04:26:31 +00001547 kfree(sfb);
Ben Dooksec549a02009-03-31 15:25:39 -07001548 return 0;
1549}
1550
Mark Brownf4f51472011-12-27 14:16:10 +00001551#ifdef CONFIG_PM_SLEEP
Jingoo Han49592122010-12-17 16:45:46 +09001552static int s3c_fb_suspend(struct device *dev)
Ben Dooksec549a02009-03-31 15:25:39 -07001553{
Jingoo Han49592122010-12-17 16:45:46 +09001554 struct platform_device *pdev = to_platform_device(dev);
Ben Dooksec549a02009-03-31 15:25:39 -07001555 struct s3c_fb *sfb = platform_get_drvdata(pdev);
1556 struct s3c_fb_win *win;
1557 int win_no;
1558
Pawel Osciakc42b1102009-07-29 15:02:10 -07001559 for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
Ben Dooksec549a02009-03-31 15:25:39 -07001560 win = sfb->windows[win_no];
1561 if (!win)
1562 continue;
1563
1564 /* use the blank function to push into power-down */
1565 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1566 }
1567
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001568 if (!sfb->variant.has_clksel)
1569 clk_disable(sfb->lcd_clk);
1570
Ben Dooksec549a02009-03-31 15:25:39 -07001571 clk_disable(sfb->bus_clk);
1572 return 0;
1573}
1574
Jingoo Han49592122010-12-17 16:45:46 +09001575static int s3c_fb_resume(struct device *dev)
Ben Dooksec549a02009-03-31 15:25:39 -07001576{
Jingoo Han49592122010-12-17 16:45:46 +09001577 struct platform_device *pdev = to_platform_device(dev);
Ben Dooksec549a02009-03-31 15:25:39 -07001578 struct s3c_fb *sfb = platform_get_drvdata(pdev);
Marek Szyprowski17663e52009-05-28 14:34:35 -07001579 struct s3c_fb_platdata *pd = sfb->pdata;
Ben Dooksec549a02009-03-31 15:25:39 -07001580 struct s3c_fb_win *win;
1581 int win_no;
1582
1583 clk_enable(sfb->bus_clk);
1584
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001585 if (!sfb->variant.has_clksel)
1586 clk_enable(sfb->lcd_clk);
1587
Jingoo Han6aa96812011-05-24 08:55:31 +00001588 /* setup gpio and output polarity controls */
1589 pd->setup_gpio();
Marek Szyprowski17663e52009-05-28 14:34:35 -07001590 writel(pd->vidcon1, sfb->regs + VIDCON1);
1591
1592 /* zero all windows before we do anything */
Ben Dooks50a55032010-08-10 18:02:33 -07001593 for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
Marek Szyprowski17663e52009-05-28 14:34:35 -07001594 s3c_fb_clear_win(sfb, win_no);
1595
Ben Dooks50a55032010-08-10 18:02:33 -07001596 for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001597 void __iomem *regs = sfb->regs + sfb->variant.keycon;
Jingoo Hanff8c9102011-12-08 18:08:00 +09001598 win = sfb->windows[win_no];
1599 if (!win)
1600 continue;
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001601
Jingoo Hanff8c9102011-12-08 18:08:00 +09001602 shadow_protect_win(win, 1);
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001603 regs += (win_no * 8);
1604 writel(0xffffff, regs + WKEYCON0);
1605 writel(0xffffff, regs + WKEYCON1);
Jingoo Hanff8c9102011-12-08 18:08:00 +09001606 shadow_protect_win(win, 0);
Ben Dooks94947032010-08-10 18:02:32 -07001607 }
1608
Marek Szyprowski17663e52009-05-28 14:34:35 -07001609 /* restore framebuffers */
Ben Dooksec549a02009-03-31 15:25:39 -07001610 for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1611 win = sfb->windows[win_no];
1612 if (!win)
1613 continue;
1614
1615 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1616 s3c_fb_set_par(win->fbinfo);
1617 }
1618
1619 return 0;
1620}
Ben Dooksec549a02009-03-31 15:25:39 -07001621#endif
1622
Mark Brownf4f51472011-12-27 14:16:10 +00001623#ifdef CONFIG_PM_RUNTIME
1624static int s3c_fb_runtime_suspend(struct device *dev)
1625{
1626 struct platform_device *pdev = to_platform_device(dev);
1627 struct s3c_fb *sfb = platform_get_drvdata(pdev);
1628
1629 if (!sfb->variant.has_clksel)
1630 clk_disable(sfb->lcd_clk);
1631
1632 clk_disable(sfb->bus_clk);
1633
1634 return 0;
1635}
1636
1637static int s3c_fb_runtime_resume(struct device *dev)
1638{
1639 struct platform_device *pdev = to_platform_device(dev);
1640 struct s3c_fb *sfb = platform_get_drvdata(pdev);
1641 struct s3c_fb_platdata *pd = sfb->pdata;
1642
1643 clk_enable(sfb->bus_clk);
1644
1645 if (!sfb->variant.has_clksel)
1646 clk_enable(sfb->lcd_clk);
1647
1648 /* setup gpio and output polarity controls */
1649 pd->setup_gpio();
1650 writel(pd->vidcon1, sfb->regs + VIDCON1);
1651
1652 return 0;
1653}
1654#endif
Ben Dooks50a55032010-08-10 18:02:33 -07001655
1656#define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1657#define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1658
Marek Szyprowski8cfdcb22010-08-10 18:02:42 -07001659static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
Ben Dooks50a55032010-08-10 18:02:33 -07001660 [0] = {
1661 .has_osd_c = 1,
Pawel Osciakf676ec22010-08-10 18:02:40 -07001662 .osd_size_off = 0x8,
Ben Dooks50a55032010-08-10 18:02:33 -07001663 .palette_sz = 256,
Jingoo Hancd74eba2011-04-22 07:09:40 +00001664 .valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1665 VALID_BPP(18) | VALID_BPP(24)),
Ben Dooks50a55032010-08-10 18:02:33 -07001666 },
1667 [1] = {
1668 .has_osd_c = 1,
1669 .has_osd_d = 1,
Jingoo Hanc9d503e2011-04-22 07:09:31 +00001670 .osd_size_off = 0xc,
Pawel Osciakf676ec22010-08-10 18:02:40 -07001671 .has_osd_alpha = 1,
Ben Dooks50a55032010-08-10 18:02:33 -07001672 .palette_sz = 256,
1673 .valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1674 VALID_BPP(18) | VALID_BPP(19) |
Jingoo Hancd74eba2011-04-22 07:09:40 +00001675 VALID_BPP(24) | VALID_BPP(25) |
1676 VALID_BPP(28)),
Ben Dooks50a55032010-08-10 18:02:33 -07001677 },
1678 [2] = {
1679 .has_osd_c = 1,
1680 .has_osd_d = 1,
Jingoo Hanc9d503e2011-04-22 07:09:31 +00001681 .osd_size_off = 0xc,
Pawel Osciakf676ec22010-08-10 18:02:40 -07001682 .has_osd_alpha = 1,
Ben Dooks50a55032010-08-10 18:02:33 -07001683 .palette_sz = 16,
1684 .palette_16bpp = 1,
1685 .valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1686 VALID_BPP(18) | VALID_BPP(19) |
Jingoo Hancd74eba2011-04-22 07:09:40 +00001687 VALID_BPP(24) | VALID_BPP(25) |
1688 VALID_BPP(28)),
Ben Dooks50a55032010-08-10 18:02:33 -07001689 },
1690 [3] = {
1691 .has_osd_c = 1,
Pawel Osciakf676ec22010-08-10 18:02:40 -07001692 .has_osd_alpha = 1,
Ben Dooks50a55032010-08-10 18:02:33 -07001693 .palette_sz = 16,
1694 .palette_16bpp = 1,
1695 .valid_bpp = (VALID_BPP124 | VALID_BPP(16) |
1696 VALID_BPP(18) | VALID_BPP(19) |
Jingoo Hancd74eba2011-04-22 07:09:40 +00001697 VALID_BPP(24) | VALID_BPP(25) |
1698 VALID_BPP(28)),
Ben Dooks50a55032010-08-10 18:02:33 -07001699 },
1700 [4] = {
1701 .has_osd_c = 1,
Pawel Osciakf676ec22010-08-10 18:02:40 -07001702 .has_osd_alpha = 1,
Ben Dooks50a55032010-08-10 18:02:33 -07001703 .palette_sz = 4,
1704 .palette_16bpp = 1,
1705 .valid_bpp = (VALID_BPP(1) | VALID_BPP(2) |
1706 VALID_BPP(16) | VALID_BPP(18) |
Jingoo Hancd74eba2011-04-22 07:09:40 +00001707 VALID_BPP(19) | VALID_BPP(24) |
1708 VALID_BPP(25) | VALID_BPP(28)),
Ben Dooks50a55032010-08-10 18:02:33 -07001709 },
1710};
1711
Jingoo Hanaf4a8352011-04-22 07:09:48 +00001712static struct s3c_fb_win_variant s3c_fb_data_s5p_wins[] = {
1713 [0] = {
1714 .has_osd_c = 1,
1715 .osd_size_off = 0x8,
1716 .palette_sz = 256,
1717 .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1718 VALID_BPP(15) | VALID_BPP(16) |
1719 VALID_BPP(18) | VALID_BPP(19) |
1720 VALID_BPP(24) | VALID_BPP(25) |
1721 VALID_BPP(32)),
1722 },
1723 [1] = {
1724 .has_osd_c = 1,
1725 .has_osd_d = 1,
1726 .osd_size_off = 0xc,
1727 .has_osd_alpha = 1,
1728 .palette_sz = 256,
1729 .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1730 VALID_BPP(15) | VALID_BPP(16) |
1731 VALID_BPP(18) | VALID_BPP(19) |
1732 VALID_BPP(24) | VALID_BPP(25) |
1733 VALID_BPP(32)),
1734 },
1735 [2] = {
1736 .has_osd_c = 1,
1737 .has_osd_d = 1,
1738 .osd_size_off = 0xc,
1739 .has_osd_alpha = 1,
1740 .palette_sz = 256,
1741 .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1742 VALID_BPP(15) | VALID_BPP(16) |
1743 VALID_BPP(18) | VALID_BPP(19) |
1744 VALID_BPP(24) | VALID_BPP(25) |
1745 VALID_BPP(32)),
1746 },
1747 [3] = {
1748 .has_osd_c = 1,
1749 .has_osd_alpha = 1,
1750 .palette_sz = 256,
1751 .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1752 VALID_BPP(15) | VALID_BPP(16) |
1753 VALID_BPP(18) | VALID_BPP(19) |
1754 VALID_BPP(24) | VALID_BPP(25) |
1755 VALID_BPP(32)),
1756 },
1757 [4] = {
1758 .has_osd_c = 1,
1759 .has_osd_alpha = 1,
1760 .palette_sz = 256,
1761 .valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1762 VALID_BPP(15) | VALID_BPP(16) |
1763 VALID_BPP(18) | VALID_BPP(19) |
1764 VALID_BPP(24) | VALID_BPP(25) |
1765 VALID_BPP(32)),
1766 },
1767};
1768
Marek Szyprowski8cfdcb22010-08-10 18:02:42 -07001769static struct s3c_fb_driverdata s3c_fb_data_64xx = {
Ben Dooks50a55032010-08-10 18:02:33 -07001770 .variant = {
1771 .nr_windows = 5,
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001772 .vidtcon = VIDTCON0,
1773 .wincon = WINCON(0),
1774 .winmap = WINxMAP(0),
1775 .keycon = WKEYCON,
1776 .osd = VIDOSD_BASE,
1777 .osd_stride = 16,
1778 .buf_start = VIDW_BUF_START(0),
1779 .buf_size = VIDW_BUF_SIZE(0),
1780 .buf_end = VIDW_BUF_END(0),
Ben Dooks50a55032010-08-10 18:02:33 -07001781
1782 .palette = {
1783 [0] = 0x400,
1784 [1] = 0x800,
1785 [2] = 0x300,
1786 [3] = 0x320,
1787 [4] = 0x340,
1788 },
Pawel Osciak067b2262010-08-10 18:02:38 -07001789
1790 .has_prtcon = 1,
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001791 .has_clksel = 1,
Ben Dooks50a55032010-08-10 18:02:33 -07001792 },
1793 .win[0] = &s3c_fb_data_64xx_wins[0],
1794 .win[1] = &s3c_fb_data_64xx_wins[1],
1795 .win[2] = &s3c_fb_data_64xx_wins[2],
1796 .win[3] = &s3c_fb_data_64xx_wins[3],
1797 .win[4] = &s3c_fb_data_64xx_wins[4],
1798};
1799
Marek Szyprowski8cfdcb22010-08-10 18:02:42 -07001800static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
Pawel Osciak4e591ac2010-08-10 18:02:36 -07001801 .variant = {
1802 .nr_windows = 5,
1803 .vidtcon = VIDTCON0,
1804 .wincon = WINCON(0),
1805 .winmap = WINxMAP(0),
1806 .keycon = WKEYCON,
1807 .osd = VIDOSD_BASE,
1808 .osd_stride = 16,
1809 .buf_start = VIDW_BUF_START(0),
1810 .buf_size = VIDW_BUF_SIZE(0),
1811 .buf_end = VIDW_BUF_END(0),
1812
1813 .palette = {
1814 [0] = 0x2400,
1815 [1] = 0x2800,
1816 [2] = 0x2c00,
1817 [3] = 0x3000,
1818 [4] = 0x3400,
1819 },
Pawel Osciak067b2262010-08-10 18:02:38 -07001820
1821 .has_prtcon = 1,
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001822 .has_clksel = 1,
Pawel Osciak4e591ac2010-08-10 18:02:36 -07001823 },
Jingoo Hanaf4a8352011-04-22 07:09:48 +00001824 .win[0] = &s3c_fb_data_s5p_wins[0],
1825 .win[1] = &s3c_fb_data_s5p_wins[1],
1826 .win[2] = &s3c_fb_data_s5p_wins[2],
1827 .win[3] = &s3c_fb_data_s5p_wins[3],
1828 .win[4] = &s3c_fb_data_s5p_wins[4],
Pawel Osciak4e591ac2010-08-10 18:02:36 -07001829};
1830
Marek Szyprowski8cfdcb22010-08-10 18:02:42 -07001831static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
Ben Dooks50a55032010-08-10 18:02:33 -07001832 .variant = {
1833 .nr_windows = 5,
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001834 .vidtcon = VIDTCON0,
1835 .wincon = WINCON(0),
1836 .winmap = WINxMAP(0),
1837 .keycon = WKEYCON,
1838 .osd = VIDOSD_BASE,
1839 .osd_stride = 16,
1840 .buf_start = VIDW_BUF_START(0),
1841 .buf_size = VIDW_BUF_SIZE(0),
1842 .buf_end = VIDW_BUF_END(0),
Ben Dooks50a55032010-08-10 18:02:33 -07001843
1844 .palette = {
1845 [0] = 0x2400,
1846 [1] = 0x2800,
1847 [2] = 0x2c00,
1848 [3] = 0x3000,
1849 [4] = 0x3400,
1850 },
Pawel Osciakf5ec5462010-08-10 18:02:40 -07001851
1852 .has_shadowcon = 1,
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001853 .has_clksel = 1,
1854 },
1855 .win[0] = &s3c_fb_data_s5p_wins[0],
1856 .win[1] = &s3c_fb_data_s5p_wins[1],
1857 .win[2] = &s3c_fb_data_s5p_wins[2],
1858 .win[3] = &s3c_fb_data_s5p_wins[3],
1859 .win[4] = &s3c_fb_data_s5p_wins[4],
1860};
1861
1862static struct s3c_fb_driverdata s3c_fb_data_exynos4 = {
1863 .variant = {
1864 .nr_windows = 5,
1865 .vidtcon = VIDTCON0,
1866 .wincon = WINCON(0),
1867 .winmap = WINxMAP(0),
1868 .keycon = WKEYCON,
1869 .osd = VIDOSD_BASE,
1870 .osd_stride = 16,
1871 .buf_start = VIDW_BUF_START(0),
1872 .buf_size = VIDW_BUF_SIZE(0),
1873 .buf_end = VIDW_BUF_END(0),
1874
1875 .palette = {
1876 [0] = 0x2400,
1877 [1] = 0x2800,
1878 [2] = 0x2c00,
1879 [3] = 0x3000,
1880 [4] = 0x3400,
1881 },
1882
1883 .has_shadowcon = 1,
Ben Dooks50a55032010-08-10 18:02:33 -07001884 },
Jingoo Hanaf4a8352011-04-22 07:09:48 +00001885 .win[0] = &s3c_fb_data_s5p_wins[0],
1886 .win[1] = &s3c_fb_data_s5p_wins[1],
1887 .win[2] = &s3c_fb_data_s5p_wins[2],
1888 .win[3] = &s3c_fb_data_s5p_wins[3],
1889 .win[4] = &s3c_fb_data_s5p_wins[4],
Ben Dooks50a55032010-08-10 18:02:33 -07001890};
1891
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001892/* S3C2443/S3C2416 style hardware */
Marek Szyprowski8cfdcb22010-08-10 18:02:42 -07001893static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001894 .variant = {
1895 .nr_windows = 2,
1896 .is_2443 = 1,
1897
1898 .vidtcon = 0x08,
1899 .wincon = 0x14,
1900 .winmap = 0xd0,
1901 .keycon = 0xb0,
1902 .osd = 0x28,
1903 .osd_stride = 12,
1904 .buf_start = 0x64,
1905 .buf_size = 0x94,
1906 .buf_end = 0x7c,
1907
1908 .palette = {
1909 [0] = 0x400,
1910 [1] = 0x800,
1911 },
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001912 .has_clksel = 1,
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001913 },
1914 .win[0] = &(struct s3c_fb_win_variant) {
1915 .palette_sz = 256,
1916 .valid_bpp = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1917 },
1918 .win[1] = &(struct s3c_fb_win_variant) {
1919 .has_osd_c = 1,
Pawel Osciakf676ec22010-08-10 18:02:40 -07001920 .has_osd_alpha = 1,
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001921 .palette_sz = 256,
1922 .valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1923 VALID_BPP(18) | VALID_BPP(19) |
1924 VALID_BPP(24) | VALID_BPP(25) |
1925 VALID_BPP(28)),
1926 },
1927};
1928
Ajay Kumar21b5a3a2011-09-09 14:00:51 -04001929static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
1930 .variant = {
1931 .nr_windows = 3,
1932 .vidtcon = VIDTCON0,
1933 .wincon = WINCON(0),
1934 .winmap = WINxMAP(0),
1935 .keycon = WKEYCON,
1936 .osd = VIDOSD_BASE,
1937 .osd_stride = 16,
1938 .buf_start = VIDW_BUF_START(0),
1939 .buf_size = VIDW_BUF_SIZE(0),
1940 .buf_end = VIDW_BUF_END(0),
1941
1942 .palette = {
1943 [0] = 0x2400,
1944 [1] = 0x2800,
1945 [2] = 0x2c00,
1946 },
1947 },
1948 .win[0] = &s3c_fb_data_s5p_wins[0],
1949 .win[1] = &s3c_fb_data_s5p_wins[1],
1950 .win[2] = &s3c_fb_data_s5p_wins[2],
1951};
1952
Ben Dooks50a55032010-08-10 18:02:33 -07001953static struct platform_device_id s3c_fb_driver_ids[] = {
1954 {
1955 .name = "s3c-fb",
1956 .driver_data = (unsigned long)&s3c_fb_data_64xx,
1957 }, {
Pawel Osciak4e591ac2010-08-10 18:02:36 -07001958 .name = "s5pc100-fb",
1959 .driver_data = (unsigned long)&s3c_fb_data_s5pc100,
1960 }, {
1961 .name = "s5pv210-fb",
1962 .driver_data = (unsigned long)&s3c_fb_data_s5pv210,
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001963 }, {
Jingoo Hanb5480ed2011-08-22 12:16:04 +09001964 .name = "exynos4-fb",
1965 .driver_data = (unsigned long)&s3c_fb_data_exynos4,
1966 }, {
Ben Dooksc4bb6ff2010-08-10 18:02:34 -07001967 .name = "s3c2443-fb",
1968 .driver_data = (unsigned long)&s3c_fb_data_s3c2443,
Ajay Kumar21b5a3a2011-09-09 14:00:51 -04001969 }, {
1970 .name = "s5p64x0-fb",
1971 .driver_data = (unsigned long)&s3c_fb_data_s5p64x0,
Ben Dooks50a55032010-08-10 18:02:33 -07001972 },
1973 {},
1974};
1975MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1976
Mark Brownf4f51472011-12-27 14:16:10 +00001977static const struct dev_pm_ops s3cfb_pm_ops = {
1978 SET_SYSTEM_SLEEP_PM_OPS(s3c_fb_suspend, s3c_fb_resume)
1979 SET_RUNTIME_PM_OPS(s3c_fb_runtime_suspend, s3c_fb_runtime_resume,
1980 NULL)
1981};
Jingoo Han49592122010-12-17 16:45:46 +09001982
Ben Dooksec549a02009-03-31 15:25:39 -07001983static struct platform_driver s3c_fb_driver = {
1984 .probe = s3c_fb_probe,
Peter Korsgaard3163eaba2009-09-22 16:47:55 -07001985 .remove = __devexit_p(s3c_fb_remove),
Ben Dooks50a55032010-08-10 18:02:33 -07001986 .id_table = s3c_fb_driver_ids,
Ben Dooksec549a02009-03-31 15:25:39 -07001987 .driver = {
1988 .name = "s3c-fb",
1989 .owner = THIS_MODULE,
Mark Brownfe05f8b2011-12-27 14:16:07 +00001990 .pm = &s3cfb_pm_ops,
Ben Dooksec549a02009-03-31 15:25:39 -07001991 },
1992};
1993
Axel Lin4277f2c2011-11-26 10:25:54 +08001994module_platform_driver(s3c_fb_driver);
Ben Dooksec549a02009-03-31 15:25:39 -07001995
1996MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1997MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
1998MODULE_LICENSE("GPL");
1999MODULE_ALIAS("platform:s3c-fb");