Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2010 |
| 3 | * |
| 4 | * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> |
| 5 | * License terms: GNU General Public License (GPL) version 2 |
| 6 | */ |
| 7 | |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/gpio.h> |
| 10 | #include <linux/amba/bus.h> |
| 11 | #include <linux/amba/mmci.h> |
| 12 | #include <linux/mmc/host.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 15 | #include <asm/mach-types.h> |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 16 | #include <plat/ste_dma40.h> |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 17 | #include <mach/devices.h> |
| 18 | #include <mach/hardware.h> |
| 19 | |
Rabin Vincent | fbf1eadf | 2010-09-29 19:46:32 +0530 | [diff] [blame] | 20 | #include "devices-db8500.h" |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 21 | #include "board-mop500.h" |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 22 | #include "ste-dma40-db8500.h" |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 23 | |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 24 | /* |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 25 | * SDI 0 (MicroSD slot) |
| 26 | */ |
| 27 | |
| 28 | /* MMCIPOWER bits */ |
| 29 | #define MCI_DATA2DIREN (1 << 2) |
| 30 | #define MCI_CMDDIREN (1 << 3) |
| 31 | #define MCI_DATA0DIREN (1 << 4) |
| 32 | #define MCI_DATA31DIREN (1 << 5) |
| 33 | #define MCI_FBCLKEN (1 << 7) |
| 34 | |
Linus Walleij | f727a05 | 2011-04-27 12:55:37 +0200 | [diff] [blame^] | 35 | /* GPIO pins used by the sdi0 level shifter */ |
| 36 | static int sdi0_en = -1; |
| 37 | static int sdi0_vsel = -1; |
| 38 | |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 39 | static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd, |
| 40 | unsigned char power_mode) |
| 41 | { |
Linus Walleij | f727a05 | 2011-04-27 12:55:37 +0200 | [diff] [blame^] | 42 | switch (power_mode) { |
| 43 | case MMC_POWER_UP: |
| 44 | case MMC_POWER_ON: |
| 45 | /* |
| 46 | * Level shifter voltage should depend on vdd to when deciding |
| 47 | * on either 1.8V or 2.9V. Once the decision has been made the |
| 48 | * level shifter must be disabled and re-enabled with a changed |
| 49 | * select signal in order to switch the voltage. Since there is |
| 50 | * no framework support yet for indicating 1.8V in vdd, use the |
| 51 | * default 2.9V. |
| 52 | */ |
| 53 | gpio_direction_output(sdi0_vsel, 0); |
| 54 | gpio_direction_output(sdi0_en, 1); |
| 55 | break; |
| 56 | case MMC_POWER_OFF: |
| 57 | gpio_direction_output(sdi0_vsel, 0); |
| 58 | gpio_direction_output(sdi0_en, 0); |
| 59 | break; |
| 60 | } |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 61 | |
| 62 | return MCI_FBCLKEN | MCI_CMDDIREN | MCI_DATA0DIREN | |
| 63 | MCI_DATA2DIREN | MCI_DATA31DIREN; |
| 64 | } |
| 65 | |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 66 | #ifdef CONFIG_STE_DMA40 |
| 67 | struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = { |
| 68 | .mode = STEDMA40_MODE_LOGICAL, |
| 69 | .dir = STEDMA40_PERIPH_TO_MEM, |
| 70 | .src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX, |
| 71 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, |
| 72 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 73 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 74 | }; |
| 75 | |
| 76 | static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { |
| 77 | .mode = STEDMA40_MODE_LOGICAL, |
| 78 | .dir = STEDMA40_MEM_TO_PERIPH, |
| 79 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, |
| 80 | .dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX, |
| 81 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 82 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 83 | }; |
| 84 | #endif |
| 85 | |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 86 | static struct mmci_platform_data mop500_sdi0_data = { |
| 87 | .vdd_handler = mop500_sdi0_vdd_handler, |
| 88 | .ocr_mask = MMC_VDD_29_30, |
| 89 | .f_max = 100000000, |
| 90 | .capabilities = MMC_CAP_4_BIT_DATA, |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 91 | .gpio_wp = -1, |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 92 | #ifdef CONFIG_STE_DMA40 |
| 93 | .dma_filter = stedma40_filter, |
| 94 | .dma_rx_param = &mop500_sdi0_dma_cfg_rx, |
| 95 | .dma_tx_param = &mop500_sdi0_dma_cfg_tx, |
| 96 | #endif |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 97 | }; |
| 98 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 99 | static void sdi0_configure(void) |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 100 | { |
| 101 | int ret; |
| 102 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 103 | ret = gpio_request(sdi0_en, "level shifter enable"); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 104 | if (!ret) |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 105 | ret = gpio_request(sdi0_vsel, |
| 106 | "level shifter 1v8-3v select"); |
| 107 | |
| 108 | if (ret) { |
| 109 | pr_warning("unable to config sdi0 gpios for level shifter.\n"); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 110 | return; |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 111 | } |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 112 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 113 | /* Select the default 2.9V and enable level shifter */ |
| 114 | gpio_direction_output(sdi0_vsel, 0); |
| 115 | gpio_direction_output(sdi0_en, 1); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 116 | |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 117 | /* Add the device, force v2 to subrevision 1 */ |
| 118 | if (cpu_is_u8500v2()) |
| 119 | db8500_add_sdi0(&mop500_sdi0_data, 0x10480180); |
| 120 | else |
| 121 | db8500_add_sdi0(&mop500_sdi0_data, 0); |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 122 | } |
| 123 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 124 | void mop500_sdi_tc35892_init(void) |
| 125 | { |
| 126 | mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD; |
| 127 | sdi0_en = GPIO_SDMMC_EN; |
| 128 | sdi0_vsel = GPIO_SDMMC_1V8_3V_SEL; |
| 129 | sdi0_configure(); |
| 130 | } |
| 131 | |
Rabin Vincent | b8410a1 | 2010-08-09 19:18:17 +0530 | [diff] [blame] | 132 | /* |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 133 | * SDI 2 (POP eMMC, not on DB8500ed) |
| 134 | */ |
| 135 | |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 136 | #ifdef CONFIG_STE_DMA40 |
| 137 | struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = { |
| 138 | .mode = STEDMA40_MODE_LOGICAL, |
| 139 | .dir = STEDMA40_PERIPH_TO_MEM, |
| 140 | .src_dev_type = DB8500_DMA_DEV28_SD_MM2_RX, |
| 141 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, |
| 142 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 143 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 144 | }; |
| 145 | |
| 146 | static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = { |
| 147 | .mode = STEDMA40_MODE_LOGICAL, |
| 148 | .dir = STEDMA40_MEM_TO_PERIPH, |
| 149 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, |
| 150 | .dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX, |
| 151 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 152 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 153 | }; |
| 154 | #endif |
| 155 | |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 156 | static struct mmci_platform_data mop500_sdi2_data = { |
| 157 | .ocr_mask = MMC_VDD_165_195, |
| 158 | .f_max = 100000000, |
| 159 | .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
| 160 | .gpio_cd = -1, |
| 161 | .gpio_wp = -1, |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 162 | #ifdef CONFIG_STE_DMA40 |
| 163 | .dma_filter = stedma40_filter, |
| 164 | .dma_rx_param = &mop500_sdi2_dma_cfg_rx, |
| 165 | .dma_tx_param = &mop500_sdi2_dma_cfg_tx, |
| 166 | #endif |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 167 | }; |
| 168 | |
| 169 | /* |
| 170 | * SDI 4 (on-board eMMC) |
| 171 | */ |
| 172 | |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 173 | #ifdef CONFIG_STE_DMA40 |
| 174 | struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = { |
| 175 | .mode = STEDMA40_MODE_LOGICAL, |
| 176 | .dir = STEDMA40_PERIPH_TO_MEM, |
| 177 | .src_dev_type = DB8500_DMA_DEV42_SD_MM4_RX, |
| 178 | .dst_dev_type = STEDMA40_DEV_DST_MEMORY, |
| 179 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 180 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 181 | }; |
| 182 | |
| 183 | static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = { |
| 184 | .mode = STEDMA40_MODE_LOGICAL, |
| 185 | .dir = STEDMA40_MEM_TO_PERIPH, |
| 186 | .src_dev_type = STEDMA40_DEV_SRC_MEMORY, |
| 187 | .dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX, |
| 188 | .src_info.data_width = STEDMA40_WORD_WIDTH, |
| 189 | .dst_info.data_width = STEDMA40_WORD_WIDTH, |
| 190 | }; |
| 191 | #endif |
| 192 | |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 193 | static struct mmci_platform_data mop500_sdi4_data = { |
| 194 | .ocr_mask = MMC_VDD_29_30, |
| 195 | .f_max = 100000000, |
| 196 | .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | |
| 197 | MMC_CAP_MMC_HIGHSPEED, |
| 198 | .gpio_cd = -1, |
| 199 | .gpio_wp = -1, |
Linus Walleij | 5d7b846 | 2010-10-14 13:57:59 +0200 | [diff] [blame] | 200 | #ifdef CONFIG_STE_DMA40 |
| 201 | .dma_filter = stedma40_filter, |
| 202 | .dma_rx_param = &mop500_sdi4_dma_cfg_rx, |
| 203 | .dma_tx_param = &mop500_sdi4_dma_cfg_tx, |
| 204 | #endif |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 205 | }; |
| 206 | |
Linus Walleij | edaa86a | 2010-12-02 12:05:18 +0100 | [diff] [blame] | 207 | void __init mop500_sdi_init(void) |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 208 | { |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 209 | u32 periphid = 0; |
| 210 | |
| 211 | /* v2 has a new version of this block that need to be forced */ |
| 212 | if (cpu_is_u8500v2()) |
| 213 | periphid = 0x10480180; |
Bibek Basu | 4bc3a69 | 2011-02-15 10:46:59 +0100 | [diff] [blame] | 214 | /* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */ |
| 215 | if (!cpu_is_u8500v10()) |
| 216 | mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED; |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 217 | db8500_add_sdi2(&mop500_sdi2_data, periphid); |
Bibek Basu | 4bc3a69 | 2011-02-15 10:46:59 +0100 | [diff] [blame] | 218 | |
| 219 | /* On-board eMMC */ |
Linus Walleij | 7293031 | 2011-03-24 16:13:13 +0100 | [diff] [blame] | 220 | db8500_add_sdi4(&mop500_sdi4_data, periphid); |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 221 | |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 222 | if (machine_is_hrefv60()) { |
| 223 | mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; |
| 224 | sdi0_en = HREFV60_SDMMC_EN_GPIO; |
| 225 | sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO; |
| 226 | sdi0_configure(); |
| 227 | } |
Linus Walleij | f727a05 | 2011-04-27 12:55:37 +0200 | [diff] [blame^] | 228 | |
Linus Walleij | edaa86a | 2010-12-02 12:05:18 +0100 | [diff] [blame] | 229 | /* |
Linus Walleij | 4b4f757 | 2011-02-15 15:01:35 +0100 | [diff] [blame] | 230 | * On boards with the TC35892 GPIO expander, sdi0 will finally |
| 231 | * be added when the TC35892 initializes and calls |
Linus Walleij | edaa86a | 2010-12-02 12:05:18 +0100 | [diff] [blame] | 232 | * mop500_sdi_tc35892_init() above. |
| 233 | */ |
Hanumath Prasad | 008f8a2 | 2010-08-19 12:06:32 +0100 | [diff] [blame] | 234 | } |