blob: 683e66f18e8cd37b45e5d91e18061470286cbb5b [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/serial/pmac_zilog.c
3 *
4 * Driver for PowerMac Z85c30 based ESCC cell found in the
5 * "macio" ASICs of various PowerMac models
6 *
7 * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
8 *
9 * Derived from drivers/macintosh/macserial.c by Paul Mackerras
10 * and drivers/serial/sunzilog.c by David S. Miller
11 *
12 * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
13 * adapted special tweaks needed for us. I don't think it's worth
14 * merging back those though. The DMA code still has to get in
15 * and once done, I expect that driver to remain fairly stable in
16 * the long term, unless we change the driver model again...
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
32 * 2004-08-06 Harald Welte <laforge@gnumonks.org>
33 * - Enable BREAK interrupt
34 * - Add support for sysreq
35 *
36 * TODO: - Add DMA support
37 * - Defer port shutdown to a few seconds after close
38 * - maybe put something right into uap->clk_divisor
39 */
40
41#undef DEBUG
42#undef DEBUG_HARD
43#undef USE_CTRL_O_SYSRQ
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <linux/module.h>
46#include <linux/tty.h>
47
48#include <linux/tty_flip.h>
49#include <linux/major.h>
50#include <linux/string.h>
51#include <linux/fcntl.h>
52#include <linux/mm.h>
53#include <linux/kernel.h>
54#include <linux/delay.h>
55#include <linux/init.h>
56#include <linux/console.h>
57#include <linux/slab.h>
58#include <linux/adb.h>
59#include <linux/pmu.h>
60#include <linux/bitops.h>
61#include <linux/sysrq.h>
Arjan van de Venf392ecf2006-01-12 18:44:32 +000062#include <linux/mutex.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070063#include <asm/sections.h>
64#include <asm/io.h>
65#include <asm/irq.h>
66#include <asm/prom.h>
67#include <asm/machdep.h>
68#include <asm/pmac_feature.h>
69#include <asm/dbdma.h>
70#include <asm/macio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
72#if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
73#define SUPPORT_SYSRQ
74#endif
75
76#include <linux/serial.h>
77#include <linux/serial_core.h>
78
79#include "pmac_zilog.h"
80
81/* Not yet implemented */
82#undef HAS_DBDMA
83
84static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
85MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
86MODULE_DESCRIPTION("Driver for the PowerMac serial ports.");
87MODULE_LICENSE("GPL");
88
89#define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
90
David Woodhousee4533b22007-04-05 00:19:43 +100091#ifdef CONFIG_SERIAL_PMACZILOG_TTYS
92#define PMACZILOG_MAJOR TTY_MAJOR
93#define PMACZILOG_MINOR 64
94#define PMACZILOG_NAME "ttyS"
95#else
96#define PMACZILOG_MAJOR 204
97#define PMACZILOG_MINOR 192
98#define PMACZILOG_NAME "ttyPZ"
99#endif
100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101
102/*
103 * For the sake of early serial console, we can do a pre-probe
104 * (optional) of the ports at rather early boot time.
105 */
106static struct uart_pmac_port pmz_ports[MAX_ZS_PORTS];
107static int pmz_ports_count;
Arjan van de Venf392ecf2006-01-12 18:44:32 +0000108static DEFINE_MUTEX(pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
110static struct uart_driver pmz_uart_reg = {
111 .owner = THIS_MODULE,
David Woodhousee4533b22007-04-05 00:19:43 +1000112 .driver_name = PMACZILOG_NAME,
113 .dev_name = PMACZILOG_NAME,
114 .major = PMACZILOG_MAJOR,
115 .minor = PMACZILOG_MINOR,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116};
117
118
119/*
120 * Load all registers to reprogram the port
121 * This function must only be called when the TX is not busy. The UART
122 * port lock must be held and local interrupts disabled.
123 */
124static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
125{
126 int i;
127
128 if (ZS_IS_ASLEEP(uap))
129 return;
130
131 /* Let pending transmits finish. */
132 for (i = 0; i < 1000; i++) {
133 unsigned char stat = read_zsreg(uap, R1);
134 if (stat & ALL_SNT)
135 break;
136 udelay(100);
137 }
138
139 ZS_CLEARERR(uap);
140 zssync(uap);
141 ZS_CLEARFIFO(uap);
142 zssync(uap);
143 ZS_CLEARERR(uap);
144
145 /* Disable all interrupts. */
146 write_zsreg(uap, R1,
147 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
148
149 /* Set parity, sync config, stop bits, and clock divisor. */
150 write_zsreg(uap, R4, regs[R4]);
151
152 /* Set misc. TX/RX control bits. */
153 write_zsreg(uap, R10, regs[R10]);
154
155 /* Set TX/RX controls sans the enable bits. */
156 write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
157 write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
158
159 /* now set R7 "prime" on ESCC */
160 write_zsreg(uap, R15, regs[R15] | EN85C30);
161 write_zsreg(uap, R7, regs[R7P]);
162
163 /* make sure we use R7 "non-prime" on ESCC */
164 write_zsreg(uap, R15, regs[R15] & ~EN85C30);
165
166 /* Synchronous mode config. */
167 write_zsreg(uap, R6, regs[R6]);
168 write_zsreg(uap, R7, regs[R7]);
169
170 /* Disable baud generator. */
171 write_zsreg(uap, R14, regs[R14] & ~BRENAB);
172
173 /* Clock mode control. */
174 write_zsreg(uap, R11, regs[R11]);
175
176 /* Lower and upper byte of baud rate generator divisor. */
177 write_zsreg(uap, R12, regs[R12]);
178 write_zsreg(uap, R13, regs[R13]);
179
180 /* Now rewrite R14, with BRENAB (if set). */
181 write_zsreg(uap, R14, regs[R14]);
182
183 /* Reset external status interrupts. */
184 write_zsreg(uap, R0, RES_EXT_INT);
185 write_zsreg(uap, R0, RES_EXT_INT);
186
187 /* Rewrite R3/R5, this time without enables masked. */
188 write_zsreg(uap, R3, regs[R3]);
189 write_zsreg(uap, R5, regs[R5]);
190
191 /* Rewrite R1, this time without IRQ enabled masked. */
192 write_zsreg(uap, R1, regs[R1]);
193
194 /* Enable interrupts */
195 write_zsreg(uap, R9, regs[R9]);
196}
197
198/*
199 * We do like sunzilog to avoid disrupting pending Tx
200 * Reprogram the Zilog channel HW registers with the copies found in the
201 * software state struct. If the transmitter is busy, we defer this update
202 * until the next TX complete interrupt. Else, we do it right now.
203 *
204 * The UART port lock must be held and local interrupts disabled.
205 */
206static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
207{
208 if (!ZS_REGS_HELD(uap)) {
209 if (ZS_TX_ACTIVE(uap)) {
210 uap->flags |= PMACZILOG_FLAG_REGS_HELD;
211 } else {
212 pmz_debug("pmz: maybe_update_regs: updating\n");
213 pmz_load_zsregs(uap, uap->curregs);
214 }
215 }
216}
217
David Howells7d12e782006-10-05 14:55:46 +0100218static struct tty_struct *pmz_receive_chars(struct uart_pmac_port *uap)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219{
220 struct tty_struct *tty = NULL;
Alan Cox33f0f882006-01-09 20:54:13 -0800221 unsigned char ch, r1, drop, error, flag;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 int loops = 0;
223
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 /* The interrupt can be enabled when the port isn't open, typically
225 * that happens when using one port is open and the other closed (stale
226 * interrupt) or when one port is used as a console.
227 */
228 if (!ZS_IS_OPEN(uap)) {
229 pmz_debug("pmz: draining input\n");
230 /* Port is closed, drain input data */
231 for (;;) {
232 if ((++loops) > 1000)
233 goto flood;
234 (void)read_zsreg(uap, R1);
235 write_zsreg(uap, R0, ERR_RES);
236 (void)read_zsdata(uap);
237 ch = read_zsreg(uap, R0);
238 if (!(ch & Rx_CH_AV))
239 break;
240 }
241 return NULL;
242 }
243
244 /* Sanity check, make sure the old bug is no longer happening */
Alan Coxebd2c8f2009-09-19 13:13:28 -0700245 if (uap->port.state == NULL || uap->port.state->port.tty == NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246 WARN_ON(1);
247 (void)read_zsdata(uap);
248 return NULL;
249 }
Alan Coxebd2c8f2009-09-19 13:13:28 -0700250 tty = uap->port.state->port.tty;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251
252 while (1) {
253 error = 0;
254 drop = 0;
255
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 r1 = read_zsreg(uap, R1);
257 ch = read_zsdata(uap);
258
259 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
260 write_zsreg(uap, R0, ERR_RES);
261 zssync(uap);
262 }
263
264 ch &= uap->parity_mask;
265 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
266 uap->flags &= ~PMACZILOG_FLAG_BREAK;
267 }
268
269#if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
270#ifdef USE_CTRL_O_SYSRQ
271 /* Handle the SysRq ^O Hack */
272 if (ch == '\x0f') {
273 uap->port.sysrq = jiffies + HZ*5;
274 goto next_char;
275 }
276#endif /* USE_CTRL_O_SYSRQ */
277 if (uap->port.sysrq) {
278 int swallow;
279 spin_unlock(&uap->port.lock);
David Howells7d12e782006-10-05 14:55:46 +0100280 swallow = uart_handle_sysrq_char(&uap->port, ch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 spin_lock(&uap->port.lock);
282 if (swallow)
283 goto next_char;
284 }
285#endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
286
287 /* A real serial line, record the character and status. */
288 if (drop)
289 goto next_char;
290
Alan Cox33f0f882006-01-09 20:54:13 -0800291 flag = TTY_NORMAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 uap->port.icount.rx++;
293
294 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
295 error = 1;
296 if (r1 & BRK_ABRT) {
297 pmz_debug("pmz: got break !\n");
298 r1 &= ~(PAR_ERR | CRC_ERR);
299 uap->port.icount.brk++;
300 if (uart_handle_break(&uap->port))
301 goto next_char;
302 }
303 else if (r1 & PAR_ERR)
304 uap->port.icount.parity++;
305 else if (r1 & CRC_ERR)
306 uap->port.icount.frame++;
307 if (r1 & Rx_OVR)
308 uap->port.icount.overrun++;
309 r1 &= uap->port.read_status_mask;
310 if (r1 & BRK_ABRT)
Alan Cox33f0f882006-01-09 20:54:13 -0800311 flag = TTY_BREAK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 else if (r1 & PAR_ERR)
Alan Cox33f0f882006-01-09 20:54:13 -0800313 flag = TTY_PARITY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314 else if (r1 & CRC_ERR)
Alan Cox33f0f882006-01-09 20:54:13 -0800315 flag = TTY_FRAME;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 }
317
318 if (uap->port.ignore_status_mask == 0xff ||
319 (r1 & uap->port.ignore_status_mask) == 0) {
Alan Cox33f0f882006-01-09 20:54:13 -0800320 tty_insert_flip_char(tty, ch, flag);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 }
Alan Cox33f0f882006-01-09 20:54:13 -0800322 if (r1 & Rx_OVR)
323 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 next_char:
325 /* We can get stuck in an infinite loop getting char 0 when the
326 * line is in a wrong HW state, we break that here.
327 * When that happens, I disable the receive side of the driver.
328 * Note that what I've been experiencing is a real irq loop where
329 * I'm getting flooded regardless of the actual port speed.
330 * Something stange is going on with the HW
331 */
332 if ((++loops) > 1000)
333 goto flood;
334 ch = read_zsreg(uap, R0);
335 if (!(ch & Rx_CH_AV))
336 break;
337 }
338
339 return tty;
340 flood:
341 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
342 write_zsreg(uap, R1, uap->curregs[R1]);
343 zssync(uap);
344 dev_err(&uap->dev->ofdev.dev, "pmz: rx irq flood !\n");
345 return tty;
346}
347
David Howells7d12e782006-10-05 14:55:46 +0100348static void pmz_status_handle(struct uart_pmac_port *uap)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349{
350 unsigned char status;
351
352 status = read_zsreg(uap, R0);
353 write_zsreg(uap, R0, RES_EXT_INT);
354 zssync(uap);
355
356 if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
357 if (status & SYNC_HUNT)
358 uap->port.icount.dsr++;
359
360 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
361 * But it does not tell us which bit has changed, we have to keep
362 * track of this ourselves.
363 * The CTS input is inverted for some reason. -- paulus
364 */
365 if ((status ^ uap->prev_status) & DCD)
366 uart_handle_dcd_change(&uap->port,
367 (status & DCD));
368 if ((status ^ uap->prev_status) & CTS)
369 uart_handle_cts_change(&uap->port,
370 !(status & CTS));
371
Alan Coxbdc04e32009-09-19 13:13:31 -0700372 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 }
374
375 if (status & BRK_ABRT)
376 uap->flags |= PMACZILOG_FLAG_BREAK;
377
378 uap->prev_status = status;
379}
380
381static void pmz_transmit_chars(struct uart_pmac_port *uap)
382{
383 struct circ_buf *xmit;
384
385 if (ZS_IS_ASLEEP(uap))
386 return;
387 if (ZS_IS_CONS(uap)) {
388 unsigned char status = read_zsreg(uap, R0);
389
390 /* TX still busy? Just wait for the next TX done interrupt.
391 *
392 * It can occur because of how we do serial console writes. It would
393 * be nice to transmit console writes just like we normally would for
394 * a TTY line. (ie. buffered and TX interrupt driven). That is not
395 * easy because console writes cannot sleep. One solution might be
396 * to poll on enough port->xmit space becomming free. -DaveM
397 */
398 if (!(status & Tx_BUF_EMP))
399 return;
400 }
401
402 uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
403
404 if (ZS_REGS_HELD(uap)) {
405 pmz_load_zsregs(uap, uap->curregs);
406 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
407 }
408
409 if (ZS_TX_STOPPED(uap)) {
410 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
411 goto ack_tx_int;
412 }
413
Benjamin Herrenschmidt02ab8512010-01-10 17:51:42 +0000414 /* Under some circumstances, we see interrupts reported for
415 * a closed channel. The interrupt mask in R1 is clear, but
416 * R3 still signals the interrupts and we see them when taking
417 * an interrupt for the other channel (this could be a qemu
418 * bug but since the ESCC doc doesn't specify precsiely whether
419 * R3 interrup status bits are masked by R1 interrupt enable
420 * bits, better safe than sorry). --BenH.
421 */
422 if (!ZS_IS_OPEN(uap))
423 goto ack_tx_int;
424
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 if (uap->port.x_char) {
426 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
427 write_zsdata(uap, uap->port.x_char);
428 zssync(uap);
429 uap->port.icount.tx++;
430 uap->port.x_char = 0;
431 return;
432 }
433
Alan Coxebd2c8f2009-09-19 13:13:28 -0700434 if (uap->port.state == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 goto ack_tx_int;
Alan Coxebd2c8f2009-09-19 13:13:28 -0700436 xmit = &uap->port.state->xmit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 if (uart_circ_empty(xmit)) {
438 uart_write_wakeup(&uap->port);
439 goto ack_tx_int;
440 }
441 if (uart_tx_stopped(&uap->port))
442 goto ack_tx_int;
443
444 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
445 write_zsdata(uap, xmit->buf[xmit->tail]);
446 zssync(uap);
447
448 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
449 uap->port.icount.tx++;
450
451 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
452 uart_write_wakeup(&uap->port);
453
454 return;
455
456ack_tx_int:
457 write_zsreg(uap, R0, RES_Tx_P);
458 zssync(uap);
459}
460
461/* Hrm... we register that twice, fixme later.... */
David Howells7d12e782006-10-05 14:55:46 +0100462static irqreturn_t pmz_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463{
464 struct uart_pmac_port *uap = dev_id;
465 struct uart_pmac_port *uap_a;
466 struct uart_pmac_port *uap_b;
467 int rc = IRQ_NONE;
468 struct tty_struct *tty;
469 u8 r3;
470
471 uap_a = pmz_get_port_A(uap);
472 uap_b = uap_a->mate;
473
474 spin_lock(&uap_a->port.lock);
475 r3 = read_zsreg(uap_a, R3);
476
477#ifdef DEBUG_HARD
478 pmz_debug("irq, r3: %x\n", r3);
479#endif
480 /* Channel A */
481 tty = NULL;
482 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
483 write_zsreg(uap_a, R0, RES_H_IUS);
484 zssync(uap_a);
485 if (r3 & CHAEXT)
David Howells7d12e782006-10-05 14:55:46 +0100486 pmz_status_handle(uap_a);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700487 if (r3 & CHARxIP)
David Howells7d12e782006-10-05 14:55:46 +0100488 tty = pmz_receive_chars(uap_a);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 if (r3 & CHATxIP)
490 pmz_transmit_chars(uap_a);
491 rc = IRQ_HANDLED;
492 }
493 spin_unlock(&uap_a->port.lock);
494 if (tty != NULL)
495 tty_flip_buffer_push(tty);
496
497 if (uap_b->node == NULL)
498 goto out;
499
500 spin_lock(&uap_b->port.lock);
501 tty = NULL;
502 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
503 write_zsreg(uap_b, R0, RES_H_IUS);
504 zssync(uap_b);
505 if (r3 & CHBEXT)
David Howells7d12e782006-10-05 14:55:46 +0100506 pmz_status_handle(uap_b);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507 if (r3 & CHBRxIP)
David Howells7d12e782006-10-05 14:55:46 +0100508 tty = pmz_receive_chars(uap_b);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 if (r3 & CHBTxIP)
510 pmz_transmit_chars(uap_b);
511 rc = IRQ_HANDLED;
512 }
513 spin_unlock(&uap_b->port.lock);
514 if (tty != NULL)
515 tty_flip_buffer_push(tty);
516
517 out:
518#ifdef DEBUG_HARD
519 pmz_debug("irq done.\n");
520#endif
521 return rc;
522}
523
524/*
525 * Peek the status register, lock not held by caller
526 */
527static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
528{
529 unsigned long flags;
530 u8 status;
531
532 spin_lock_irqsave(&uap->port.lock, flags);
533 status = read_zsreg(uap, R0);
534 spin_unlock_irqrestore(&uap->port.lock, flags);
535
536 return status;
537}
538
539/*
540 * Check if transmitter is empty
541 * The port lock is not held.
542 */
543static unsigned int pmz_tx_empty(struct uart_port *port)
544{
545 struct uart_pmac_port *uap = to_pmz(port);
546 unsigned char status;
547
548 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
549 return TIOCSER_TEMT;
550
551 status = pmz_peek_status(to_pmz(port));
552 if (status & Tx_BUF_EMP)
553 return TIOCSER_TEMT;
554 return 0;
555}
556
557/*
558 * Set Modem Control (RTS & DTR) bits
559 * The port lock is held and interrupts are disabled.
560 * Note: Shall we really filter out RTS on external ports or
561 * should that be dealt at higher level only ?
562 */
563static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
564{
565 struct uart_pmac_port *uap = to_pmz(port);
566 unsigned char set_bits, clear_bits;
567
568 /* Do nothing for irda for now... */
569 if (ZS_IS_IRDA(uap))
570 return;
571 /* We get called during boot with a port not up yet */
572 if (ZS_IS_ASLEEP(uap) ||
573 !(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
574 return;
575
576 set_bits = clear_bits = 0;
577
578 if (ZS_IS_INTMODEM(uap)) {
579 if (mctrl & TIOCM_RTS)
580 set_bits |= RTS;
581 else
582 clear_bits |= RTS;
583 }
584 if (mctrl & TIOCM_DTR)
585 set_bits |= DTR;
586 else
587 clear_bits |= DTR;
588
589 /* NOTE: Not subject to 'transmitter active' rule. */
590 uap->curregs[R5] |= set_bits;
591 uap->curregs[R5] &= ~clear_bits;
592 if (ZS_IS_ASLEEP(uap))
593 return;
594 write_zsreg(uap, R5, uap->curregs[R5]);
595 pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
596 set_bits, clear_bits, uap->curregs[R5]);
597 zssync(uap);
598}
599
600/*
601 * Get Modem Control bits (only the input ones, the core will
602 * or that with a cached value of the control ones)
Russell Kingc5f46442005-06-29 09:42:38 +0100603 * The port lock is held and interrupts are disabled.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 */
605static unsigned int pmz_get_mctrl(struct uart_port *port)
606{
607 struct uart_pmac_port *uap = to_pmz(port);
608 unsigned char status;
609 unsigned int ret;
610
611 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
612 return 0;
613
Russell Kingc5f46442005-06-29 09:42:38 +0100614 status = read_zsreg(uap, R0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615
616 ret = 0;
617 if (status & DCD)
618 ret |= TIOCM_CAR;
619 if (status & SYNC_HUNT)
620 ret |= TIOCM_DSR;
621 if (!(status & CTS))
622 ret |= TIOCM_CTS;
623
624 return ret;
625}
626
627/*
628 * Stop TX side. Dealt like sunzilog at next Tx interrupt,
Russell Kingb129a8c2005-08-31 10:12:14 +0100629 * though for DMA, we will have to do a bit more.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630 * The port lock is held and interrupts are disabled.
631 */
Russell Kingb129a8c2005-08-31 10:12:14 +0100632static void pmz_stop_tx(struct uart_port *port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633{
634 to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
635}
636
637/*
638 * Kick the Tx side.
639 * The port lock is held and interrupts are disabled.
640 */
Russell Kingb129a8c2005-08-31 10:12:14 +0100641static void pmz_start_tx(struct uart_port *port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642{
643 struct uart_pmac_port *uap = to_pmz(port);
644 unsigned char status;
645
646 pmz_debug("pmz: start_tx()\n");
647
648 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
649 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
650
651 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
652 return;
653
654 status = read_zsreg(uap, R0);
655
656 /* TX busy? Just wait for the TX done interrupt. */
657 if (!(status & Tx_BUF_EMP))
658 return;
659
660 /* Send the first character to jump-start the TX done
661 * IRQ sending engine.
662 */
663 if (port->x_char) {
664 write_zsdata(uap, port->x_char);
665 zssync(uap);
666 port->icount.tx++;
667 port->x_char = 0;
668 } else {
Alan Coxebd2c8f2009-09-19 13:13:28 -0700669 struct circ_buf *xmit = &port->state->xmit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670
671 write_zsdata(uap, xmit->buf[xmit->tail]);
672 zssync(uap);
673 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
674 port->icount.tx++;
675
676 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
677 uart_write_wakeup(&uap->port);
678 }
679 pmz_debug("pmz: start_tx() done.\n");
680}
681
682/*
683 * Stop Rx side, basically disable emitting of
684 * Rx interrupts on the port. We don't disable the rx
685 * side of the chip proper though
686 * The port lock is held.
687 */
688static void pmz_stop_rx(struct uart_port *port)
689{
690 struct uart_pmac_port *uap = to_pmz(port);
691
692 if (ZS_IS_ASLEEP(uap) || uap->node == NULL)
693 return;
694
695 pmz_debug("pmz: stop_rx()()\n");
696
697 /* Disable all RX interrupts. */
698 uap->curregs[R1] &= ~RxINT_MASK;
699 pmz_maybe_update_regs(uap);
700
701 pmz_debug("pmz: stop_rx() done.\n");
702}
703
704/*
705 * Enable modem status change interrupts
706 * The port lock is held.
707 */
708static void pmz_enable_ms(struct uart_port *port)
709{
710 struct uart_pmac_port *uap = to_pmz(port);
711 unsigned char new_reg;
712
713 if (ZS_IS_IRDA(uap) || uap->node == NULL)
714 return;
715 new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
716 if (new_reg != uap->curregs[R15]) {
717 uap->curregs[R15] = new_reg;
718
719 if (ZS_IS_ASLEEP(uap))
720 return;
721 /* NOTE: Not subject to 'transmitter active' rule. */
722 write_zsreg(uap, R15, uap->curregs[R15]);
723 }
724}
725
726/*
727 * Control break state emission
728 * The port lock is not held.
729 */
730static void pmz_break_ctl(struct uart_port *port, int break_state)
731{
732 struct uart_pmac_port *uap = to_pmz(port);
733 unsigned char set_bits, clear_bits, new_reg;
734 unsigned long flags;
735
736 if (uap->node == NULL)
737 return;
738 set_bits = clear_bits = 0;
739
740 if (break_state)
741 set_bits |= SND_BRK;
742 else
743 clear_bits |= SND_BRK;
744
745 spin_lock_irqsave(&port->lock, flags);
746
747 new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
748 if (new_reg != uap->curregs[R5]) {
749 uap->curregs[R5] = new_reg;
750
751 /* NOTE: Not subject to 'transmitter active' rule. */
752 if (ZS_IS_ASLEEP(uap))
753 return;
754 write_zsreg(uap, R5, uap->curregs[R5]);
755 }
756
757 spin_unlock_irqrestore(&port->lock, flags);
758}
759
760/*
761 * Turn power on or off to the SCC and associated stuff
762 * (port drivers, modem, IR port, etc.)
763 * Returns the number of milliseconds we should wait before
764 * trying to use the port.
765 */
766static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
767{
768 int delay = 0;
769 int rc;
770
771 if (state) {
772 rc = pmac_call_feature(
773 PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
774 pmz_debug("port power on result: %d\n", rc);
775 if (ZS_IS_INTMODEM(uap)) {
776 rc = pmac_call_feature(
777 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
778 delay = 2500; /* wait for 2.5s before using */
779 pmz_debug("modem power result: %d\n", rc);
780 }
781 } else {
782 /* TODO: Make that depend on a timer, don't power down
783 * immediately
784 */
785 if (ZS_IS_INTMODEM(uap)) {
786 rc = pmac_call_feature(
787 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
788 pmz_debug("port power off result: %d\n", rc);
789 }
790 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
791 }
792 return delay;
793}
794
795/*
796 * FixZeroBug....Works around a bug in the SCC receving channel.
797 * Inspired from Darwin code, 15 Sept. 2000 -DanM
798 *
799 * The following sequence prevents a problem that is seen with O'Hare ASICs
800 * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
801 * at the input to the receiver becomes 'stuck' and locks up the receiver.
802 * This problem can occur as a result of a zero bit at the receiver input
803 * coincident with any of the following events:
804 *
805 * The SCC is initialized (hardware or software).
806 * A framing error is detected.
807 * The clocking option changes from synchronous or X1 asynchronous
808 * clocking to X16, X32, or X64 asynchronous clocking.
809 * The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
810 *
811 * This workaround attempts to recover from the lockup condition by placing
812 * the SCC in synchronous loopback mode with a fast clock before programming
813 * any of the asynchronous modes.
814 */
815static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
816{
817 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
818 zssync(uap);
819 udelay(10);
820 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
821 zssync(uap);
822
823 write_zsreg(uap, 4, X1CLK | MONSYNC);
824 write_zsreg(uap, 3, Rx8);
825 write_zsreg(uap, 5, Tx8 | RTS);
826 write_zsreg(uap, 9, NV); /* Didn't we already do this? */
827 write_zsreg(uap, 11, RCBR | TCBR);
828 write_zsreg(uap, 12, 0);
829 write_zsreg(uap, 13, 0);
830 write_zsreg(uap, 14, (LOOPBAK | BRSRC));
831 write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
832 write_zsreg(uap, 3, Rx8 | RxENABLE);
833 write_zsreg(uap, 0, RES_EXT_INT);
834 write_zsreg(uap, 0, RES_EXT_INT);
835 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */
836
837 /* The channel should be OK now, but it is probably receiving
838 * loopback garbage.
839 * Switch to asynchronous mode, disable the receiver,
840 * and discard everything in the receive buffer.
841 */
842 write_zsreg(uap, 9, NV);
843 write_zsreg(uap, 4, X16CLK | SB_MASK);
844 write_zsreg(uap, 3, Rx8);
845
846 while (read_zsreg(uap, 0) & Rx_CH_AV) {
847 (void)read_zsreg(uap, 8);
848 write_zsreg(uap, 0, RES_EXT_INT);
849 write_zsreg(uap, 0, ERR_RES);
850 }
851}
852
853/*
854 * Real startup routine, powers up the hardware and sets up
855 * the SCC. Returns a delay in ms where you need to wait before
856 * actually using the port, this is typically the internal modem
857 * powerup delay. This routine expect the lock to be taken.
858 */
859static int __pmz_startup(struct uart_pmac_port *uap)
860{
861 int pwr_delay = 0;
862
863 memset(&uap->curregs, 0, sizeof(uap->curregs));
864
865 /* Power up the SCC & underlying hardware (modem/irda) */
866 pwr_delay = pmz_set_scc_power(uap, 1);
867
868 /* Nice buggy HW ... */
869 pmz_fix_zero_bug_scc(uap);
870
871 /* Reset the channel */
872 uap->curregs[R9] = 0;
873 write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
874 zssync(uap);
875 udelay(10);
876 write_zsreg(uap, 9, 0);
877 zssync(uap);
878
879 /* Clear the interrupt registers */
880 write_zsreg(uap, R1, 0);
881 write_zsreg(uap, R0, ERR_RES);
882 write_zsreg(uap, R0, ERR_RES);
883 write_zsreg(uap, R0, RES_H_IUS);
884 write_zsreg(uap, R0, RES_H_IUS);
885
886 /* Setup some valid baud rate */
887 uap->curregs[R4] = X16CLK | SB1;
888 uap->curregs[R3] = Rx8;
889 uap->curregs[R5] = Tx8 | RTS;
890 if (!ZS_IS_IRDA(uap))
891 uap->curregs[R5] |= DTR;
892 uap->curregs[R12] = 0;
893 uap->curregs[R13] = 0;
894 uap->curregs[R14] = BRENAB;
895
896 /* Clear handshaking, enable BREAK interrupts */
897 uap->curregs[R15] = BRKIE;
898
899 /* Master interrupt enable */
900 uap->curregs[R9] |= NV | MIE;
901
902 pmz_load_zsregs(uap, uap->curregs);
903
904 /* Enable receiver and transmitter. */
905 write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
906 write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
907
908 /* Remember status for DCD/CTS changes */
909 uap->prev_status = read_zsreg(uap, R0);
910
911
912 return pwr_delay;
913}
914
915static void pmz_irda_reset(struct uart_pmac_port *uap)
916{
917 uap->curregs[R5] |= DTR;
918 write_zsreg(uap, R5, uap->curregs[R5]);
919 zssync(uap);
920 mdelay(110);
921 uap->curregs[R5] &= ~DTR;
922 write_zsreg(uap, R5, uap->curregs[R5]);
923 zssync(uap);
924 mdelay(10);
925}
926
927/*
928 * This is the "normal" startup routine, using the above one
929 * wrapped with the lock and doing a schedule delay
930 */
931static int pmz_startup(struct uart_port *port)
932{
933 struct uart_pmac_port *uap = to_pmz(port);
934 unsigned long flags;
935 int pwr_delay = 0;
936
937 pmz_debug("pmz: startup()\n");
938
939 if (ZS_IS_ASLEEP(uap))
940 return -EAGAIN;
941 if (uap->node == NULL)
942 return -ENODEV;
943
Arjan van de Venf392ecf2006-01-12 18:44:32 +0000944 mutex_lock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945
946 uap->flags |= PMACZILOG_FLAG_IS_OPEN;
947
948 /* A console is never powered down. Else, power up and
949 * initialize the chip
950 */
951 if (!ZS_IS_CONS(uap)) {
952 spin_lock_irqsave(&port->lock, flags);
953 pwr_delay = __pmz_startup(uap);
954 spin_unlock_irqrestore(&port->lock, flags);
955 }
956
957 pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON;
Thomas Gleixner40663cc2006-07-01 19:29:43 -0700958 if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED, "PowerMac Zilog", uap)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959 dev_err(&uap->dev->ofdev.dev,
960 "Unable to register zs interrupt handler.\n");
961 pmz_set_scc_power(uap, 0);
Arjan van de Venf392ecf2006-01-12 18:44:32 +0000962 mutex_unlock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963 return -ENXIO;
964 }
965
Arjan van de Venf392ecf2006-01-12 18:44:32 +0000966 mutex_unlock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967
968 /* Right now, we deal with delay by blocking here, I'll be
969 * smarter later on
970 */
971 if (pwr_delay != 0) {
972 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
973 msleep(pwr_delay);
974 }
975
976 /* IrDA reset is done now */
977 if (ZS_IS_IRDA(uap))
978 pmz_irda_reset(uap);
979
980 /* Enable interrupts emission from the chip */
981 spin_lock_irqsave(&port->lock, flags);
982 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
983 if (!ZS_IS_EXTCLK(uap))
984 uap->curregs[R1] |= EXT_INT_ENAB;
985 write_zsreg(uap, R1, uap->curregs[R1]);
986 spin_unlock_irqrestore(&port->lock, flags);
987
988 pmz_debug("pmz: startup() done.\n");
989
990 return 0;
991}
992
993static void pmz_shutdown(struct uart_port *port)
994{
995 struct uart_pmac_port *uap = to_pmz(port);
996 unsigned long flags;
997
998 pmz_debug("pmz: shutdown()\n");
999
1000 if (uap->node == NULL)
1001 return;
1002
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001003 mutex_lock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004
1005 /* Release interrupt handler */
1006 free_irq(uap->port.irq, uap);
1007
1008 spin_lock_irqsave(&port->lock, flags);
1009
1010 uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
1011
1012 if (!ZS_IS_OPEN(uap->mate))
1013 pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON;
1014
1015 /* Disable interrupts */
1016 if (!ZS_IS_ASLEEP(uap)) {
1017 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1018 write_zsreg(uap, R1, uap->curregs[R1]);
1019 zssync(uap);
1020 }
1021
1022 if (ZS_IS_CONS(uap) || ZS_IS_ASLEEP(uap)) {
1023 spin_unlock_irqrestore(&port->lock, flags);
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001024 mutex_unlock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001025 return;
1026 }
1027
1028 /* Disable receiver and transmitter. */
1029 uap->curregs[R3] &= ~RxENABLE;
1030 uap->curregs[R5] &= ~TxENABLE;
1031
1032 /* Disable all interrupts and BRK assertion. */
1033 uap->curregs[R5] &= ~SND_BRK;
1034 pmz_maybe_update_regs(uap);
1035
1036 /* Shut the chip down */
1037 pmz_set_scc_power(uap, 0);
1038
1039 spin_unlock_irqrestore(&port->lock, flags);
1040
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001041 mutex_unlock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042
1043 pmz_debug("pmz: shutdown() done.\n");
1044}
1045
1046/* Shared by TTY driver and serial console setup. The port lock is held
1047 * and local interrupts are disabled.
1048 */
1049static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1050 unsigned int iflag, unsigned long baud)
1051{
1052 int brg;
1053
1054
1055 /* Switch to external clocking for IrDA high clock rates. That
1056 * code could be re-used for Midi interfaces with different
1057 * multipliers
1058 */
1059 if (baud >= 115200 && ZS_IS_IRDA(uap)) {
1060 uap->curregs[R4] = X1CLK;
1061 uap->curregs[R11] = RCTRxCP | TCTRxCP;
1062 uap->curregs[R14] = 0; /* BRG off */
1063 uap->curregs[R12] = 0;
1064 uap->curregs[R13] = 0;
1065 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
1066 } else {
1067 switch (baud) {
1068 case ZS_CLOCK/16: /* 230400 */
1069 uap->curregs[R4] = X16CLK;
1070 uap->curregs[R11] = 0;
1071 uap->curregs[R14] = 0;
1072 break;
1073 case ZS_CLOCK/32: /* 115200 */
1074 uap->curregs[R4] = X32CLK;
1075 uap->curregs[R11] = 0;
1076 uap->curregs[R14] = 0;
1077 break;
1078 default:
1079 uap->curregs[R4] = X16CLK;
1080 uap->curregs[R11] = TCBR | RCBR;
1081 brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
1082 uap->curregs[R12] = (brg & 255);
1083 uap->curregs[R13] = ((brg >> 8) & 255);
1084 uap->curregs[R14] = BRENAB;
1085 }
1086 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
1087 }
1088
1089 /* Character size, stop bits, and parity. */
1090 uap->curregs[3] &= ~RxN_MASK;
1091 uap->curregs[5] &= ~TxN_MASK;
1092
1093 switch (cflag & CSIZE) {
1094 case CS5:
1095 uap->curregs[3] |= Rx5;
1096 uap->curregs[5] |= Tx5;
1097 uap->parity_mask = 0x1f;
1098 break;
1099 case CS6:
1100 uap->curregs[3] |= Rx6;
1101 uap->curregs[5] |= Tx6;
1102 uap->parity_mask = 0x3f;
1103 break;
1104 case CS7:
1105 uap->curregs[3] |= Rx7;
1106 uap->curregs[5] |= Tx7;
1107 uap->parity_mask = 0x7f;
1108 break;
1109 case CS8:
1110 default:
1111 uap->curregs[3] |= Rx8;
1112 uap->curregs[5] |= Tx8;
1113 uap->parity_mask = 0xff;
1114 break;
1115 };
1116 uap->curregs[4] &= ~(SB_MASK);
1117 if (cflag & CSTOPB)
1118 uap->curregs[4] |= SB2;
1119 else
1120 uap->curregs[4] |= SB1;
1121 if (cflag & PARENB)
1122 uap->curregs[4] |= PAR_ENAB;
1123 else
1124 uap->curregs[4] &= ~PAR_ENAB;
1125 if (!(cflag & PARODD))
1126 uap->curregs[4] |= PAR_EVEN;
1127 else
1128 uap->curregs[4] &= ~PAR_EVEN;
1129
1130 uap->port.read_status_mask = Rx_OVR;
1131 if (iflag & INPCK)
1132 uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
1133 if (iflag & (BRKINT | PARMRK))
1134 uap->port.read_status_mask |= BRK_ABRT;
1135
1136 uap->port.ignore_status_mask = 0;
1137 if (iflag & IGNPAR)
1138 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
1139 if (iflag & IGNBRK) {
1140 uap->port.ignore_status_mask |= BRK_ABRT;
1141 if (iflag & IGNPAR)
1142 uap->port.ignore_status_mask |= Rx_OVR;
1143 }
1144
1145 if ((cflag & CREAD) == 0)
1146 uap->port.ignore_status_mask = 0xff;
1147}
1148
1149
1150/*
1151 * Set the irda codec on the imac to the specified baud rate.
1152 */
1153static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1154{
1155 u8 cmdbyte;
1156 int t, version;
1157
1158 switch (*baud) {
1159 /* SIR modes */
1160 case 2400:
1161 cmdbyte = 0x53;
1162 break;
1163 case 4800:
1164 cmdbyte = 0x52;
1165 break;
1166 case 9600:
1167 cmdbyte = 0x51;
1168 break;
1169 case 19200:
1170 cmdbyte = 0x50;
1171 break;
1172 case 38400:
1173 cmdbyte = 0x4f;
1174 break;
1175 case 57600:
1176 cmdbyte = 0x4e;
1177 break;
1178 case 115200:
1179 cmdbyte = 0x4d;
1180 break;
1181 /* The FIR modes aren't really supported at this point, how
1182 * do we select the speed ? via the FCR on KeyLargo ?
1183 */
1184 case 1152000:
1185 cmdbyte = 0;
1186 break;
1187 case 4000000:
1188 cmdbyte = 0;
1189 break;
1190 default: /* 9600 */
1191 cmdbyte = 0x51;
1192 *baud = 9600;
1193 break;
1194 }
1195
1196 /* Wait for transmitter to drain */
1197 t = 10000;
1198 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1199 || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1200 if (--t <= 0) {
1201 dev_err(&uap->dev->ofdev.dev, "transmitter didn't drain\n");
1202 return;
1203 }
1204 udelay(10);
1205 }
1206
1207 /* Drain the receiver too */
1208 t = 100;
1209 (void)read_zsdata(uap);
1210 (void)read_zsdata(uap);
1211 (void)read_zsdata(uap);
1212 mdelay(10);
1213 while (read_zsreg(uap, R0) & Rx_CH_AV) {
1214 read_zsdata(uap);
1215 mdelay(10);
1216 if (--t <= 0) {
1217 dev_err(&uap->dev->ofdev.dev, "receiver didn't drain\n");
1218 return;
1219 }
1220 }
1221
1222 /* Switch to command mode */
1223 uap->curregs[R5] |= DTR;
1224 write_zsreg(uap, R5, uap->curregs[R5]);
1225 zssync(uap);
1226 mdelay(1);
1227
1228 /* Switch SCC to 19200 */
1229 pmz_convert_to_zs(uap, CS8, 0, 19200);
1230 pmz_load_zsregs(uap, uap->curregs);
1231 mdelay(1);
1232
1233 /* Write get_version command byte */
1234 write_zsdata(uap, 1);
1235 t = 5000;
1236 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1237 if (--t <= 0) {
1238 dev_err(&uap->dev->ofdev.dev,
1239 "irda_setup timed out on get_version byte\n");
1240 goto out;
1241 }
1242 udelay(10);
1243 }
1244 version = read_zsdata(uap);
1245
1246 if (version < 4) {
1247 dev_info(&uap->dev->ofdev.dev, "IrDA: dongle version %d not supported\n",
1248 version);
1249 goto out;
1250 }
1251
1252 /* Send speed mode */
1253 write_zsdata(uap, cmdbyte);
1254 t = 5000;
1255 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1256 if (--t <= 0) {
1257 dev_err(&uap->dev->ofdev.dev,
1258 "irda_setup timed out on speed mode byte\n");
1259 goto out;
1260 }
1261 udelay(10);
1262 }
1263 t = read_zsdata(uap);
1264 if (t != cmdbyte)
1265 dev_err(&uap->dev->ofdev.dev,
1266 "irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1267
1268 dev_info(&uap->dev->ofdev.dev, "IrDA setup for %ld bps, dongle version: %d\n",
1269 *baud, version);
1270
1271 (void)read_zsdata(uap);
1272 (void)read_zsdata(uap);
1273 (void)read_zsdata(uap);
1274
1275 out:
1276 /* Switch back to data mode */
1277 uap->curregs[R5] &= ~DTR;
1278 write_zsreg(uap, R5, uap->curregs[R5]);
1279 zssync(uap);
1280
1281 (void)read_zsdata(uap);
1282 (void)read_zsdata(uap);
1283 (void)read_zsdata(uap);
1284}
1285
1286
Alan Cox606d0992006-12-08 02:38:45 -08001287static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1288 struct ktermios *old)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001289{
1290 struct uart_pmac_port *uap = to_pmz(port);
1291 unsigned long baud;
1292
1293 pmz_debug("pmz: set_termios()\n");
1294
1295 if (ZS_IS_ASLEEP(uap))
1296 return;
1297
Alan Cox606d0992006-12-08 02:38:45 -08001298 memcpy(&uap->termios_cache, termios, sizeof(struct ktermios));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001299
1300 /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1301 * on the IR dongle. Note that the IRTTY driver currently doesn't know
1302 * about the FIR mode and high speed modes. So these are unused. For
1303 * implementing proper support for these, we should probably add some
1304 * DMA as well, at least on the Rx side, which isn't a simple thing
1305 * at this point.
1306 */
1307 if (ZS_IS_IRDA(uap)) {
1308 /* Calc baud rate */
1309 baud = uart_get_baud_rate(port, termios, old, 1200, 4000000);
1310 pmz_debug("pmz: switch IRDA to %ld bauds\n", baud);
1311 /* Cet the irda codec to the right rate */
1312 pmz_irda_setup(uap, &baud);
1313 /* Set final baud rate */
1314 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1315 pmz_load_zsregs(uap, uap->curregs);
1316 zssync(uap);
1317 } else {
1318 baud = uart_get_baud_rate(port, termios, old, 1200, 230400);
1319 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1320 /* Make sure modem status interrupts are correctly configured */
1321 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) {
1322 uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
1323 uap->flags |= PMACZILOG_FLAG_MODEM_STATUS;
1324 } else {
1325 uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
1326 uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS;
1327 }
1328
1329 /* Load registers to the chip */
1330 pmz_maybe_update_regs(uap);
1331 }
1332 uart_update_timeout(port, termios->c_cflag, baud);
1333
1334 pmz_debug("pmz: set_termios() done.\n");
1335}
1336
1337/* The port lock is not held. */
Alan Cox606d0992006-12-08 02:38:45 -08001338static void pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1339 struct ktermios *old)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001340{
1341 struct uart_pmac_port *uap = to_pmz(port);
1342 unsigned long flags;
1343
1344 spin_lock_irqsave(&port->lock, flags);
1345
1346 /* Disable IRQs on the port */
1347 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1348 write_zsreg(uap, R1, uap->curregs[R1]);
1349
1350 /* Setup new port configuration */
1351 __pmz_set_termios(port, termios, old);
1352
1353 /* Re-enable IRQs on the port */
1354 if (ZS_IS_OPEN(uap)) {
1355 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
1356 if (!ZS_IS_EXTCLK(uap))
1357 uap->curregs[R1] |= EXT_INT_ENAB;
1358 write_zsreg(uap, R1, uap->curregs[R1]);
1359 }
1360 spin_unlock_irqrestore(&port->lock, flags);
1361}
1362
1363static const char *pmz_type(struct uart_port *port)
1364{
1365 struct uart_pmac_port *uap = to_pmz(port);
1366
1367 if (ZS_IS_IRDA(uap))
1368 return "Z85c30 ESCC - Infrared port";
1369 else if (ZS_IS_INTMODEM(uap))
1370 return "Z85c30 ESCC - Internal modem";
1371 return "Z85c30 ESCC - Serial port";
1372}
1373
1374/* We do not request/release mappings of the registers here, this
1375 * happens at early serial probe time.
1376 */
1377static void pmz_release_port(struct uart_port *port)
1378{
1379}
1380
1381static int pmz_request_port(struct uart_port *port)
1382{
1383 return 0;
1384}
1385
1386/* These do not need to do anything interesting either. */
1387static void pmz_config_port(struct uart_port *port, int flags)
1388{
1389}
1390
1391/* We do not support letting the user mess with the divisor, IRQ, etc. */
1392static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
1393{
1394 return -EINVAL;
1395}
1396
Chris J Arges8c653182008-11-04 12:19:06 +00001397#ifdef CONFIG_CONSOLE_POLL
1398
1399static int pmz_poll_get_char(struct uart_port *port)
1400{
1401 struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1402
1403 while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0)
1404 udelay(5);
1405 return read_zsdata(uap);
1406}
1407
1408static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1409{
1410 struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1411
1412 /* Wait for the transmit buffer to empty. */
1413 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1414 udelay(5);
1415 write_zsdata(uap, c);
1416}
1417
1418#endif
1419
Linus Torvalds1da177e2005-04-16 15:20:36 -07001420static struct uart_ops pmz_pops = {
1421 .tx_empty = pmz_tx_empty,
1422 .set_mctrl = pmz_set_mctrl,
1423 .get_mctrl = pmz_get_mctrl,
1424 .stop_tx = pmz_stop_tx,
1425 .start_tx = pmz_start_tx,
1426 .stop_rx = pmz_stop_rx,
1427 .enable_ms = pmz_enable_ms,
1428 .break_ctl = pmz_break_ctl,
1429 .startup = pmz_startup,
1430 .shutdown = pmz_shutdown,
1431 .set_termios = pmz_set_termios,
1432 .type = pmz_type,
1433 .release_port = pmz_release_port,
1434 .request_port = pmz_request_port,
1435 .config_port = pmz_config_port,
1436 .verify_port = pmz_verify_port,
Chris J Arges8c653182008-11-04 12:19:06 +00001437#ifdef CONFIG_CONSOLE_POLL
1438 .poll_get_char = pmz_poll_get_char,
1439 .poll_put_char = pmz_poll_put_char,
1440#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001441};
1442
1443/*
1444 * Setup one port structure after probing, HW is down at this point,
1445 * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1446 * register our console before uart_add_one_port() is called
1447 */
1448static int __init pmz_init_port(struct uart_pmac_port *uap)
1449{
1450 struct device_node *np = uap->node;
Jeremy Kerr018a3d12006-07-12 15:40:29 +10001451 const char *conn;
1452 const struct slot_names_prop {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001453 int count;
1454 char name[1];
1455 } *slots;
1456 int len;
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001457 struct resource r_ports, r_rxdma, r_txdma;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001458
1459 /*
1460 * Request & map chip registers
1461 */
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001462 if (of_address_to_resource(np, 0, &r_ports))
1463 return -ENODEV;
1464 uap->port.mapbase = r_ports.start;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465 uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1466
1467 uap->control_reg = uap->port.membase;
1468 uap->data_reg = uap->control_reg + 0x10;
1469
1470 /*
1471 * Request & map DBDMA registers
1472 */
1473#ifdef HAS_DBDMA
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001474 if (of_address_to_resource(np, 1, &r_txdma) == 0 &&
1475 of_address_to_resource(np, 2, &r_rxdma) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001476 uap->flags |= PMACZILOG_FLAG_HAS_DMA;
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001477#else
1478 memset(&r_txdma, 0, sizeof(struct resource));
1479 memset(&r_rxdma, 0, sizeof(struct resource));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001480#endif
1481 if (ZS_HAS_DMA(uap)) {
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001482 uap->tx_dma_regs = ioremap(r_txdma.start, 0x100);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001483 if (uap->tx_dma_regs == NULL) {
1484 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1485 goto no_dma;
1486 }
Benjamin Herrenschmidtcc5d0182005-12-13 18:01:21 +11001487 uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001488 if (uap->rx_dma_regs == NULL) {
1489 iounmap(uap->tx_dma_regs);
1490 uap->tx_dma_regs = NULL;
1491 uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1492 goto no_dma;
1493 }
Benjamin Herrenschmidt0ebfff12006-07-03 21:36:01 +10001494 uap->tx_dma_irq = irq_of_parse_and_map(np, 1);
1495 uap->rx_dma_irq = irq_of_parse_and_map(np, 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001496 }
1497no_dma:
1498
1499 /*
1500 * Detect port type
1501 */
Stephen Rothwell55b61fe2007-05-03 17:26:52 +10001502 if (of_device_is_compatible(np, "cobalt"))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001503 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
Stephen Rothwell40cd3a42007-05-01 13:54:02 +10001504 conn = of_get_property(np, "AAPL,connector", &len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001505 if (conn && (strcmp(conn, "infrared") == 0))
1506 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1507 uap->port_type = PMAC_SCC_ASYNC;
1508 /* 1999 Powerbook G3 has slot-names property instead */
Stephen Rothwell40cd3a42007-05-01 13:54:02 +10001509 slots = of_get_property(np, "slot-names", &len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001510 if (slots && slots->count > 0) {
1511 if (strcmp(slots->name, "IrDA") == 0)
1512 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1513 else if (strcmp(slots->name, "Modem") == 0)
1514 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1515 }
1516 if (ZS_IS_IRDA(uap))
1517 uap->port_type = PMAC_SCC_IRDA;
1518 if (ZS_IS_INTMODEM(uap)) {
Stephen Rothwell30686ba2007-04-24 13:53:04 +10001519 struct device_node* i2c_modem =
1520 of_find_node_by_name(NULL, "i2c-modem");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001521 if (i2c_modem) {
Jeremy Kerr018a3d12006-07-12 15:40:29 +10001522 const char* mid =
Stephen Rothwell40cd3a42007-05-01 13:54:02 +10001523 of_get_property(i2c_modem, "modem-id", NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001524 if (mid) switch(*mid) {
1525 case 0x04 :
1526 case 0x05 :
1527 case 0x07 :
1528 case 0x08 :
1529 case 0x0b :
1530 case 0x0c :
1531 uap->port_type = PMAC_SCC_I2S1;
1532 }
1533 printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n",
1534 mid ? (*mid) : 0);
Stephen Rothwell30686ba2007-04-24 13:53:04 +10001535 of_node_put(i2c_modem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001536 } else {
1537 printk(KERN_INFO "pmac_zilog: serial modem detected\n");
1538 }
1539 }
1540
1541 /*
1542 * Init remaining bits of "port" structure
1543 */
Russell King9b4a1612006-02-05 10:48:10 +00001544 uap->port.iotype = UPIO_MEM;
Benjamin Herrenschmidt0ebfff12006-07-03 21:36:01 +10001545 uap->port.irq = irq_of_parse_and_map(np, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001546 uap->port.uartclk = ZS_CLOCK;
1547 uap->port.fifosize = 1;
1548 uap->port.ops = &pmz_pops;
1549 uap->port.type = PORT_PMAC_ZILOG;
1550 uap->port.flags = 0;
1551
Benjamin Herrenschmidtf08b7e92009-03-30 17:34:04 +00001552 /*
1553 * Fixup for the port on Gatwick for which the device-tree has
1554 * missing interrupts. Normally, the macio_dev would contain
1555 * fixed up interrupt info, but we use the device-tree directly
1556 * here due to early probing so we need the fixup too.
1557 */
1558 if (uap->port.irq == NO_IRQ &&
1559 np->parent && np->parent->parent &&
1560 of_device_is_compatible(np->parent->parent, "gatwick")) {
1561 /* IRQs on gatwick are offset by 64 */
1562 uap->port.irq = irq_create_mapping(NULL, 64 + 15);
1563 uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
1564 uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
1565 }
1566
Linus Torvalds1da177e2005-04-16 15:20:36 -07001567 /* Setup some valid baud rate information in the register
1568 * shadows so we don't write crap there before baud rate is
1569 * first initialized.
1570 */
1571 pmz_convert_to_zs(uap, CS8, 0, 9600);
1572
1573 return 0;
1574}
1575
1576/*
1577 * Get rid of a port on module removal
1578 */
1579static void pmz_dispose_port(struct uart_pmac_port *uap)
1580{
1581 struct device_node *np;
1582
1583 np = uap->node;
1584 iounmap(uap->rx_dma_regs);
1585 iounmap(uap->tx_dma_regs);
1586 iounmap(uap->control_reg);
1587 uap->node = NULL;
1588 of_node_put(np);
1589 memset(uap, 0, sizeof(struct uart_pmac_port));
1590}
1591
1592/*
1593 * Called upon match with an escc node in the devive-tree.
1594 */
Jeff Mahoney5e655772005-07-06 15:44:41 -04001595static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001596{
1597 int i;
1598
1599 /* Iterate the pmz_ports array to find a matching entry
1600 */
1601 for (i = 0; i < MAX_ZS_PORTS; i++)
1602 if (pmz_ports[i].node == mdev->ofdev.node) {
1603 struct uart_pmac_port *uap = &pmz_ports[i];
1604
1605 uap->dev = mdev;
1606 dev_set_drvdata(&mdev->ofdev.dev, uap);
1607 if (macio_request_resources(uap->dev, "pmac_zilog"))
1608 printk(KERN_WARNING "%s: Failed to request resource"
1609 ", port still active\n",
1610 uap->node->name);
1611 else
1612 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED;
1613 return 0;
1614 }
1615 return -ENODEV;
1616}
1617
1618/*
1619 * That one should not be called, macio isn't really a hotswap device,
1620 * we don't expect one of those serial ports to go away...
1621 */
1622static int pmz_detach(struct macio_dev *mdev)
1623{
1624 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1625
1626 if (!uap)
1627 return -ENODEV;
1628
1629 if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) {
1630 macio_release_resources(uap->dev);
1631 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED;
1632 }
1633 dev_set_drvdata(&mdev->ofdev.dev, NULL);
1634 uap->dev = NULL;
1635
1636 return 0;
1637}
1638
1639
Pavel Machek0370aff2005-04-16 15:25:35 -07001640static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001641{
1642 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1643 struct uart_state *state;
1644 unsigned long flags;
1645
1646 if (uap == NULL) {
1647 printk("HRM... pmz_suspend with NULL uap\n");
1648 return 0;
1649 }
1650
Pavel Machekca078ba2005-09-03 15:56:57 -07001651 if (pm_state.event == mdev->ofdev.dev.power.power_state.event)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001652 return 0;
1653
Olaf Heringaa015422007-08-26 19:10:59 +10001654 pmz_debug("suspend, switching to state %d\n", pm_state.event);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001655
1656 state = pmz_uart_reg.state + uap->port.line;
1657
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001658 mutex_lock(&pmz_irq_mutex);
Alan Coxa2bceae2009-09-19 13:13:31 -07001659 mutex_lock(&state->port.mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001660
1661 spin_lock_irqsave(&uap->port.lock, flags);
1662
1663 if (ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)) {
1664 /* Disable receiver and transmitter. */
1665 uap->curregs[R3] &= ~RxENABLE;
1666 uap->curregs[R5] &= ~TxENABLE;
1667
1668 /* Disable all interrupts and BRK assertion. */
1669 uap->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
1670 uap->curregs[R5] &= ~SND_BRK;
1671 pmz_load_zsregs(uap, uap->curregs);
1672 uap->flags |= PMACZILOG_FLAG_IS_ASLEEP;
1673 mb();
1674 }
1675
1676 spin_unlock_irqrestore(&uap->port.lock, flags);
1677
1678 if (ZS_IS_OPEN(uap) || ZS_IS_OPEN(uap->mate))
1679 if (ZS_IS_ASLEEP(uap->mate) && ZS_IS_IRQ_ON(pmz_get_port_A(uap))) {
1680 pmz_get_port_A(uap)->flags &= ~PMACZILOG_FLAG_IS_IRQ_ON;
1681 disable_irq(uap->port.irq);
1682 }
1683
1684 if (ZS_IS_CONS(uap))
1685 uap->port.cons->flags &= ~CON_ENABLED;
1686
1687 /* Shut the chip down */
1688 pmz_set_scc_power(uap, 0);
1689
Alan Coxa2bceae2009-09-19 13:13:31 -07001690 mutex_unlock(&state->port.mutex);
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001691 mutex_unlock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001692
1693 pmz_debug("suspend, switching complete\n");
1694
1695 mdev->ofdev.dev.power.power_state = pm_state;
1696
1697 return 0;
1698}
1699
1700
1701static int pmz_resume(struct macio_dev *mdev)
1702{
1703 struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1704 struct uart_state *state;
1705 unsigned long flags;
1706 int pwr_delay = 0;
1707
1708 if (uap == NULL)
1709 return 0;
1710
Pavel Machekca078ba2005-09-03 15:56:57 -07001711 if (mdev->ofdev.dev.power.power_state.event == PM_EVENT_ON)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001712 return 0;
1713
1714 pmz_debug("resume, switching to state 0\n");
1715
1716 state = pmz_uart_reg.state + uap->port.line;
1717
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001718 mutex_lock(&pmz_irq_mutex);
Alan Coxa2bceae2009-09-19 13:13:31 -07001719 mutex_lock(&state->port.mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001720
1721 spin_lock_irqsave(&uap->port.lock, flags);
1722 if (!ZS_IS_OPEN(uap) && !ZS_IS_CONS(uap)) {
1723 spin_unlock_irqrestore(&uap->port.lock, flags);
1724 goto bail;
1725 }
1726 pwr_delay = __pmz_startup(uap);
1727
1728 /* Take care of config that may have changed while asleep */
1729 __pmz_set_termios(&uap->port, &uap->termios_cache, NULL);
1730
1731 if (ZS_IS_OPEN(uap)) {
1732 /* Enable interrupts */
1733 uap->curregs[R1] |= INT_ALL_Rx | TxINT_ENAB;
1734 if (!ZS_IS_EXTCLK(uap))
1735 uap->curregs[R1] |= EXT_INT_ENAB;
1736 write_zsreg(uap, R1, uap->curregs[R1]);
1737 }
1738
1739 spin_unlock_irqrestore(&uap->port.lock, flags);
1740
1741 if (ZS_IS_CONS(uap))
1742 uap->port.cons->flags |= CON_ENABLED;
1743
1744 /* Re-enable IRQ on the controller */
1745 if (ZS_IS_OPEN(uap) && !ZS_IS_IRQ_ON(pmz_get_port_A(uap))) {
1746 pmz_get_port_A(uap)->flags |= PMACZILOG_FLAG_IS_IRQ_ON;
1747 enable_irq(uap->port.irq);
1748 }
1749
1750 bail:
Alan Coxa2bceae2009-09-19 13:13:31 -07001751 mutex_unlock(&state->port.mutex);
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001752 mutex_unlock(&pmz_irq_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001753
1754 /* Right now, we deal with delay by blocking here, I'll be
1755 * smarter later on
1756 */
1757 if (pwr_delay != 0) {
1758 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
1759 msleep(pwr_delay);
1760 }
1761
1762 pmz_debug("resume, switching complete\n");
1763
Pavel Machekca078ba2005-09-03 15:56:57 -07001764 mdev->ofdev.dev.power.power_state.event = PM_EVENT_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001765
1766 return 0;
1767}
1768
1769/*
1770 * Probe all ports in the system and build the ports array, we register
1771 * with the serial layer at this point, the macio-type probing is only
1772 * used later to "attach" to the sysfs tree so we get power management
1773 * events
1774 */
1775static int __init pmz_probe(void)
1776{
1777 struct device_node *node_p, *node_a, *node_b, *np;
1778 int count = 0;
1779 int rc;
1780
1781 /*
1782 * Find all escc chips in the system
1783 */
1784 node_p = of_find_node_by_name(NULL, "escc");
1785 while (node_p) {
1786 /*
1787 * First get channel A/B node pointers
1788 *
1789 * TODO: Add routines with proper locking to do that...
1790 */
1791 node_a = node_b = NULL;
1792 for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) {
1793 if (strncmp(np->name, "ch-a", 4) == 0)
1794 node_a = of_node_get(np);
1795 else if (strncmp(np->name, "ch-b", 4) == 0)
1796 node_b = of_node_get(np);
1797 }
1798 if (!node_a && !node_b) {
1799 of_node_put(node_a);
1800 of_node_put(node_b);
1801 printk(KERN_ERR "pmac_zilog: missing node %c for escc %s\n",
1802 (!node_a) ? 'a' : 'b', node_p->full_name);
1803 goto next;
1804 }
1805
1806 /*
1807 * Fill basic fields in the port structures
1808 */
1809 pmz_ports[count].mate = &pmz_ports[count+1];
1810 pmz_ports[count+1].mate = &pmz_ports[count];
1811 pmz_ports[count].flags = PMACZILOG_FLAG_IS_CHANNEL_A;
1812 pmz_ports[count].node = node_a;
1813 pmz_ports[count+1].node = node_b;
1814 pmz_ports[count].port.line = count;
1815 pmz_ports[count+1].port.line = count+1;
1816
1817 /*
1818 * Setup the ports for real
1819 */
1820 rc = pmz_init_port(&pmz_ports[count]);
1821 if (rc == 0 && node_b != NULL)
1822 rc = pmz_init_port(&pmz_ports[count+1]);
1823 if (rc != 0) {
1824 of_node_put(node_a);
1825 of_node_put(node_b);
1826 memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port));
1827 memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port));
1828 goto next;
1829 }
1830 count += 2;
1831next:
1832 node_p = of_find_node_by_name(node_p, "escc");
1833 }
1834 pmz_ports_count = count;
1835
1836 return 0;
1837}
1838
1839#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1840
1841static void pmz_console_write(struct console *con, const char *s, unsigned int count);
1842static int __init pmz_console_setup(struct console *co, char *options);
1843
1844static struct console pmz_console = {
David Woodhousee4533b22007-04-05 00:19:43 +10001845 .name = PMACZILOG_NAME,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001846 .write = pmz_console_write,
1847 .device = uart_console_device,
1848 .setup = pmz_console_setup,
1849 .flags = CON_PRINTBUFFER,
1850 .index = -1,
1851 .data = &pmz_uart_reg,
1852};
1853
1854#define PMACZILOG_CONSOLE &pmz_console
1855#else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1856#define PMACZILOG_CONSOLE (NULL)
1857#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1858
1859/*
1860 * Register the driver, console driver and ports with the serial
1861 * core
1862 */
1863static int __init pmz_register(void)
1864{
1865 int i, rc;
1866
1867 pmz_uart_reg.nr = pmz_ports_count;
1868 pmz_uart_reg.cons = PMACZILOG_CONSOLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001869
1870 /*
1871 * Register this driver with the serial core
1872 */
1873 rc = uart_register_driver(&pmz_uart_reg);
1874 if (rc)
1875 return rc;
1876
1877 /*
1878 * Register each port with the serial core
1879 */
1880 for (i = 0; i < pmz_ports_count; i++) {
1881 struct uart_pmac_port *uport = &pmz_ports[i];
1882 /* NULL node may happen on wallstreet */
1883 if (uport->node != NULL)
1884 rc = uart_add_one_port(&pmz_uart_reg, &uport->port);
1885 if (rc)
1886 goto err_out;
1887 }
1888
1889 return 0;
1890err_out:
1891 while (i-- > 0) {
1892 struct uart_pmac_port *uport = &pmz_ports[i];
1893 uart_remove_one_port(&pmz_uart_reg, &uport->port);
1894 }
1895 uart_unregister_driver(&pmz_uart_reg);
1896 return rc;
1897}
1898
Jeff Mahoney5e655772005-07-06 15:44:41 -04001899static struct of_device_id pmz_match[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001900{
1901 {
1902 .name = "ch-a",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001903 },
1904 {
1905 .name = "ch-b",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001906 },
1907 {},
1908};
Jeff Mahoney5e655772005-07-06 15:44:41 -04001909MODULE_DEVICE_TABLE (of, pmz_match);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001910
1911static struct macio_driver pmz_driver =
1912{
1913 .name = "pmac_zilog",
1914 .match_table = pmz_match,
1915 .probe = pmz_attach,
1916 .remove = pmz_detach,
1917 .suspend = pmz_suspend,
1918 .resume = pmz_resume,
1919};
1920
1921static int __init init_pmz(void)
1922{
1923 int rc, i;
1924 printk(KERN_INFO "%s\n", version);
1925
1926 /*
1927 * First, we need to do a direct OF-based probe pass. We
1928 * do that because we want serial console up before the
1929 * macio stuffs calls us back, and since that makes it
1930 * easier to pass the proper number of channels to
1931 * uart_register_driver()
1932 */
1933 if (pmz_ports_count == 0)
1934 pmz_probe();
1935
1936 /*
1937 * Bail early if no port found
1938 */
1939 if (pmz_ports_count == 0)
1940 return -ENODEV;
1941
1942 /*
1943 * Now we register with the serial layer
1944 */
1945 rc = pmz_register();
1946 if (rc) {
1947 printk(KERN_ERR
1948 "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1949 "pmac_zilog: Did another serial driver already claim the minors?\n");
1950 /* effectively "pmz_unprobe()" */
1951 for (i=0; i < pmz_ports_count; i++)
1952 pmz_dispose_port(&pmz_ports[i]);
1953 return rc;
1954 }
1955
1956 /*
1957 * Then we register the macio driver itself
1958 */
1959 return macio_register_driver(&pmz_driver);
1960}
1961
1962static void __exit exit_pmz(void)
1963{
1964 int i;
1965
1966 /* Get rid of macio-driver (detach from macio) */
1967 macio_unregister_driver(&pmz_driver);
1968
1969 for (i = 0; i < pmz_ports_count; i++) {
1970 struct uart_pmac_port *uport = &pmz_ports[i];
1971 if (uport->node != NULL) {
1972 uart_remove_one_port(&pmz_uart_reg, &uport->port);
1973 pmz_dispose_port(uport);
1974 }
1975 }
1976 /* Unregister UART driver */
1977 uart_unregister_driver(&pmz_uart_reg);
1978}
1979
1980#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1981
Russell Kingd3587882006-03-20 20:00:09 +00001982static void pmz_console_putchar(struct uart_port *port, int ch)
1983{
1984 struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1985
1986 /* Wait for the transmit buffer to empty. */
1987 while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1988 udelay(5);
1989 write_zsdata(uap, ch);
1990}
1991
Linus Torvalds1da177e2005-04-16 15:20:36 -07001992/*
1993 * Print a string to the serial port trying not to disturb
1994 * any possible real use of the port...
1995 */
1996static void pmz_console_write(struct console *con, const char *s, unsigned int count)
1997{
1998 struct uart_pmac_port *uap = &pmz_ports[con->index];
1999 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002000
2001 if (ZS_IS_ASLEEP(uap))
2002 return;
2003 spin_lock_irqsave(&uap->port.lock, flags);
2004
2005 /* Turn of interrupts and enable the transmitter. */
2006 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
2007 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
2008
Russell Kingd3587882006-03-20 20:00:09 +00002009 uart_console_write(&uap->port, s, count, pmz_console_putchar);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002010
2011 /* Restore the values in the registers. */
2012 write_zsreg(uap, R1, uap->curregs[1]);
2013 /* Don't disable the transmitter. */
2014
2015 spin_unlock_irqrestore(&uap->port.lock, flags);
2016}
2017
2018/*
2019 * Setup the serial console
2020 */
2021static int __init pmz_console_setup(struct console *co, char *options)
2022{
2023 struct uart_pmac_port *uap;
2024 struct uart_port *port;
2025 int baud = 38400;
2026 int bits = 8;
2027 int parity = 'n';
2028 int flow = 'n';
2029 unsigned long pwr_delay;
2030
2031 /*
2032 * XServe's default to 57600 bps
2033 */
2034 if (machine_is_compatible("RackMac1,1")
2035 || machine_is_compatible("RackMac1,2")
2036 || machine_is_compatible("MacRISC4"))
2037 baud = 57600;
2038
2039 /*
2040 * Check whether an invalid uart number has been specified, and
2041 * if so, search for the first available port that does have
2042 * console support.
2043 */
2044 if (co->index >= pmz_ports_count)
2045 co->index = 0;
2046 uap = &pmz_ports[co->index];
2047 if (uap->node == NULL)
2048 return -ENODEV;
2049 port = &uap->port;
2050
2051 /*
2052 * Mark port as beeing a console
2053 */
2054 uap->flags |= PMACZILOG_FLAG_IS_CONS;
2055
2056 /*
2057 * Temporary fix for uart layer who didn't setup the spinlock yet
2058 */
2059 spin_lock_init(&port->lock);
2060
2061 /*
2062 * Enable the hardware
2063 */
2064 pwr_delay = __pmz_startup(uap);
2065 if (pwr_delay)
2066 mdelay(pwr_delay);
2067
2068 if (options)
2069 uart_parse_options(options, &baud, &parity, &bits, &flow);
2070
2071 return uart_set_options(port, co, baud, parity, bits, flow);
2072}
2073
2074static int __init pmz_console_init(void)
2075{
2076 /* Probe ports */
2077 pmz_probe();
2078
2079 /* TODO: Autoprobe console based on OF */
2080 /* pmz_console.index = i; */
2081 register_console(&pmz_console);
2082
2083 return 0;
2084
2085}
2086console_initcall(pmz_console_init);
2087#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2088
2089module_init(init_pmz);
2090module_exit(exit_pmz);