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Rafael J. Wysockif58b0822013-03-06 23:46:20 +01001/*
2 * ACPI support for Intel Lynxpoint LPSS.
3 *
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +01004 * Copyright (C) 2013, Intel Corporation
Rafael J. Wysockif58b0822013-03-06 23:46:20 +01005 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
6 * Rafael J. Wysocki <rafael.j.wysocki@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/acpi.h>
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010014#include <linux/clkdev.h>
15#include <linux/clk-provider.h>
16#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/platform_device.h>
19#include <linux/platform_data/clk-lpss.h>
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010020#include <linux/pm_runtime.h>
Heikki Krogerusc78b0832014-05-23 16:15:09 +030021#include <linux/delay.h>
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010022
23#include "internal.h"
24
25ACPI_MODULE_NAME("acpi_lpss");
26
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +020027#ifdef CONFIG_X86_INTEL_LPSS
28
29#define LPSS_ADDR(desc) ((unsigned long)&desc)
30
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010031#define LPSS_CLK_SIZE 0x04
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010032#define LPSS_LTR_SIZE 0x18
33
34/* Offsets relative to LPSS_PRIVATE_OFFSET */
Heikki Krogerused3a8722014-05-19 14:42:07 +030035#define LPSS_CLK_DIVIDER_DEF_MASK (BIT(1) | BIT(16))
Mika Westerberg765bdd42014-06-17 14:33:39 +030036#define LPSS_RESETS 0x04
37#define LPSS_RESETS_RESET_FUNC BIT(0)
38#define LPSS_RESETS_RESET_APB BIT(1)
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010039#define LPSS_GENERAL 0x08
40#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030041#define LPSS_GENERAL_UART_RTS_OVRD BIT(3)
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010042#define LPSS_SW_LTR 0x10
43#define LPSS_AUTO_LTR 0x14
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +010044#define LPSS_LTR_SNOOP_REQ BIT(15)
45#define LPSS_LTR_SNOOP_MASK 0x0000FFFF
46#define LPSS_LTR_SNOOP_LAT_1US 0x800
47#define LPSS_LTR_SNOOP_LAT_32US 0xC00
48#define LPSS_LTR_SNOOP_LAT_SHIFT 5
49#define LPSS_LTR_SNOOP_LAT_CUTOFF 3000
50#define LPSS_LTR_MAX_VAL 0x3FF
Heikki Krogerus06d86412013-06-17 13:25:46 +030051#define LPSS_TX_INT 0x20
52#define LPSS_TX_INT_MASK BIT(1)
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010053
Heikki Krogerusc78b0832014-05-23 16:15:09 +030054#define LPSS_PRV_REG_COUNT 9
55
Heikki Krogerusff8c1af2014-09-02 10:55:07 +030056/* LPSS Flags */
57#define LPSS_CLK BIT(0)
58#define LPSS_CLK_GATE BIT(1)
59#define LPSS_CLK_DIVIDER BIT(2)
60#define LPSS_LTR BIT(3)
61#define LPSS_SAVE_CTX BIT(4)
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +053062#define LPSS_NO_D3_DELAY BIT(5)
Mika Westerbergf6272172013-05-13 12:42:44 +000063
Heikki Krogerus06d86412013-06-17 13:25:46 +030064struct lpss_private_data;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010065
66struct lpss_device_desc {
Heikki Krogerusff8c1af2014-09-02 10:55:07 +030067 unsigned int flags;
Heikki Krogerusfcf07892015-03-06 15:48:38 +020068 const char *clk_con_id;
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +010069 unsigned int prv_offset;
Mika Westerberg958c4eb2013-06-18 16:51:35 +030070 size_t prv_size_override;
Heikki Krogerus06d86412013-06-17 13:25:46 +030071 void (*setup)(struct lpss_private_data *pdata);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010072};
73
Rafael J. Wysockib59cc202013-05-08 11:55:49 +030074static struct lpss_device_desc lpss_dma_desc = {
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +010075 .flags = LPSS_CLK,
Rafael J. Wysockib59cc202013-05-08 11:55:49 +030076};
77
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010078struct lpss_private_data {
79 void __iomem *mmio_base;
80 resource_size_t mmio_size;
Heikki Krogerus03f09f72014-09-02 10:55:09 +030081 unsigned int fixed_clk_rate;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010082 struct clk *clk;
83 const struct lpss_device_desc *dev_desc;
Heikki Krogerusc78b0832014-05-23 16:15:09 +030084 u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
Rafael J. Wysockif58b0822013-03-06 23:46:20 +010085};
86
Heikki Krogerus1f47a772014-09-11 15:19:33 +030087/* UART Component Parameter Register */
88#define LPSS_UART_CPR 0xF4
89#define LPSS_UART_CPR_AFCE BIT(4)
90
Heikki Krogerus06d86412013-06-17 13:25:46 +030091static void lpss_uart_setup(struct lpss_private_data *pdata)
92{
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030093 unsigned int offset;
Heikki Krogerus1f47a772014-09-11 15:19:33 +030094 u32 val;
Heikki Krogerus06d86412013-06-17 13:25:46 +030095
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030096 offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
Heikki Krogerus1f47a772014-09-11 15:19:33 +030097 val = readl(pdata->mmio_base + offset);
98 writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
Heikki Krogerus088f1fd2013-10-09 09:49:20 +030099
Heikki Krogerus1f47a772014-09-11 15:19:33 +0300100 val = readl(pdata->mmio_base + LPSS_UART_CPR);
101 if (!(val & LPSS_UART_CPR_AFCE)) {
102 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
103 val = readl(pdata->mmio_base + offset);
104 val |= LPSS_GENERAL_UART_RTS_OVRD;
105 writel(val, pdata->mmio_base + offset);
106 }
Heikki Krogerus06d86412013-06-17 13:25:46 +0300107}
108
Mika Westerberg30957942015-02-18 13:50:17 +0200109static void lpss_deassert_reset(struct lpss_private_data *pdata)
Mika Westerberg765bdd42014-06-17 14:33:39 +0300110{
111 unsigned int offset;
112 u32 val;
113
114 offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
115 val = readl(pdata->mmio_base + offset);
116 val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
117 writel(val, pdata->mmio_base + offset);
Mika Westerberg30957942015-02-18 13:50:17 +0200118}
119
120#define LPSS_I2C_ENABLE 0x6c
121
122static void byt_i2c_setup(struct lpss_private_data *pdata)
123{
124 lpss_deassert_reset(pdata);
Heikki Krogerus03f09f72014-09-02 10:55:09 +0300125
126 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
127 pdata->fixed_clk_rate = 133000000;
Mika Westerberg3293c7b2015-02-18 13:50:16 +0200128
129 writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
Mika Westerberg765bdd42014-06-17 14:33:39 +0300130}
131
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200132static const struct lpss_device_desc lpt_dev_desc = {
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300133 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100134 .prv_offset = 0x800,
Heikki Krogerused3a8722014-05-19 14:42:07 +0300135};
136
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200137static const struct lpss_device_desc lpt_i2c_dev_desc = {
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300138 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
Heikki Krogerused3a8722014-05-19 14:42:07 +0300139 .prv_offset = 0x800,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100140};
141
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200142static const struct lpss_device_desc lpt_uart_dev_desc = {
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300143 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
Heikki Krogerusfcf07892015-03-06 15:48:38 +0200144 .clk_con_id = "baudclk",
Heikki Krogerus06d86412013-06-17 13:25:46 +0300145 .prv_offset = 0x800,
Heikki Krogerus06d86412013-06-17 13:25:46 +0300146 .setup = lpss_uart_setup,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100147};
148
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200149static const struct lpss_device_desc lpt_sdio_dev_desc = {
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300150 .flags = LPSS_LTR,
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100151 .prv_offset = 0x1000,
Mika Westerberg958c4eb2013-06-18 16:51:35 +0300152 .prv_size_override = 0x1018,
Chew, Chiau Eee1c74812014-02-19 02:24:29 +0800153};
154
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200155static const struct lpss_device_desc byt_pwm_dev_desc = {
Heikki Krogerus3f56bf32014-09-02 10:55:10 +0300156 .flags = LPSS_SAVE_CTX,
Chew, Chiau Eee1c74812014-02-19 02:24:29 +0800157};
158
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530159static const struct lpss_device_desc bsw_pwm_dev_desc = {
160 .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
161};
162
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200163static const struct lpss_device_desc byt_uart_dev_desc = {
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +0100164 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
Heikki Krogerusfcf07892015-03-06 15:48:38 +0200165 .clk_con_id = "baudclk",
Mika Westerbergf6272172013-05-13 12:42:44 +0000166 .prv_offset = 0x800,
Heikki Krogerus06d86412013-06-17 13:25:46 +0300167 .setup = lpss_uart_setup,
Mika Westerbergf6272172013-05-13 12:42:44 +0000168};
169
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530170static const struct lpss_device_desc bsw_uart_dev_desc = {
171 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
172 | LPSS_NO_D3_DELAY,
173 .clk_con_id = "baudclk",
174 .prv_offset = 0x800,
175 .setup = lpss_uart_setup,
176};
177
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200178static const struct lpss_device_desc byt_spi_dev_desc = {
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +0100179 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
Mika Westerbergf6272172013-05-13 12:42:44 +0000180 .prv_offset = 0x400,
Mika Westerbergf6272172013-05-13 12:42:44 +0000181};
182
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200183static const struct lpss_device_desc byt_sdio_dev_desc = {
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +0100184 .flags = LPSS_CLK,
Mika Westerbergf6272172013-05-13 12:42:44 +0000185};
186
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200187static const struct lpss_device_desc byt_i2c_dev_desc = {
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +0100188 .flags = LPSS_CLK | LPSS_SAVE_CTX,
Mika Westerbergf6272172013-05-13 12:42:44 +0000189 .prv_offset = 0x800,
Heikki Krogerus03f09f72014-09-02 10:55:09 +0300190 .setup = byt_i2c_setup,
Alan Cox1bfbd8e2014-08-19 15:55:22 +0300191};
192
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530193static const struct lpss_device_desc bsw_i2c_dev_desc = {
194 .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
195 .prv_offset = 0x800,
196 .setup = byt_i2c_setup,
197};
198
Mika Westerberg30957942015-02-18 13:50:17 +0200199static struct lpss_device_desc bsw_spi_dev_desc = {
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530200 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
201 | LPSS_NO_D3_DELAY,
Mika Westerberg30957942015-02-18 13:50:17 +0200202 .prv_offset = 0x400,
203 .setup = lpss_deassert_reset,
204};
205
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200206#else
207
208#define LPSS_ADDR(desc) (0UL)
209
210#endif /* CONFIG_X86_INTEL_LPSS */
211
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100212static const struct acpi_device_id acpi_lpss_device_ids[] = {
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300213 /* Generic LPSS devices */
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200214 { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300215
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100216 /* Lynxpoint LPSS devices */
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200217 { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
218 { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
219 { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
220 { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
221 { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
222 { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
223 { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100224 { "INT33C7", },
225
Mika Westerbergf6272172013-05-13 12:42:44 +0000226 /* BayTrail LPSS devices */
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200227 { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
228 { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
229 { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
230 { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
231 { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
Mika Westerbergf6272172013-05-13 12:42:44 +0000232 { "INT33B2", },
Jin Yao20482d32014-05-15 18:28:46 +0300233 { "INT33FC", },
Mika Westerbergf6272172013-05-13 12:42:44 +0000234
Alan Cox1bfbd8e2014-08-19 15:55:22 +0300235 /* Braswell LPSS devices */
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530236 { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
237 { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
Mika Westerberg30957942015-02-18 13:50:17 +0200238 { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530239 { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
Alan Cox1bfbd8e2014-08-19 15:55:22 +0300240
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530241 /* Broadwell LPSS devices */
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200242 { "INT3430", LPSS_ADDR(lpt_dev_desc) },
243 { "INT3431", LPSS_ADDR(lpt_dev_desc) },
244 { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
245 { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
246 { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
247 { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
248 { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
Mika Westerberga4d97532013-11-12 11:48:19 +0200249 { "INT3437", },
250
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300251 /* Wildcat Point LPSS devices */
252 { "INT3438", LPSS_ADDR(lpt_dev_desc) },
Jie Yang43218a12014-08-01 09:06:35 +0800253
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100254 { }
255};
256
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200257#ifdef CONFIG_X86_INTEL_LPSS
258
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100259static int is_memory(struct acpi_resource *res, void *not_used)
260{
261 struct resource r;
262 return !acpi_dev_resource_memory(res, &r);
263}
264
265/* LPSS main clock device. */
266static struct platform_device *lpss_clk_dev;
267
268static inline void lpt_register_clock_device(void)
269{
270 lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
271}
272
273static int register_device_clock(struct acpi_device *adev,
274 struct lpss_private_data *pdata)
275{
276 const struct lpss_device_desc *dev_desc = pdata->dev_desc;
Heikki Krogerused3a8722014-05-19 14:42:07 +0300277 const char *devname = dev_name(&adev->dev);
Mika Westerbergf6272172013-05-13 12:42:44 +0000278 struct clk *clk = ERR_PTR(-ENODEV);
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300279 struct lpss_clk_data *clk_data;
Heikki Krogerused3a8722014-05-19 14:42:07 +0300280 const char *parent, *clk_name;
281 void __iomem *prv_base;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100282
283 if (!lpss_clk_dev)
284 lpt_register_clock_device();
285
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300286 clk_data = platform_get_drvdata(lpss_clk_dev);
287 if (!clk_data)
288 return -ENODEV;
Heikki Krogerusb0d00f82014-09-02 10:55:08 +0300289 clk = clk_data->clk;
Rafael J. Wysockib59cc202013-05-08 11:55:49 +0300290
291 if (!pdata->mmio_base
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100292 || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100293 return -ENODATA;
294
Mika Westerbergf6272172013-05-13 12:42:44 +0000295 parent = clk_data->name;
Heikki Krogerused3a8722014-05-19 14:42:07 +0300296 prv_base = pdata->mmio_base + dev_desc->prv_offset;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100297
Heikki Krogerus03f09f72014-09-02 10:55:09 +0300298 if (pdata->fixed_clk_rate) {
299 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
300 pdata->fixed_clk_rate);
301 goto out;
Mika Westerbergf6272172013-05-13 12:42:44 +0000302 }
303
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300304 if (dev_desc->flags & LPSS_CLK_GATE) {
Heikki Krogerused3a8722014-05-19 14:42:07 +0300305 clk = clk_register_gate(NULL, devname, parent, 0,
306 prv_base, 0, 0, NULL);
307 parent = devname;
308 }
309
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300310 if (dev_desc->flags & LPSS_CLK_DIVIDER) {
Heikki Krogerused3a8722014-05-19 14:42:07 +0300311 /* Prevent division by zero */
312 if (!readl(prv_base))
313 writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
314
315 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
316 if (!clk_name)
317 return -ENOMEM;
318 clk = clk_register_fractional_divider(NULL, clk_name, parent,
319 0, prv_base,
320 1, 15, 16, 15, 0, NULL);
321 parent = clk_name;
322
323 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
324 if (!clk_name) {
325 kfree(parent);
326 return -ENOMEM;
327 }
328 clk = clk_register_gate(NULL, clk_name, parent,
329 CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
330 prv_base, 31, 0, NULL);
331 kfree(parent);
332 kfree(clk_name);
Mika Westerbergf6272172013-05-13 12:42:44 +0000333 }
Heikki Krogerus03f09f72014-09-02 10:55:09 +0300334out:
Mika Westerbergf6272172013-05-13 12:42:44 +0000335 if (IS_ERR(clk))
336 return PTR_ERR(clk);
337
Heikki Krogerused3a8722014-05-19 14:42:07 +0300338 pdata->clk = clk;
Heikki Krogerusfcf07892015-03-06 15:48:38 +0200339 clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100340 return 0;
341}
342
343static int acpi_lpss_create_device(struct acpi_device *adev,
344 const struct acpi_device_id *id)
345{
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200346 const struct lpss_device_desc *dev_desc;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100347 struct lpss_private_data *pdata;
Jiang Liu90e97822015-02-05 13:44:43 +0800348 struct resource_entry *rentry;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100349 struct list_head resource_list;
Rafael J. Wysocki8ce62f82014-05-25 14:38:52 +0200350 struct platform_device *pdev;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100351 int ret;
352
Mathias Krauseb2687cd2015-06-13 14:26:50 +0200353 dev_desc = (const struct lpss_device_desc *)id->driver_data;
Rafael J. Wysocki8ce62f82014-05-25 14:38:52 +0200354 if (!dev_desc) {
355 pdev = acpi_create_platform_device(adev);
356 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
357 }
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100358 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
359 if (!pdata)
360 return -ENOMEM;
361
362 INIT_LIST_HEAD(&resource_list);
363 ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
364 if (ret < 0)
365 goto err_out;
366
367 list_for_each_entry(rentry, &resource_list, node)
Jiang Liu90e97822015-02-05 13:44:43 +0800368 if (resource_type(rentry->res) == IORESOURCE_MEM) {
Mika Westerberg958c4eb2013-06-18 16:51:35 +0300369 if (dev_desc->prv_size_override)
370 pdata->mmio_size = dev_desc->prv_size_override;
371 else
Jiang Liu90e97822015-02-05 13:44:43 +0800372 pdata->mmio_size = resource_size(rentry->res);
373 pdata->mmio_base = ioremap(rentry->res->start,
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100374 pdata->mmio_size);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100375 break;
376 }
377
378 acpi_dev_free_resource_list(&resource_list);
379
Rafael J. Wysockid3e13ff2015-07-07 00:31:47 +0200380 if (!pdata->mmio_base) {
381 ret = -ENOMEM;
382 goto err_out;
383 }
384
Mika Westerbergaf65cfe2013-09-02 13:30:25 +0300385 pdata->dev_desc = dev_desc;
386
Heikki Krogerus03f09f72014-09-02 10:55:09 +0300387 if (dev_desc->setup)
388 dev_desc->setup(pdata);
389
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300390 if (dev_desc->flags & LPSS_CLK) {
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100391 ret = register_device_clock(adev, pdata);
392 if (ret) {
Rafael J. Wysockib9e95fc2013-06-19 00:45:34 +0200393 /* Skip the device, but continue the namespace scan. */
394 ret = 0;
395 goto err_out;
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100396 }
397 }
398
Rafael J. Wysockib9e95fc2013-06-19 00:45:34 +0200399 /*
400 * This works around a known issue in ACPI tables where LPSS devices
401 * have _PS0 and _PS3 without _PSC (and no power resources), so
402 * acpi_bus_init_power() will assume that the BIOS has put them into D0.
403 */
404 ret = acpi_device_fix_up_power(adev);
405 if (ret) {
406 /* Skip the device, but continue the namespace scan. */
407 ret = 0;
408 goto err_out;
409 }
410
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100411 adev->driver_data = pdata;
Rafael J. Wysocki8ce62f82014-05-25 14:38:52 +0200412 pdev = acpi_create_platform_device(adev);
413 if (!IS_ERR_OR_NULL(pdev)) {
Rafael J. Wysocki8ce62f82014-05-25 14:38:52 +0200414 return 1;
415 }
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100416
Rafael J. Wysocki8ce62f82014-05-25 14:38:52 +0200417 ret = PTR_ERR(pdev);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100418 adev->driver_data = NULL;
419
420 err_out:
421 kfree(pdata);
422 return ret;
423}
424
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100425static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
426{
427 return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
428}
429
430static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
431 unsigned int reg)
432{
433 writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
434}
435
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100436static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
437{
438 struct acpi_device *adev;
439 struct lpss_private_data *pdata;
440 unsigned long flags;
441 int ret;
442
443 ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
444 if (WARN_ON(ret))
445 return ret;
446
447 spin_lock_irqsave(&dev->power.lock, flags);
448 if (pm_runtime_suspended(dev)) {
449 ret = -EAGAIN;
450 goto out;
451 }
452 pdata = acpi_driver_data(adev);
453 if (WARN_ON(!pdata || !pdata->mmio_base)) {
454 ret = -ENODEV;
455 goto out;
456 }
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100457 *val = __lpss_reg_read(pdata, reg);
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100458
459 out:
460 spin_unlock_irqrestore(&dev->power.lock, flags);
461 return ret;
462}
463
464static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
465 char *buf)
466{
467 u32 ltr_value = 0;
468 unsigned int reg;
469 int ret;
470
471 reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
472 ret = lpss_reg_read(dev, reg, &ltr_value);
473 if (ret)
474 return ret;
475
476 return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
477}
478
479static ssize_t lpss_ltr_mode_show(struct device *dev,
480 struct device_attribute *attr, char *buf)
481{
482 u32 ltr_mode = 0;
483 char *outstr;
484 int ret;
485
486 ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
487 if (ret)
488 return ret;
489
490 outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
491 return sprintf(buf, "%s\n", outstr);
492}
493
494static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
495static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
496static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
497
498static struct attribute *lpss_attrs[] = {
499 &dev_attr_auto_ltr.attr,
500 &dev_attr_sw_ltr.attr,
501 &dev_attr_ltr_mode.attr,
502 NULL,
503};
504
505static struct attribute_group lpss_attr_group = {
506 .attrs = lpss_attrs,
507 .name = "lpss_ltr",
508};
509
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100510static void acpi_lpss_set_ltr(struct device *dev, s32 val)
511{
512 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
513 u32 ltr_mode, ltr_val;
514
515 ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
516 if (val < 0) {
517 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
518 ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
519 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
520 }
521 return;
522 }
523 ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
524 if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
525 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
526 val = LPSS_LTR_MAX_VAL;
527 } else if (val > LPSS_LTR_MAX_VAL) {
528 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
529 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
530 } else {
531 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
532 }
533 ltr_val |= val;
534 __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
535 if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
536 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
537 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
538 }
539}
540
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300541#ifdef CONFIG_PM
542/**
543 * acpi_lpss_save_ctx() - Save the private registers of LPSS device
544 * @dev: LPSS device
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200545 * @pdata: pointer to the private data of the LPSS device
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300546 *
547 * Most LPSS devices have private registers which may loose their context when
548 * the device is powered down. acpi_lpss_save_ctx() saves those registers into
549 * prv_reg_ctx array.
550 */
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200551static void acpi_lpss_save_ctx(struct device *dev,
552 struct lpss_private_data *pdata)
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300553{
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300554 unsigned int i;
555
556 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
557 unsigned long offset = i * sizeof(u32);
558
559 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
560 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
561 pdata->prv_reg_ctx[i], offset);
562 }
563}
564
565/**
566 * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
567 * @dev: LPSS device
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200568 * @pdata: pointer to the private data of the LPSS device
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300569 *
570 * Restores the registers that were previously stored with acpi_lpss_save_ctx().
571 */
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200572static void acpi_lpss_restore_ctx(struct device *dev,
573 struct lpss_private_data *pdata)
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300574{
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300575 unsigned int i;
576
Andy Shevchenko02b98542015-12-04 23:49:21 +0200577 for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
578 unsigned long offset = i * sizeof(u32);
579
580 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
581 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
582 pdata->prv_reg_ctx[i], offset);
583 }
584}
585
586static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
587{
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300588 /*
589 * The following delay is needed or the subsequent write operations may
590 * fail. The LPSS devices are actually PCI devices and the PCI spec
591 * expects 10ms delay before the device can be accessed after D3 to D0
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530592 * transition. However some platforms like BSW does not need this delay.
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300593 */
Srinidhi Kasagarb00855a2015-08-27 21:30:55 +0530594 unsigned int delay = 10; /* default 10ms delay */
595
596 if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
597 delay = 0;
598
599 msleep(delay);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300600}
601
602#ifdef CONFIG_PM_SLEEP
603static int acpi_lpss_suspend_late(struct device *dev)
604{
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200605 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
606 int ret;
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300607
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200608 ret = pm_generic_suspend_late(dev);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300609 if (ret)
610 return ret;
611
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200612 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
613 acpi_lpss_save_ctx(dev, pdata);
614
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300615 return acpi_dev_suspend_late(dev);
616}
617
Fu Zhonghuif4168b62014-09-09 16:30:06 +0200618static int acpi_lpss_resume_early(struct device *dev)
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300619{
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200620 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
621 int ret;
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300622
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200623 ret = acpi_dev_resume_early(dev);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300624 if (ret)
625 return ret;
626
Andy Shevchenko02b98542015-12-04 23:49:21 +0200627 acpi_lpss_d3_to_d0_delay(pdata);
628
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200629 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
630 acpi_lpss_restore_ctx(dev, pdata);
631
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300632 return pm_generic_resume_early(dev);
633}
634#endif /* CONFIG_PM_SLEEP */
635
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300636static int acpi_lpss_runtime_suspend(struct device *dev)
637{
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200638 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
639 int ret;
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300640
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200641 ret = pm_generic_runtime_suspend(dev);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300642 if (ret)
643 return ret;
644
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200645 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
646 acpi_lpss_save_ctx(dev, pdata);
647
Rafael J. Wysocki3df2da92015-02-03 14:29:43 +0100648 return acpi_dev_runtime_suspend(dev);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300649}
650
651static int acpi_lpss_runtime_resume(struct device *dev)
652{
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200653 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
654 int ret;
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300655
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200656 ret = acpi_dev_runtime_resume(dev);
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300657 if (ret)
658 return ret;
659
Andy Shevchenko02b98542015-12-04 23:49:21 +0200660 acpi_lpss_d3_to_d0_delay(pdata);
661
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200662 if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
663 acpi_lpss_restore_ctx(dev, pdata);
664
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300665 return pm_generic_runtime_resume(dev);
666}
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300667#endif /* CONFIG_PM */
668
669static struct dev_pm_domain acpi_lpss_pm_domain = {
670 .ops = {
Rafael J. Wysocki5de21bb92014-11-27 22:38:23 +0100671#ifdef CONFIG_PM
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300672#ifdef CONFIG_PM_SLEEP
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300673 .prepare = acpi_subsys_prepare,
Rafael J. Wysocki58a1fbb2015-10-07 00:50:24 +0200674 .complete = pm_complete_with_resume_check,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300675 .suspend = acpi_subsys_suspend,
Fu Zhonghuif4168b62014-09-09 16:30:06 +0200676 .suspend_late = acpi_lpss_suspend_late,
677 .resume_early = acpi_lpss_resume_early,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300678 .freeze = acpi_subsys_freeze,
679 .poweroff = acpi_subsys_suspend,
Fu Zhonghuif4168b62014-09-09 16:30:06 +0200680 .poweroff_late = acpi_lpss_suspend_late,
681 .restore_early = acpi_lpss_resume_early,
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300682#endif
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300683 .runtime_suspend = acpi_lpss_runtime_suspend,
684 .runtime_resume = acpi_lpss_runtime_resume,
685#endif
686 },
687};
688
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100689static int acpi_lpss_platform_notify(struct notifier_block *nb,
690 unsigned long action, void *data)
691{
692 struct platform_device *pdev = to_platform_device(data);
693 struct lpss_private_data *pdata;
694 struct acpi_device *adev;
695 const struct acpi_device_id *id;
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100696
697 id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
698 if (!id || !id->driver_data)
699 return 0;
700
701 if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
702 return 0;
703
704 pdata = acpi_driver_data(adev);
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200705 if (!pdata)
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100706 return 0;
707
Andy Shevchenkocb39dcd2014-11-05 18:34:45 +0200708 if (pdata->mmio_base &&
709 pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100710 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
711 return 0;
712 }
713
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300714 switch (action) {
Andy Shevchenkode16d552015-12-04 23:49:19 +0200715 case BUS_NOTIFY_BIND_DRIVER:
Andy Shevchenko01ac1702014-11-05 18:34:46 +0200716 pdev->dev.pm_domain = &acpi_lpss_pm_domain;
Andy Shevchenkob5f88dd2015-12-04 23:49:18 +0200717 break;
Andy Shevchenkode16d552015-12-04 23:49:19 +0200718 case BUS_NOTIFY_DRIVER_NOT_BOUND:
Andy Shevchenkob5f88dd2015-12-04 23:49:18 +0200719 case BUS_NOTIFY_UNBOUND_DRIVER:
720 pdev->dev.pm_domain = NULL;
721 break;
722 case BUS_NOTIFY_ADD_DEVICE:
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300723 if (pdata->dev_desc->flags & LPSS_LTR)
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300724 return sysfs_create_group(&pdev->dev.kobj,
725 &lpss_attr_group);
Andy Shevchenko01ac1702014-11-05 18:34:46 +0200726 break;
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300727 case BUS_NOTIFY_DEL_DEVICE:
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300728 if (pdata->dev_desc->flags & LPSS_LTR)
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300729 sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
Andy Shevchenko01ac1702014-11-05 18:34:46 +0200730 break;
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300731 default:
732 break;
733 }
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100734
Heikki Krogerusc78b0832014-05-23 16:15:09 +0300735 return 0;
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100736}
737
738static struct notifier_block acpi_lpss_nb = {
739 .notifier_call = acpi_lpss_platform_notify,
740};
741
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100742static void acpi_lpss_bind(struct device *dev)
743{
744 struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
745
Heikki Krogerusff8c1af2014-09-02 10:55:07 +0300746 if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100747 return;
748
749 if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
750 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
751 else
752 dev_err(dev, "MMIO size insufficient to access LTR\n");
753}
754
755static void acpi_lpss_unbind(struct device *dev)
756{
757 dev->power.set_latency_tolerance = NULL;
758}
759
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100760static struct acpi_scan_handler lpss_handler = {
761 .ids = acpi_lpss_device_ids,
762 .attach = acpi_lpss_create_device,
Rafael J. Wysocki1a8f8352014-02-11 00:35:53 +0100763 .bind = acpi_lpss_bind,
764 .unbind = acpi_lpss_unbind,
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100765};
766
767void __init acpi_lpss_init(void)
768{
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100769 if (!lpt_clk_init()) {
770 bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100771 acpi_scan_add_handler(&lpss_handler);
Rafael J. Wysocki2e0f8822013-03-06 23:46:28 +0100772 }
Rafael J. Wysockif58b0822013-03-06 23:46:20 +0100773}
Rafael J. Wysockid6ddaaa2014-05-30 14:34:05 +0200774
775#else
776
777static struct acpi_scan_handler lpss_handler = {
778 .ids = acpi_lpss_device_ids,
779};
780
781void __init acpi_lpss_init(void)
782{
783 acpi_scan_add_handler(&lpss_handler);
784}
785
786#endif /* CONFIG_X86_INTEL_LPSS */