Christoph Hellwig | f11bb3e | 2015-10-03 15:46:41 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011-2014, Intel Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef _NVME_H |
| 15 | #define _NVME_H |
| 16 | |
| 17 | #include <linux/nvme.h> |
| 18 | #include <linux/pci.h> |
| 19 | #include <linux/kref.h> |
| 20 | #include <linux/blk-mq.h> |
| 21 | |
| 22 | extern unsigned char nvme_io_timeout; |
| 23 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) |
| 24 | |
Matias Bjørling | ca06408 | 2015-10-29 17:57:29 +0900 | [diff] [blame] | 25 | enum { |
| 26 | NVME_NS_LBA = 0, |
| 27 | NVME_NS_LIGHTNVM = 1, |
| 28 | }; |
| 29 | |
Christoph Hellwig | f11bb3e | 2015-10-03 15:46:41 +0200 | [diff] [blame] | 30 | /* |
| 31 | * Represents an NVM Express device. Each nvme_dev is a PCI function. |
| 32 | */ |
| 33 | struct nvme_dev { |
| 34 | struct list_head node; |
| 35 | struct nvme_queue **queues; |
| 36 | struct request_queue *admin_q; |
| 37 | struct blk_mq_tag_set tagset; |
| 38 | struct blk_mq_tag_set admin_tagset; |
| 39 | u32 __iomem *dbs; |
| 40 | struct device *dev; |
| 41 | struct dma_pool *prp_page_pool; |
| 42 | struct dma_pool *prp_small_pool; |
| 43 | int instance; |
| 44 | unsigned queue_count; |
| 45 | unsigned online_queues; |
| 46 | unsigned max_qid; |
| 47 | int q_depth; |
| 48 | u32 db_stride; |
| 49 | u32 ctrl_config; |
| 50 | struct msix_entry *entry; |
| 51 | struct nvme_bar __iomem *bar; |
| 52 | struct list_head namespaces; |
| 53 | struct kref kref; |
| 54 | struct device *device; |
| 55 | struct work_struct reset_work; |
| 56 | struct work_struct probe_work; |
| 57 | struct work_struct scan_work; |
| 58 | char name[12]; |
| 59 | char serial[20]; |
| 60 | char model[40]; |
| 61 | char firmware_rev[8]; |
| 62 | bool subsystem; |
| 63 | u32 max_hw_sectors; |
| 64 | u32 stripe_size; |
| 65 | u32 page_size; |
| 66 | void __iomem *cmb; |
| 67 | dma_addr_t cmb_dma_addr; |
| 68 | u64 cmb_size; |
| 69 | u32 cmbsz; |
| 70 | u16 oncs; |
| 71 | u16 abort_limit; |
| 72 | u8 event_limit; |
| 73 | u8 vwc; |
| 74 | }; |
| 75 | |
| 76 | /* |
| 77 | * An NVM Express namespace is equivalent to a SCSI LUN |
| 78 | */ |
| 79 | struct nvme_ns { |
| 80 | struct list_head list; |
| 81 | |
| 82 | struct nvme_dev *dev; |
| 83 | struct request_queue *queue; |
| 84 | struct gendisk *disk; |
| 85 | struct kref kref; |
| 86 | |
| 87 | unsigned ns_id; |
| 88 | int lba_shift; |
| 89 | u16 ms; |
| 90 | bool ext; |
| 91 | u8 pi_type; |
Matias Bjørling | ca06408 | 2015-10-29 17:57:29 +0900 | [diff] [blame] | 92 | int type; |
Christoph Hellwig | f11bb3e | 2015-10-03 15:46:41 +0200 | [diff] [blame] | 93 | u64 mode_select_num_blocks; |
| 94 | u32 mode_select_block_len; |
| 95 | }; |
| 96 | |
| 97 | /* |
| 98 | * The nvme_iod describes the data in an I/O, including the list of PRP |
| 99 | * entries. You can't see it in this data structure because C doesn't let |
| 100 | * me express that. Use nvme_alloc_iod to ensure there's enough space |
| 101 | * allocated to store the PRP list. |
| 102 | */ |
| 103 | struct nvme_iod { |
| 104 | unsigned long private; /* For the use of the submitter of the I/O */ |
| 105 | int npages; /* In the PRP list. 0 means small pool in use */ |
| 106 | int offset; /* Of PRP list */ |
| 107 | int nents; /* Used in scatterlist */ |
| 108 | int length; /* Of data, in bytes */ |
| 109 | dma_addr_t first_dma; |
| 110 | struct scatterlist meta_sg[1]; /* metadata requires single contiguous buffer */ |
| 111 | struct scatterlist sg[0]; |
| 112 | }; |
| 113 | |
| 114 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
| 115 | { |
| 116 | return (sector >> (ns->lba_shift - 9)); |
| 117 | } |
| 118 | |
| 119 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
| 120 | void *buf, unsigned bufflen); |
| 121 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
| 122 | void *buffer, void __user *ubuffer, unsigned bufflen, |
| 123 | u32 *result, unsigned timeout); |
| 124 | int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id); |
| 125 | int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid, |
| 126 | struct nvme_id_ns **id); |
| 127 | int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log); |
| 128 | int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid, |
| 129 | dma_addr_t dma_addr, u32 *result); |
| 130 | int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11, |
| 131 | dma_addr_t dma_addr, u32 *result); |
| 132 | |
| 133 | struct sg_io_hdr; |
| 134 | |
| 135 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); |
| 136 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); |
| 137 | int nvme_sg_get_version_num(int __user *ip); |
| 138 | |
Matias Bjørling | ca06408 | 2015-10-29 17:57:29 +0900 | [diff] [blame] | 139 | int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); |
| 140 | int nvme_nvm_register(struct request_queue *q, char *disk_name); |
| 141 | void nvme_nvm_unregister(struct request_queue *q, char *disk_name); |
| 142 | |
Christoph Hellwig | f11bb3e | 2015-10-03 15:46:41 +0200 | [diff] [blame] | 143 | #endif /* _NVME_H */ |