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Jassi Brar0da094d2015-01-19 18:35:53 +08001/*
2 * linux/drivers/gpio/gpio-mb86s7x.c
3 *
4 * Copyright (C) 2015 Fujitsu Semiconductor Limited
5 * Copyright (C) 2015 Linaro Ltd.
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/io.h>
18#include <linux/init.h>
19#include <linux/clk.h>
Jassi Brar0da094d2015-01-19 18:35:53 +080020#include <linux/err.h>
21#include <linux/errno.h>
22#include <linux/ioport.h>
23#include <linux/of_device.h>
24#include <linux/gpio/driver.h>
25#include <linux/platform_device.h>
26#include <linux/spinlock.h>
27#include <linux/slab.h>
28
29/*
30 * Only first 8bits of a register correspond to each pin,
31 * so there are 4 registers for 32 pins.
32 */
33#define PDR(x) (0x0 + x / 8 * 4)
34#define DDR(x) (0x10 + x / 8 * 4)
35#define PFR(x) (0x20 + x / 8 * 4)
36
37#define OFFSET(x) BIT((x) % 8)
38
39struct mb86s70_gpio_chip {
40 struct gpio_chip gc;
41 void __iomem *base;
42 struct clk *clk;
43 spinlock_t lock;
44};
45
Jassi Brar0da094d2015-01-19 18:35:53 +080046static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
47{
Linus Walleij01f76b22015-12-07 10:01:36 +010048 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
Jassi Brar0da094d2015-01-19 18:35:53 +080049 unsigned long flags;
50 u32 val;
51
52 spin_lock_irqsave(&gchip->lock, flags);
53
54 val = readl(gchip->base + PFR(gpio));
Axel Linfd9c9632015-01-30 18:26:25 +080055 if (!(val & OFFSET(gpio))) {
56 spin_unlock_irqrestore(&gchip->lock, flags);
57 return -EINVAL;
58 }
59
Jassi Brar0da094d2015-01-19 18:35:53 +080060 val &= ~OFFSET(gpio);
61 writel(val, gchip->base + PFR(gpio));
62
63 spin_unlock_irqrestore(&gchip->lock, flags);
64
65 return 0;
66}
67
68static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
69{
Linus Walleij01f76b22015-12-07 10:01:36 +010070 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
Jassi Brar0da094d2015-01-19 18:35:53 +080071 unsigned long flags;
72 u32 val;
73
74 spin_lock_irqsave(&gchip->lock, flags);
75
76 val = readl(gchip->base + PFR(gpio));
77 val |= OFFSET(gpio);
78 writel(val, gchip->base + PFR(gpio));
79
80 spin_unlock_irqrestore(&gchip->lock, flags);
81}
82
83static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
84{
Linus Walleij01f76b22015-12-07 10:01:36 +010085 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
Jassi Brar0da094d2015-01-19 18:35:53 +080086 unsigned long flags;
87 unsigned char val;
88
89 spin_lock_irqsave(&gchip->lock, flags);
90
91 val = readl(gchip->base + DDR(gpio));
92 val &= ~OFFSET(gpio);
93 writel(val, gchip->base + DDR(gpio));
94
95 spin_unlock_irqrestore(&gchip->lock, flags);
96
97 return 0;
98}
99
100static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
101 unsigned gpio, int value)
102{
Linus Walleij01f76b22015-12-07 10:01:36 +0100103 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
Jassi Brar0da094d2015-01-19 18:35:53 +0800104 unsigned long flags;
105 unsigned char val;
106
107 spin_lock_irqsave(&gchip->lock, flags);
108
109 val = readl(gchip->base + PDR(gpio));
110 if (value)
111 val |= OFFSET(gpio);
112 else
113 val &= ~OFFSET(gpio);
114 writel(val, gchip->base + PDR(gpio));
115
116 val = readl(gchip->base + DDR(gpio));
117 val |= OFFSET(gpio);
118 writel(val, gchip->base + DDR(gpio));
119
120 spin_unlock_irqrestore(&gchip->lock, flags);
121
122 return 0;
123}
124
125static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
126{
Linus Walleij01f76b22015-12-07 10:01:36 +0100127 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
Jassi Brar0da094d2015-01-19 18:35:53 +0800128
129 return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
130}
131
132static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
133{
Linus Walleij01f76b22015-12-07 10:01:36 +0100134 struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
Jassi Brar0da094d2015-01-19 18:35:53 +0800135 unsigned long flags;
136 unsigned char val;
137
138 spin_lock_irqsave(&gchip->lock, flags);
139
140 val = readl(gchip->base + PDR(gpio));
141 if (value)
142 val |= OFFSET(gpio);
143 else
144 val &= ~OFFSET(gpio);
145 writel(val, gchip->base + PDR(gpio));
146
147 spin_unlock_irqrestore(&gchip->lock, flags);
148}
149
150static int mb86s70_gpio_probe(struct platform_device *pdev)
151{
152 struct mb86s70_gpio_chip *gchip;
153 struct resource *res;
154 int ret;
155
156 gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
157 if (gchip == NULL)
158 return -ENOMEM;
159
160 platform_set_drvdata(pdev, gchip);
161
162 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
163 gchip->base = devm_ioremap_resource(&pdev->dev, res);
164 if (IS_ERR(gchip->base))
165 return PTR_ERR(gchip->base);
166
167 gchip->clk = devm_clk_get(&pdev->dev, NULL);
168 if (IS_ERR(gchip->clk))
169 return PTR_ERR(gchip->clk);
170
171 clk_prepare_enable(gchip->clk);
172
173 spin_lock_init(&gchip->lock);
174
175 gchip->gc.direction_output = mb86s70_gpio_direction_output;
176 gchip->gc.direction_input = mb86s70_gpio_direction_input;
177 gchip->gc.request = mb86s70_gpio_request;
178 gchip->gc.free = mb86s70_gpio_free;
179 gchip->gc.get = mb86s70_gpio_get;
180 gchip->gc.set = mb86s70_gpio_set;
181 gchip->gc.label = dev_name(&pdev->dev);
182 gchip->gc.ngpio = 32;
183 gchip->gc.owner = THIS_MODULE;
Linus Walleij58383c72015-11-04 09:56:26 +0100184 gchip->gc.parent = &pdev->dev;
Jassi Brar0da094d2015-01-19 18:35:53 +0800185 gchip->gc.base = -1;
186
Linus Walleij01f76b22015-12-07 10:01:36 +0100187 ret = gpiochip_add_data(&gchip->gc, gchip);
Jassi Brar0da094d2015-01-19 18:35:53 +0800188 if (ret) {
189 dev_err(&pdev->dev, "couldn't register gpio driver\n");
190 clk_disable_unprepare(gchip->clk);
191 }
192
193 return ret;
194}
195
196static int mb86s70_gpio_remove(struct platform_device *pdev)
197{
198 struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);
199
200 gpiochip_remove(&gchip->gc);
201 clk_disable_unprepare(gchip->clk);
202
203 return 0;
204}
205
206static const struct of_device_id mb86s70_gpio_dt_ids[] = {
207 { .compatible = "fujitsu,mb86s70-gpio" },
208 { /* sentinel */ }
209};
Jassi Brar0da094d2015-01-19 18:35:53 +0800210
211static struct platform_driver mb86s70_gpio_driver = {
212 .driver = {
213 .name = "mb86s70-gpio",
214 .of_match_table = mb86s70_gpio_dt_ids,
215 },
216 .probe = mb86s70_gpio_probe,
217 .remove = mb86s70_gpio_remove,
218};
219
220static int __init mb86s70_gpio_init(void)
221{
222 return platform_driver_register(&mb86s70_gpio_driver);
223}
Paul Gortmakerd5610e52016-03-27 11:44:42 -0400224device_initcall(mb86s70_gpio_init);