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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/plat-s3c24xx/cpu.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C24XX CPU Support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*/
23
24
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/interrupt.h>
28#include <linux/ioport.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010029#include <linux/serial_core.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010030#include <linux/platform_device.h>
Ben Dooks3c7d9c82008-04-16 00:15:20 +010031#include <linux/delay.h>
Russell Kingfced80c2008-09-06 12:10:45 +010032#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
Russell Kinga09e64f2008-08-05 16:14:15 +010034#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <asm/irq.h>
Ben Dooks3c7d9c82008-04-16 00:15:20 +010036#include <asm/cacheflush.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40
Russell Kinga09e64f2008-08-05 16:14:15 +010041#include <mach/system-reset.h>
Ben Dooks3c7d9c82008-04-16 00:15:20 +010042
Russell Kinga09e64f2008-08-05 16:14:15 +010043#include <mach/regs-gpio.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010044#include <plat/regs-serial.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
Ben Dooksa2b7ba92008-10-07 22:26:09 +010046#include <plat/cpu.h>
47#include <plat/devs.h>
Ben Dooksd5120ae2008-10-07 23:09:51 +010048#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010049#include <plat/s3c2400.h>
50#include <plat/s3c2410.h>
Ben Dooksd5120ae2008-10-07 23:09:51 +010051#include <plat/s3c2412.h>
Ben Dooks96ce2382006-06-18 23:06:41 +010052#include "s3c244x.h"
Ben Dooksa2b7ba92008-10-07 22:26:09 +010053#include <plat/s3c2440.h>
54#include <plat/s3c2442.h>
55#include <plat/s3c2443.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070056
Linus Torvalds1da177e2005-04-16 15:20:36 -070057/* table of supported CPUs */
58
Lucas Correia Villa Real83f755f2006-02-01 21:24:24 +000059static const char name_s3c2400[] = "S3C2400";
Linus Torvalds1da177e2005-04-16 15:20:36 -070060static const char name_s3c2410[] = "S3C2410";
Ben Dooks68d9ab32006-06-24 21:21:27 +010061static const char name_s3c2412[] = "S3C2412";
Linus Torvalds1da177e2005-04-16 15:20:36 -070062static const char name_s3c2440[] = "S3C2440";
Ben Dooks96ce2382006-06-18 23:06:41 +010063static const char name_s3c2442[] = "S3C2442";
Harald Weltef5fb9b12009-09-22 21:40:39 +010064static const char name_s3c2442b[] = "S3C2442B";
Ben Dookse4d06e32007-02-16 12:12:31 +010065static const char name_s3c2443[] = "S3C2443";
Linus Torvalds1da177e2005-04-16 15:20:36 -070066static const char name_s3c2410a[] = "S3C2410A";
67static const char name_s3c2440a[] = "S3C2440A";
68
69static struct cpu_table cpu_ids[] __initdata = {
70 {
71 .idcode = 0x32410000,
72 .idmask = 0xffffffff,
73 .map_io = s3c2410_map_io,
74 .init_clocks = s3c2410_init_clocks,
75 .init_uarts = s3c2410_init_uarts,
76 .init = s3c2410_init,
77 .name = name_s3c2410
78 },
79 {
80 .idcode = 0x32410002,
81 .idmask = 0xffffffff,
82 .map_io = s3c2410_map_io,
83 .init_clocks = s3c2410_init_clocks,
84 .init_uarts = s3c2410_init_uarts,
Ben Dooksf0176792009-07-30 23:23:38 +010085 .init = s3c2410a_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 .name = name_s3c2410a
87 },
88 {
89 .idcode = 0x32440000,
90 .idmask = 0xffffffff,
Ben Dooks96ce2382006-06-18 23:06:41 +010091 .map_io = s3c244x_map_io,
92 .init_clocks = s3c244x_init_clocks,
93 .init_uarts = s3c244x_init_uarts,
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 .init = s3c2440_init,
95 .name = name_s3c2440
96 },
97 {
98 .idcode = 0x32440001,
99 .idmask = 0xffffffff,
Ben Dooks96ce2382006-06-18 23:06:41 +0100100 .map_io = s3c244x_map_io,
101 .init_clocks = s3c244x_init_clocks,
102 .init_uarts = s3c244x_init_uarts,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 .init = s3c2440_init,
104 .name = name_s3c2440a
Lucas Correia Villa Real83f755f2006-02-01 21:24:24 +0000105 },
106 {
Ben Dooks96ce2382006-06-18 23:06:41 +0100107 .idcode = 0x32440aaa,
108 .idmask = 0xffffffff,
109 .map_io = s3c244x_map_io,
110 .init_clocks = s3c244x_init_clocks,
111 .init_uarts = s3c244x_init_uarts,
112 .init = s3c2442_init,
113 .name = name_s3c2442
114 },
115 {
Harald Weltef5fb9b12009-09-22 21:40:39 +0100116 .idcode = 0x32440aab,
117 .idmask = 0xffffffff,
118 .map_io = s3c244x_map_io,
119 .init_clocks = s3c244x_init_clocks,
120 .init_uarts = s3c244x_init_uarts,
121 .init = s3c2442_init,
122 .name = name_s3c2442b
123 },
124 {
Ben Dooks68d9ab32006-06-24 21:21:27 +0100125 .idcode = 0x32412001,
126 .idmask = 0xffffffff,
127 .map_io = s3c2412_map_io,
128 .init_clocks = s3c2412_init_clocks,
129 .init_uarts = s3c2412_init_uarts,
130 .init = s3c2412_init,
131 .name = name_s3c2412,
132 },
Ben Dooksd9bc55f2006-09-20 20:39:15 +0100133 { /* a newer version of the s3c2412 */
134 .idcode = 0x32412003,
135 .idmask = 0xffffffff,
136 .map_io = s3c2412_map_io,
137 .init_clocks = s3c2412_init_clocks,
138 .init_uarts = s3c2412_init_uarts,
139 .init = s3c2412_init,
140 .name = name_s3c2412,
141 },
Ben Dooks68d9ab32006-06-24 21:21:27 +0100142 {
Ben Dookse4d06e32007-02-16 12:12:31 +0100143 .idcode = 0x32443001,
144 .idmask = 0xffffffff,
145 .map_io = s3c2443_map_io,
146 .init_clocks = s3c2443_init_clocks,
147 .init_uarts = s3c2443_init_uarts,
148 .init = s3c2443_init,
149 .name = name_s3c2443,
150 },
151 {
Lucas Correia Villa Real83f755f2006-02-01 21:24:24 +0000152 .idcode = 0x0, /* S3C2400 doesn't have an idcode */
153 .idmask = 0xffffffff,
154 .map_io = s3c2400_map_io,
155 .init_clocks = s3c2400_init_clocks,
156 .init_uarts = s3c2400_init_uarts,
157 .init = s3c2400_init,
158 .name = name_s3c2400
159 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160};
161
162/* minimal IO mapping */
163
164static struct map_desc s3c_iodesc[] __initdata = {
165 IODESC_ENT(GPIO),
166 IODESC_ENT(IRQ),
167 IODESC_ENT(MEMCTRL),
168 IODESC_ENT(UART)
169};
170
Ben Dooks74b265d2008-10-21 14:06:31 +0100171/* read cpu identificaiton code */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172
Ben Dooks68d9ab32006-06-24 21:21:27 +0100173static unsigned long s3c24xx_read_idcode_v5(void)
174{
175#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
176 return __raw_readl(S3C2412_GSTATUS1);
177#else
178 return 1UL; /* don't look like an 2400 */
179#endif
180}
181
182static unsigned long s3c24xx_read_idcode_v4(void)
183{
184#ifndef CONFIG_CPU_S3C2400
185 return __raw_readl(S3C2410_GSTATUS1);
186#else
187 return 0UL;
188#endif
189}
190
Ben Dooks3c7d9c82008-04-16 00:15:20 +0100191/* Hook for arm_pm_restart to ensure we execute the reset code
192 * with the caches enabled. It seems at least the S3C2440 has a problem
193 * resetting if there is bus activity interrupted by the reset.
194 */
Russell Kingbe093be2009-03-19 16:20:24 +0000195static void s3c24xx_pm_restart(char mode, const char *cmd)
Ben Dooks3c7d9c82008-04-16 00:15:20 +0100196{
197 if (mode != 's') {
198 unsigned long flags;
199
200 local_irq_save(flags);
201 __cpuc_flush_kern_all();
202 __cpuc_flush_user_all();
203
Russell Kingbe093be2009-03-19 16:20:24 +0000204 arch_reset(mode, cmd);
Ben Dooks3c7d9c82008-04-16 00:15:20 +0100205 local_irq_restore(flags);
206 }
207
208 /* fallback, or unhandled */
Russell Kingbe093be2009-03-19 16:20:24 +0000209 arm_machine_restart(mode, cmd);
Ben Dooks3c7d9c82008-04-16 00:15:20 +0100210}
211
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
213{
Lucas Correia Villa Real83f755f2006-02-01 21:24:24 +0000214 unsigned long idcode = 0x0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215
216 /* initialise the io descriptors we need for initialisation */
Ben Dooks74b265d2008-10-21 14:06:31 +0100217 iotable_init(mach_desc, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
219
Ben Dooks68d9ab32006-06-24 21:21:27 +0100220 if (cpu_architecture() >= CPU_ARCH_ARMv5) {
221 idcode = s3c24xx_read_idcode_v5();
222 } else {
223 idcode = s3c24xx_read_idcode_v4();
224 }
Lucas Correia Villa Real83f755f2006-02-01 21:24:24 +0000225
Ben Dooks3c7d9c82008-04-16 00:15:20 +0100226 arm_pm_restart = s3c24xx_pm_restart;
227
Ben Dooks74b265d2008-10-21 14:06:31 +0100228 s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229}