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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_oldpiix.c - Intel PATA/SATA controllers
3 *
Alan Coxab771632008-10-27 15:09:10 +00004 * (C) 2005 Red Hat
Jeff Garzik669a5db2006-08-29 18:12:40 -04005 *
6 * Some parts based on ata_piix.c by Jeff Garzik and others.
7 *
8 * Early PIIX differs significantly from the later PIIX as it lacks
9 * SITRE and the slave timing registers. This means that you have to
10 * set timing per channel, or be clever. Libata tells us whenever it
11 * does drive selection and we use this to reload the timings.
12 *
13 * Because of these behaviour differences PIIX gets its own driver module.
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/blkdev.h>
21#include <linux/delay.h>
22#include <linux/device.h>
23#include <scsi/scsi_host.h>
24#include <linux/libata.h>
25#include <linux/ata.h>
26
27#define DRV_NAME "pata_oldpiix"
Jeff Garzika0fcdc02007-03-09 07:24:15 -050028#define DRV_VERSION "0.5.5"
Jeff Garzik669a5db2006-08-29 18:12:40 -040029
30/**
31 * oldpiix_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +090032 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +090033 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040034 *
35 * Set up cable type and use generic probe init
36 */
37
Tejun Heocc0680a2007-08-06 18:36:23 +090038static int oldpiix_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040039{
Tejun Heocc0680a2007-08-06 18:36:23 +090040 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040041 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
42 static const struct pci_bits oldpiix_enable_bits[] = {
43 { 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
44 { 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */
45 };
46
Alan Coxc9619222006-09-26 17:53:38 +010047 if (!pci_test_config_bits(pdev, &oldpiix_enable_bits[ap->port_no]))
48 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +090049
Tejun Heo9363c382008-04-07 22:47:16 +090050 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040051}
52
53/**
Jeff Garzik669a5db2006-08-29 18:12:40 -040054 * oldpiix_set_piomode - Initialize host controller PATA PIO timings
55 * @ap: Port whose timings we are configuring
Jeff Garzika0fcdc02007-03-09 07:24:15 -050056 * @adev: Device whose timings we are configuring
Jeff Garzik669a5db2006-08-29 18:12:40 -040057 *
58 * Set PIO mode for device, in host controller PCI config space.
59 *
60 * LOCKING:
61 * None (inherited from caller).
62 */
63
64static void oldpiix_set_piomode (struct ata_port *ap, struct ata_device *adev)
65{
66 unsigned int pio = adev->pio_mode - XFER_PIO_0;
67 struct pci_dev *dev = to_pci_dev(ap->host->dev);
68 unsigned int idetm_port= ap->port_no ? 0x42 : 0x40;
69 u16 idetm_data;
70 int control = 0;
71
72 /*
73 * See Intel Document 298600-004 for the timing programing rules
74 * for PIIX/ICH. Note that the early PIIX does not have the slave
75 * timing port at 0x44.
76 */
77
78 static const /* ISP RTC */
79 u8 timings[][2] = { { 0, 0 },
80 { 0, 0 },
81 { 1, 0 },
82 { 2, 1 },
83 { 2, 3 }, };
84
Sergei Shtylyov409ba472007-02-05 19:45:38 +030085 if (pio > 1)
86 control |= 1; /* TIME */
Jeff Garzik669a5db2006-08-29 18:12:40 -040087 if (ata_pio_need_iordy(adev))
Sergei Shtylyov409ba472007-02-05 19:45:38 +030088 control |= 2; /* IE */
Jeff Garzik669a5db2006-08-29 18:12:40 -040089
Sergei Shtylyov409ba472007-02-05 19:45:38 +030090 /* Intel specifies that the prefetch/posting is for disk only */
Jeff Garzik669a5db2006-08-29 18:12:40 -040091 if (adev->class == ATA_DEV_ATA)
Sergei Shtylyov409ba472007-02-05 19:45:38 +030092 control |= 4; /* PPE */
Jeff Garzik669a5db2006-08-29 18:12:40 -040093
94 pci_read_config_word(dev, idetm_port, &idetm_data);
95
Sergei Shtylyov409ba472007-02-05 19:45:38 +030096 /*
97 * Set PPE, IE and TIME as appropriate.
98 * Clear the other drive's timing bits.
99 */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400100 if (adev->devno == 0) {
101 idetm_data &= 0xCCE0;
102 idetm_data |= control;
103 } else {
104 idetm_data &= 0xCC0E;
105 idetm_data |= (control << 4);
106 }
107 idetm_data |= (timings[pio][0] << 12) |
108 (timings[pio][1] << 8);
109 pci_write_config_word(dev, idetm_port, idetm_data);
110
111 /* Track which port is configured */
112 ap->private_data = adev;
113}
114
115/**
116 * oldpiix_set_dmamode - Initialize host controller PATA DMA timings
117 * @ap: Port whose timings we are configuring
118 * @adev: Device to program
Jeff Garzik669a5db2006-08-29 18:12:40 -0400119 *
120 * Set MWDMA mode for device, in host controller PCI config space.
121 *
122 * LOCKING:
123 * None (inherited from caller).
124 */
125
126static void oldpiix_set_dmamode (struct ata_port *ap, struct ata_device *adev)
127{
128 struct pci_dev *dev = to_pci_dev(ap->host->dev);
129 u8 idetm_port = ap->port_no ? 0x42 : 0x40;
130 u16 idetm_data;
131
132 static const /* ISP RTC */
133 u8 timings[][2] = { { 0, 0 },
134 { 0, 0 },
135 { 1, 0 },
136 { 2, 1 },
137 { 2, 3 }, };
138
139 /*
140 * MWDMA is driven by the PIO timings. We must also enable
141 * IORDY unconditionally along with TIME1. PPE has already
142 * been set when the PIO timing was set.
143 */
144
145 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
146 unsigned int control;
147 const unsigned int needed_pio[3] = {
148 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
149 };
150 int pio = needed_pio[mwdma] - XFER_PIO_0;
151
152 pci_read_config_word(dev, idetm_port, &idetm_data);
153
154 control = 3; /* IORDY|TIME0 */
155 /* Intel specifies that the PPE functionality is for disk only */
156 if (adev->class == ATA_DEV_ATA)
157 control |= 4; /* PPE enable */
158
159 /* If the drive MWDMA is faster than it can do PIO then
160 we must force PIO into PIO0 */
161
162 if (adev->pio_mode < needed_pio[mwdma])
163 /* Enable DMA timing only */
164 control |= 8; /* PIO cycles in PIO0 */
165
166 /* Mask out the relevant control and timing bits we will load. Also
167 clear the other drive TIME register as a precaution */
168 if (adev->devno == 0) {
169 idetm_data &= 0xCCE0;
170 idetm_data |= control;
171 } else {
172 idetm_data &= 0xCC0E;
173 idetm_data |= (control << 4);
174 }
175 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
176 pci_write_config_word(dev, idetm_port, idetm_data);
177
178 /* Track which port is configured */
179 ap->private_data = adev;
180}
181
182/**
Tejun Heo9363c382008-04-07 22:47:16 +0900183 * oldpiix_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400184 * @qc: command pending
185 *
186 * Called when the libata layer is about to issue a command. We wrap
187 * this interface so that we can load the correct ATA timings if
Robert P. J. Day3a4fa0a2007-10-19 23:10:43 +0200188 * necessary. Our logic also clears TIME0/TIME1 for the other device so
Jeff Garzik669a5db2006-08-29 18:12:40 -0400189 * that, even if we get this wrong, cycles to the other device will
190 * be made PIO0.
191 */
192
Tejun Heo9363c382008-04-07 22:47:16 +0900193static unsigned int oldpiix_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400194{
195 struct ata_port *ap = qc->ap;
196 struct ata_device *adev = qc->dev;
197
198 if (adev != ap->private_data) {
Alanb7939b12007-02-20 17:47:37 +0000199 oldpiix_set_piomode(ap, adev);
Alan Coxb15b3eb2008-08-01 09:18:34 +0100200 if (ata_dma_enabled(adev))
Jeff Garzik669a5db2006-08-29 18:12:40 -0400201 oldpiix_set_dmamode(ap, adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400202 }
Tejun Heo360ff782010-05-10 21:41:42 +0200203 return ata_bmdma_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400204}
205
206
207static struct scsi_host_template oldpiix_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900208 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400209};
210
Tejun Heo029cfd62008-03-25 12:22:49 +0900211static struct ata_port_operations oldpiix_pata_ops = {
212 .inherits = &ata_bmdma_port_ops,
Tejun Heo9363c382008-04-07 22:47:16 +0900213 .qc_issue = oldpiix_qc_issue,
Tejun Heo029cfd62008-03-25 12:22:49 +0900214 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400215 .set_piomode = oldpiix_set_piomode,
216 .set_dmamode = oldpiix_set_dmamode,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900217 .prereset = oldpiix_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400218};
219
220
221/**
222 * oldpiix_init_one - Register PIIX ATA PCI device with kernel services
223 * @pdev: PCI device to register
224 * @ent: Entry in oldpiix_pci_tbl matching with @pdev
225 *
226 * Called from kernel PCI layer. We probe for combined mode (sigh),
227 * and then hand over control to libata, for it to do the rest.
228 *
229 * LOCKING:
230 * Inherited from PCI layer (may sleep).
231 *
232 * RETURNS:
233 * Zero on success, or -ERRNO value.
234 */
235
236static int oldpiix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
237{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200238 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400239 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100240 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz82563232009-12-03 17:52:16 -0500241 .mwdma_mask = ATA_MWDMA12_ONLY,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400242 .port_ops = &oldpiix_pata_ops,
243 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200244 const struct ata_port_info *ppi[] = { &info, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400245
Joe Perches06296a12011-04-15 15:52:00 -0700246 ata_print_version_once(&pdev->dev, DRV_VERSION);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400247
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200248 return ata_pci_bmdma_init_one(pdev, ppi, &oldpiix_sht, NULL, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400249}
250
251static const struct pci_device_id oldpiix_pci_tbl[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400252 { PCI_VDEVICE(INTEL, 0x1230), },
253
Jeff Garzik669a5db2006-08-29 18:12:40 -0400254 { } /* terminate list */
255};
256
257static struct pci_driver oldpiix_pci_driver = {
258 .name = DRV_NAME,
259 .id_table = oldpiix_pci_tbl,
260 .probe = oldpiix_init_one,
261 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900262#ifdef CONFIG_PM
Alan30ced0f2006-11-22 16:57:36 +0000263 .suspend = ata_pci_device_suspend,
264 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900265#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400266};
267
268static int __init oldpiix_init(void)
269{
270 return pci_register_driver(&oldpiix_pci_driver);
271}
272
273static void __exit oldpiix_exit(void)
274{
275 pci_unregister_driver(&oldpiix_pci_driver);
276}
277
Jeff Garzik669a5db2006-08-29 18:12:40 -0400278module_init(oldpiix_init);
279module_exit(oldpiix_exit);
280
281MODULE_AUTHOR("Alan Cox");
282MODULE_DESCRIPTION("SCSI low-level driver for early PIIX series controllers");
283MODULE_LICENSE("GPL");
284MODULE_DEVICE_TABLE(pci, oldpiix_pci_tbl);
285MODULE_VERSION(DRV_VERSION);
286