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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2007-2009 Texas Instruments
Tony Lindgren646e3ed2008-10-06 15:49:36 +03008 *
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070013 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000015 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
Tony Lindgren1dbae812005-11-10 14:26:51 +000019#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Paul Walmsley2f135ea2009-06-19 19:08:25 -060023#include <linux/clk.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000024
Tony Lindgren120db2c2006-04-02 17:46:27 +010025#include <asm/tlb.h>
Tony Lindgren120db2c2006-04-02 17:46:27 +010026#include <asm/mach/map.h>
27
Tony Lindgren45c3eb72012-11-30 08:41:50 -080028#include <linux/omap-dma.h>
Tony Lindgren646e3ed2008-10-06 15:49:36 +030029
Tony Lindgrendc843282012-10-03 11:23:43 -070030#include "omap_hwmod.h"
Tony Lindgrendbc04162012-08-31 10:59:07 -070031#include "soc.h"
Tony Lindgrenee0839c2012-02-24 10:34:35 -080032#include "iomap.h"
33#include "voltage.h"
34#include "powerdomain.h"
35#include "clockdomain.h"
36#include "common.h"
Vaibhav Hiremathe30384a2012-05-29 15:26:41 +053037#include "clock.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070038#include "clock2xxx.h"
Paul Walmsley657ebfa2010-02-22 22:09:20 -070039#include "clock3xxx.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070040#include "clock44xx.h"
Tony Lindgren1d5aef42012-10-03 16:36:40 -070041#include "omap-pm.h"
Paul Walmsley3e6ece12012-10-17 00:46:45 +000042#include "sdrc.h"
Paul Walmsleyb6a42262012-10-29 20:50:21 -060043#include "control.h"
Tony Lindgren3d82cbb2012-10-15 12:50:46 -070044#include "serial.h"
Tony Lindgrenbf027ca2012-10-29 13:54:06 -070045#include "sram.h"
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060046#include "cm2xxx.h"
47#include "cm3xxx.h"
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060048#include "prm.h"
49#include "cm.h"
50#include "prcm_mpu44xx.h"
51#include "prminst44xx.h"
52#include "cminst44xx.h"
Paul Walmsley63a293e2012-11-21 16:15:16 -070053#include "prm2xxx.h"
54#include "prm3xxx.h"
55#include "prm44xx.h"
Tony Lindgren1dbae812005-11-10 14:26:51 +000056
Tony Lindgren1dbae812005-11-10 14:26:51 +000057/*
Rajendra Nayakff931c82013-03-21 16:34:52 +053058 * omap_clk_init: points to a function that does the SoC-specific
59 * clock initializations
60 */
61int (*omap_clk_init)(void);
62
63/*
Tony Lindgren1dbae812005-11-10 14:26:51 +000064 * The machine specific code may provide the extra mapping besides the
65 * default mapping provided here.
66 */
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030067
Tony Lindgrene48f8142012-03-06 11:49:22 -080068#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030069static struct map_desc omap24xx_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000070 {
71 .virtual = L3_24XX_VIRT,
72 .pfn = __phys_to_pfn(L3_24XX_PHYS),
73 .length = L3_24XX_SIZE,
74 .type = MT_DEVICE
75 },
Kyungmin Park09f21ed2008-02-20 15:30:06 -080076 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030077 .virtual = L4_24XX_VIRT,
78 .pfn = __phys_to_pfn(L4_24XX_PHYS),
79 .length = L4_24XX_SIZE,
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080080 .type = MT_DEVICE
81 },
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030082};
83
Tony Lindgren59b479e2011-01-27 16:39:40 -080084#ifdef CONFIG_SOC_OMAP2420
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030085static struct map_desc omap242x_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000086 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070087 .virtual = DSP_MEM_2420_VIRT,
88 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
89 .length = DSP_MEM_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080090 .type = MT_DEVICE
91 },
92 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070093 .virtual = DSP_IPI_2420_VIRT,
94 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
95 .length = DSP_IPI_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080096 .type = MT_DEVICE
97 },
98 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070099 .virtual = DSP_MMU_2420_VIRT,
100 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
101 .length = DSP_MMU_2420_SIZE,
Tony Lindgren1dbae812005-11-10 14:26:51 +0000102 .type = MT_DEVICE
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300103 },
Tony Lindgren1dbae812005-11-10 14:26:51 +0000104};
105
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300106#endif
107
Tony Lindgren59b479e2011-01-27 16:39:40 -0800108#ifdef CONFIG_SOC_OMAP2430
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300109static struct map_desc omap243x_io_desc[] __initdata = {
110 {
111 .virtual = L4_WK_243X_VIRT,
112 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
113 .length = L4_WK_243X_SIZE,
114 .type = MT_DEVICE
115 },
116 {
117 .virtual = OMAP243X_GPMC_VIRT,
118 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
119 .length = OMAP243X_GPMC_SIZE,
120 .type = MT_DEVICE
121 },
122 {
123 .virtual = OMAP243X_SDRC_VIRT,
124 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
125 .length = OMAP243X_SDRC_SIZE,
126 .type = MT_DEVICE
127 },
128 {
129 .virtual = OMAP243X_SMS_VIRT,
130 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
131 .length = OMAP243X_SMS_SIZE,
132 .type = MT_DEVICE
133 },
134};
135#endif
136#endif
137
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800138#ifdef CONFIG_ARCH_OMAP3
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300139static struct map_desc omap34xx_io_desc[] __initdata = {
140 {
141 .virtual = L3_34XX_VIRT,
142 .pfn = __phys_to_pfn(L3_34XX_PHYS),
143 .length = L3_34XX_SIZE,
144 .type = MT_DEVICE
145 },
146 {
147 .virtual = L4_34XX_VIRT,
148 .pfn = __phys_to_pfn(L4_34XX_PHYS),
149 .length = L4_34XX_SIZE,
150 .type = MT_DEVICE
151 },
152 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300153 .virtual = OMAP34XX_GPMC_VIRT,
154 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
155 .length = OMAP34XX_GPMC_SIZE,
156 .type = MT_DEVICE
157 },
158 {
159 .virtual = OMAP343X_SMS_VIRT,
160 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
161 .length = OMAP343X_SMS_SIZE,
162 .type = MT_DEVICE
163 },
164 {
165 .virtual = OMAP343X_SDRC_VIRT,
166 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
167 .length = OMAP343X_SDRC_SIZE,
168 .type = MT_DEVICE
169 },
170 {
171 .virtual = L4_PER_34XX_VIRT,
172 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
173 .length = L4_PER_34XX_SIZE,
174 .type = MT_DEVICE
175 },
176 {
177 .virtual = L4_EMU_34XX_VIRT,
178 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
179 .length = L4_EMU_34XX_SIZE,
180 .type = MT_DEVICE
181 },
Tony Lindgrena4f57b82010-04-30 12:57:14 -0700182#if defined(CONFIG_DEBUG_LL) && \
183 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
184 {
185 .virtual = ZOOM_UART_VIRT,
186 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
187 .length = SZ_1M,
188 .type = MT_DEVICE
189 },
190#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300191};
192#endif
Hemant Pedanekar01001712011-02-16 08:31:39 -0800193
Kevin Hilman33959552012-05-10 11:10:07 -0700194#ifdef CONFIG_SOC_TI81XX
Hemant Pedanekara9203602011-12-13 10:46:44 -0800195static struct map_desc omapti81xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800196 {
197 .virtual = L4_34XX_VIRT,
198 .pfn = __phys_to_pfn(L4_34XX_PHYS),
199 .length = L4_34XX_SIZE,
200 .type = MT_DEVICE
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800201 }
202};
203#endif
204
Afzal Mohammedaddb1542013-05-27 20:06:13 +0530205#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800206static struct map_desc omapam33xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800207 {
208 .virtual = L4_34XX_VIRT,
209 .pfn = __phys_to_pfn(L4_34XX_PHYS),
210 .length = L4_34XX_SIZE,
211 .type = MT_DEVICE
212 },
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800213 {
214 .virtual = L4_WK_AM33XX_VIRT,
215 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
216 .length = L4_WK_AM33XX_SIZE,
217 .type = MT_DEVICE
218 }
Hemant Pedanekar01001712011-02-16 08:31:39 -0800219};
220#endif
221
Santosh Shilimkar44169072009-05-28 14:16:04 -0700222#ifdef CONFIG_ARCH_OMAP4
223static struct map_desc omap44xx_io_desc[] __initdata = {
224 {
225 .virtual = L3_44XX_VIRT,
226 .pfn = __phys_to_pfn(L3_44XX_PHYS),
227 .length = L3_44XX_SIZE,
228 .type = MT_DEVICE,
229 },
230 {
231 .virtual = L4_44XX_VIRT,
232 .pfn = __phys_to_pfn(L4_44XX_PHYS),
233 .length = L4_44XX_SIZE,
234 .type = MT_DEVICE,
235 },
236 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700237 .virtual = L4_PER_44XX_VIRT,
238 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
239 .length = L4_PER_44XX_SIZE,
240 .type = MT_DEVICE,
241 },
Santosh Shilimkar137d1052011-06-25 18:04:31 -0700242#ifdef CONFIG_OMAP4_ERRATA_I688
243 {
244 .virtual = OMAP4_SRAM_VA,
245 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
246 .length = PAGE_SIZE,
247 .type = MT_MEMORY_SO,
248 },
249#endif
250
Santosh Shilimkar44169072009-05-28 14:16:04 -0700251};
252#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300253
R Sricharan05e152c2012-06-05 16:21:32 +0530254#ifdef CONFIG_SOC_OMAP5
255static struct map_desc omap54xx_io_desc[] __initdata = {
256 {
257 .virtual = L3_54XX_VIRT,
258 .pfn = __phys_to_pfn(L3_54XX_PHYS),
259 .length = L3_54XX_SIZE,
260 .type = MT_DEVICE,
261 },
262 {
263 .virtual = L4_54XX_VIRT,
264 .pfn = __phys_to_pfn(L4_54XX_PHYS),
265 .length = L4_54XX_SIZE,
266 .type = MT_DEVICE,
267 },
268 {
269 .virtual = L4_WK_54XX_VIRT,
270 .pfn = __phys_to_pfn(L4_WK_54XX_PHYS),
271 .length = L4_WK_54XX_SIZE,
272 .type = MT_DEVICE,
273 },
274 {
275 .virtual = L4_PER_54XX_VIRT,
276 .pfn = __phys_to_pfn(L4_PER_54XX_PHYS),
277 .length = L4_PER_54XX_SIZE,
278 .type = MT_DEVICE,
279 },
Santosh Shilimkar1348bbf2013-02-15 18:05:49 +0530280#ifdef CONFIG_OMAP4_ERRATA_I688
281 {
282 .virtual = OMAP4_SRAM_VA,
283 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
284 .length = PAGE_SIZE,
285 .type = MT_MEMORY_SO,
286 },
287#endif
R Sricharan05e152c2012-06-05 16:21:32 +0530288};
289#endif
290
Tony Lindgren59b479e2011-01-27 16:39:40 -0800291#ifdef CONFIG_SOC_OMAP2420
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600292void __init omap242x_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800293{
294 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
295 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800296}
297#endif
298
Tony Lindgren59b479e2011-01-27 16:39:40 -0800299#ifdef CONFIG_SOC_OMAP2430
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600300void __init omap243x_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800301{
302 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
303 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800304}
305#endif
306
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800307#ifdef CONFIG_ARCH_OMAP3
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600308void __init omap3_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800309{
310 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800311}
312#endif
313
Kevin Hilman33959552012-05-10 11:10:07 -0700314#ifdef CONFIG_SOC_TI81XX
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600315void __init ti81xx_map_io(void)
Hemant Pedanekar01001712011-02-16 08:31:39 -0800316{
Hemant Pedanekara9203602011-12-13 10:46:44 -0800317 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
Hemant Pedanekar01001712011-02-16 08:31:39 -0800318}
319#endif
320
Afzal Mohammedaddb1542013-05-27 20:06:13 +0530321#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600322void __init am33xx_map_io(void)
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800323{
324 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800325}
326#endif
327
328#ifdef CONFIG_ARCH_OMAP4
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600329void __init omap4_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800330{
331 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
Santosh Shilimkar2ec1fc42012-02-02 19:33:55 +0530332 omap_barriers_init();
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800333}
334#endif
335
R Sricharan05e152c2012-06-05 16:21:32 +0530336#ifdef CONFIG_SOC_OMAP5
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600337void __init omap5_map_io(void)
R Sricharan05e152c2012-06-05 16:21:32 +0530338{
339 iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
Santosh Shilimkar1348bbf2013-02-15 18:05:49 +0530340 omap_barriers_init();
R Sricharan05e152c2012-06-05 16:21:32 +0530341}
342#endif
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600343/*
344 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
345 *
346 * Sets the CORE DPLL3 M2 divider to the same value that it's at
347 * currently. This has the effect of setting the SDRC SDRAM AC timing
348 * registers to the values currently defined by the kernel. Currently
349 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
350 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
351 * or passes along the return value of clk_set_rate().
352 */
353static int __init _omap2_init_reprogram_sdrc(void)
354{
355 struct clk *dpll3_m2_ck;
356 int v = -EINVAL;
357 long rate;
358
359 if (!cpu_is_omap34xx())
360 return 0;
361
362 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
Aaro Koskinene281f7e2010-11-30 14:17:58 +0000363 if (IS_ERR(dpll3_m2_ck))
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600364 return -EINVAL;
365
366 rate = clk_get_rate(dpll3_m2_ck);
367 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
368 v = clk_set_rate(dpll3_m2_ck, rate);
369 if (v)
370 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
371
372 clk_put(dpll3_m2_ck);
373
374 return v;
375}
376
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700377static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
378{
379 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
380}
381
Tony Lindgren7b250af2011-10-04 18:26:28 -0700382static void __init omap_hwmod_init_postsetup(void)
Tony Lindgren120db2c2006-04-02 17:46:27 +0100383{
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700384 u8 postsetup_state;
385
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700386 /* Set the default postsetup state for all hwmods */
387#ifdef CONFIG_PM_RUNTIME
388 postsetup_state = _HWMOD_STATE_IDLE;
389#else
390 postsetup_state = _HWMOD_STATE_ENABLED;
391#endif
392 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
Benoit Cousson55d2cb02010-05-12 17:54:36 +0200393
Kevin Hilman53da4ce2010-12-09 09:13:48 -0600394 omap_pm_if_early_init();
Paul Walmsley48057342010-12-21 15:25:10 -0700395}
396
Arnd Bergmann069d0a72013-07-05 16:20:17 +0200397static void __init __maybe_unused omap_common_late_init(void)
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200398{
399 omap_mux_late_init();
400 omap2_common_pm_late_init();
Ruslan Bilovol6770b212013-02-14 13:55:24 +0200401 omap_soc_device_init();
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200402}
403
Paul Walmsley16110792012-01-25 12:57:46 -0700404#ifdef CONFIG_SOC_OMAP2420
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700405void __init omap2420_init_early(void)
406{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600407 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
408 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
409 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
410 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
411 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600412 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
413 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530414 omap2xxx_check_revision();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700415 omap2xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600416 omap2xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700417 omap2xxx_voltagedomains_init();
418 omap242x_powerdomains_init();
419 omap242x_clockdomains_init();
420 omap2420_hwmod_init();
421 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530422 omap_clk_init = omap2420_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700423}
Shawn Guobbd707a2012-04-26 16:06:50 +0800424
425void __init omap2420_init_late(void)
426{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200427 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800428 omap2_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530429 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800430}
Paul Walmsley16110792012-01-25 12:57:46 -0700431#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700432
Paul Walmsley16110792012-01-25 12:57:46 -0700433#ifdef CONFIG_SOC_OMAP2430
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700434void __init omap2430_init_early(void)
435{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600436 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
437 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
438 OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
439 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
440 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600441 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
442 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530443 omap2xxx_check_revision();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700444 omap2xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600445 omap2xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700446 omap2xxx_voltagedomains_init();
447 omap243x_powerdomains_init();
448 omap243x_clockdomains_init();
449 omap2430_hwmod_init();
450 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530451 omap_clk_init = omap2430_clk_init;
Tony Lindgren7b250af2011-10-04 18:26:28 -0700452}
Shawn Guobbd707a2012-04-26 16:06:50 +0800453
454void __init omap2430_init_late(void)
455{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200456 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800457 omap2_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530458 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800459}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530460#endif
Tony Lindgren7b250af2011-10-04 18:26:28 -0700461
462/*
463 * Currently only board-omap3beagle.c should call this because of the
464 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
465 */
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530466#ifdef CONFIG_ARCH_OMAP3
Tony Lindgren7b250af2011-10-04 18:26:28 -0700467void __init omap3_init_early(void)
468{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600469 omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
470 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
471 OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
472 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
473 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600474 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
475 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530476 omap3xxx_check_revision();
477 omap3xxx_check_features();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700478 omap3xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600479 omap3xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700480 omap3xxx_voltagedomains_init();
481 omap3xxx_powerdomains_init();
482 omap3xxx_clockdomains_init();
483 omap3xxx_hwmod_init();
484 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530485 omap_clk_init = omap3xxx_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700486}
487
488void __init omap3430_init_early(void)
489{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700490 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700491}
492
493void __init omap35xx_init_early(void)
494{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700495 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700496}
497
498void __init omap3630_init_early(void)
499{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700500 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700501}
502
503void __init am35xx_init_early(void)
504{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700505 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700506}
507
Hemant Pedanekara9203602011-12-13 10:46:44 -0800508void __init ti81xx_init_early(void)
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700509{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600510 omap2_set_globals_tap(OMAP343X_CLASS,
511 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
512 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
513 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600514 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
515 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530516 omap3xxx_check_revision();
517 ti81xx_check_features();
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700518 omap3xxx_voltagedomains_init();
519 omap3xxx_powerdomains_init();
520 omap3xxx_clockdomains_init();
521 omap3xxx_hwmod_init();
522 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530523 omap_clk_init = omap3xxx_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700524}
Shawn Guobbd707a2012-04-26 16:06:50 +0800525
526void __init omap3_init_late(void)
527{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200528 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800529 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530530 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800531}
532
533void __init omap3430_init_late(void)
534{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200535 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800536 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530537 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800538}
539
540void __init omap35xx_init_late(void)
541{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200542 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800543 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530544 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800545}
546
547void __init omap3630_init_late(void)
548{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200549 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800550 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530551 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800552}
553
554void __init am35xx_init_late(void)
555{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200556 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800557 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530558 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800559}
560
561void __init ti81xx_init_late(void)
562{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200563 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800564 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530565 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800566}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530567#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700568
Afzal Mohammed08f30982012-05-11 00:38:49 +0530569#ifdef CONFIG_SOC_AM33XX
570void __init am33xx_init_early(void)
571{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600572 omap2_set_globals_tap(AM335X_CLASS,
573 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
574 omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
575 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600576 omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
577 omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
Afzal Mohammed08f30982012-05-11 00:38:49 +0530578 omap3xxx_check_revision();
Vaibhav Hiremath7bcad172013-05-17 15:43:41 +0530579 am33xx_check_features();
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -0600580 am33xx_powerdomains_init();
Vaibhav Hiremath9c80f3a2012-06-18 00:47:27 -0600581 am33xx_clockdomains_init();
Vaibhav Hirematha2cfc502012-07-25 13:51:13 -0600582 am33xx_hwmod_init();
583 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530584 omap_clk_init = am33xx_clk_init;
Afzal Mohammed08f30982012-05-11 00:38:49 +0530585}
586#endif
587
Afzal Mohammedc5107022013-05-27 20:06:23 +0530588#ifdef CONFIG_SOC_AM43XX
589void __init am43xx_init_early(void)
590{
591 omap2_set_globals_tap(AM335X_CLASS,
592 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
593 omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
594 NULL);
595 omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE));
596 omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM43XX_PRCM_BASE), NULL);
597 omap3xxx_check_revision();
598}
599#endif
600
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530601#ifdef CONFIG_ARCH_OMAP4
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700602void __init omap4430_init_early(void)
603{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600604 omap2_set_globals_tap(OMAP443X_CLASS,
605 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
606 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
607 OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600608 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
609 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
610 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
611 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
612 omap_prm_base_init();
613 omap_cm_base_init();
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530614 omap4xxx_check_revision();
615 omap4xxx_check_features();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700616 omap44xx_prm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700617 omap44xx_voltagedomains_init();
618 omap44xx_powerdomains_init();
619 omap44xx_clockdomains_init();
620 omap44xx_hwmod_init();
621 omap_hwmod_init_postsetup();
Rajendra Nayakff931c82013-03-21 16:34:52 +0530622 omap_clk_init = omap4xxx_clk_init;
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700623}
Shawn Guobbd707a2012-04-26 16:06:50 +0800624
625void __init omap4430_init_late(void)
626{
Ruslan Bilovol4ed12be2013-02-14 13:55:22 +0200627 omap_common_late_init();
Shawn Guobbd707a2012-04-26 16:06:50 +0800628 omap4_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530629 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800630}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530631#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700632
R Sricharan05e152c2012-06-05 16:21:32 +0530633#ifdef CONFIG_SOC_OMAP5
634void __init omap5_init_early(void)
635{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600636 omap2_set_globals_tap(OMAP54XX_CLASS,
637 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
638 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
639 OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600640 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
641 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
642 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
643 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
644 omap_prm_base_init();
645 omap_cm_base_init();
Santosh Shilimkare4020aa2013-05-29 12:38:12 -0400646 omap44xx_prm_init();
R Sricharan05e152c2012-06-05 16:21:32 +0530647 omap5xxx_check_revision();
Santosh Shilimkare4020aa2013-05-29 12:38:12 -0400648 omap54xx_voltagedomains_init();
649 omap54xx_powerdomains_init();
650 omap54xx_clockdomains_init();
651 omap54xx_hwmod_init();
652 omap_hwmod_init_postsetup();
R Sricharan05e152c2012-06-05 16:21:32 +0530653}
654#endif
655
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700656void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
Paul Walmsley48057342010-12-21 15:25:10 -0700657 struct omap_sdrc_params *sdrc_cs1)
658{
Tony Lindgrena66cb342011-10-04 13:52:57 -0700659 omap_sram_init();
660
Hemant Pedanekar01001712011-02-16 08:31:39 -0800661 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
Kevin Hilmanaa4b1f62010-03-10 17:16:31 +0000662 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
663 _omap2_init_reprogram_sdrc();
664 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000665}