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Ralf Baechledbee90b2006-02-02 14:31:16 +00001#include <asm/asm-offsets.h>
David Daney7b1c0d22012-07-19 09:11:14 +02002#include <asm/thread_info.h>
David Daney485172b2012-08-14 11:08:01 -07003
Ralf Baechlebef9ae32012-12-28 15:15:25 +01004#define PAGE_SIZE _PAGE_SIZE
5
David Daney485172b2012-08-14 11:08:01 -07006/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <asm-generic/vmlinux.lds.h>
13
Ralf Baechle41c594a2006-04-05 09:45:45 +010014#undef mips
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
Ralf Baechle603bb992007-10-14 22:49:01 +010018PHDRS {
19 text PT_LOAD FLAGS(7); /* RWX */
David Daney3bfb7222015-10-30 00:54:48 +020020#ifndef CONFIG_CAVIUM_OCTEON_SOC
Ralf Baechle603bb992007-10-14 22:49:01 +010021 note PT_NOTE FLAGS(4); /* R__ */
David Daney3bfb7222015-10-30 00:54:48 +020022#endif /* CAVIUM_OCTEON_SOC */
Ralf Baechle603bb992007-10-14 22:49:01 +010023}
Sam Ravnborg51b563f2009-09-20 12:28:22 +020024
Manuel Laussd71789b2009-09-24 21:44:24 +020025#ifdef CONFIG_32BIT
26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
Ralf Baechle70342282013-01-22 12:59:30 +010027 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020028 #else
Ralf Baechle70342282013-01-22 12:59:30 +010029 jiffies = jiffies_64 + 4;
Manuel Laussd71789b2009-09-24 21:44:24 +020030 #endif
31#else
Ralf Baechle70342282013-01-22 12:59:30 +010032 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020033#endif
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020034
Linus Torvalds1da177e2005-04-16 15:20:36 -070035SECTIONS
36{
37#ifdef CONFIG_BOOT_ELF64
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020038 /* Read-only sections, merged into text segment: */
39 /* . = 0xc000000000000000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020041 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
42 /* . = 0xc00000000001c000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020044 /* Set the vaddr for the text segment to a value
45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
46 * >= 0xa800 0000 0030 0000 otherwise
47 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070048
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020049 /* . = 0xa800000000300000; */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020050 . = 0xffffffff80300000;
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#endif
Sam Ravnborg51b563f2009-09-20 12:28:22 +020052 . = VMLINUX_LOAD_ADDRESS;
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020053 /* read-only */
54 _text = .; /* Text and read-only data */
55 .text : {
56 TEXT_TEXT
57 SCHED_TEXT
58 LOCK_TEXT
Ralf Baechlef70fd1b2007-10-14 22:50:05 +010059 KPROBES_TEXT
Wu Zhangjin8f99a162009-11-20 20:34:33 +080060 IRQENTRY_TEXT
Alexander Potapenkobe7635e2016-03-25 14:22:05 -070061 SOFTIRQENTRY_TEXT
Atsushi Nemoto6b3766a2008-08-05 23:45:14 +090062 *(.text.*)
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020063 *(.fixup)
64 *(.gnu.warning)
Ralf Baechle603bb992007-10-14 22:49:01 +010065 } :text = 0
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020066 _etext = .; /* End of text section */
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040068 EXCEPTION_TABLE(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020070 /* Exception table for data bus errors */
71 __dbe_table : {
72 __start___dbe_table = .;
73 *(__dbe_table)
74 __stop___dbe_table = .;
75 }
Ralf Baechle603bb992007-10-14 22:49:01 +010076
David Daney3bfb7222015-10-30 00:54:48 +020077#ifdef CONFIG_CAVIUM_OCTEON_SOC
78#define NOTES_HEADER
79#else /* CONFIG_CAVIUM_OCTEON_SOC */
80#define NOTES_HEADER :note
81#endif /* CONFIG_CAVIUM_OCTEON_SOC */
82 NOTES :text NOTES_HEADER
Ralf Baechle603bb992007-10-14 22:49:01 +010083 .dummy : { *(.dummy) } :text
84
Steven Rostedta2d063a2011-05-19 21:34:58 -040085 _sdata = .; /* Start of data section */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020086 RODATA
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020088 /* writeable */
89 .data : { /* Data */
Franck Bui-Huu16be2432007-10-18 23:12:32 +020090 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
David Daney7b1c0d22012-07-19 09:11:14 +020092 INIT_TASK_DATA(THREAD_SIZE)
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040093 NOSAVE_DATA
94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Catalin Marinasf8bec752011-03-29 11:40:06 +010095 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Franck Bui-Huu16be2432007-10-18 23:12:32 +020096 DATA_DATA
97 CONSTRUCTORS
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020098 }
99 _gp = . + 0x8000;
100 .lit8 : {
101 *(.lit8)
102 }
103 .lit4 : {
104 *(.lit4)
105 }
106 /* We want the small data sections together, so single-instruction offsets
107 can access them all, and initialized data all before uninitialized, so
108 we can shorten the on-disk segment size. */
109 .sdata : {
110 *(.sdata)
111 }
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200112 _edata = .; /* End of data section */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200114 /* will be freed after init */
Nelson Elhagea0b54e22009-07-31 16:58:18 -0400115 . = ALIGN(PAGE_SIZE); /* Init code and data */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200116 __init_begin = .;
Nelson Elhage6eb10bc2009-07-31 16:58:19 -0400117 INIT_TEXT_SECTION(PAGE_SIZE)
118 INIT_DATA_SECTION(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Gabor Juhos487d70d2010-11-23 16:06:25 +0100120 . = ALIGN(4);
121 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
122 __mips_machines_start = .;
123 *(.mips.machines.init)
124 __mips_machines_end = .;
125 }
126
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200127 /* .exit.text is discarded at runtime, not link time, to deal with
128 * references from .rodata
129 */
130 .exit.text : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100131 EXIT_TEXT
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200132 }
133 .exit.data : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100134 EXIT_DATA
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200135 }
Jonas Gorski1da8f172015-04-12 12:24:58 +0200136#ifdef CONFIG_SMP
Tejun Heo0415b00d12011-03-24 18:50:09 +0100137 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Jonas Gorski1da8f172015-04-12 12:24:58 +0200138#endif
Matt Redfearn069fd762016-03-31 10:05:34 +0100139
140#ifdef CONFIG_RELOCATABLE
141 . = ALIGN(4);
142
143 .data.reloc : {
144 _relocation_start = .;
145 /*
146 * Space for relocation table
147 * This needs to be filled so that the
148 * relocs tool can overwrite the content.
149 * An invalid value is left at the start of the
150 * section to abort relocation if the table
151 * has not been filled in.
152 */
153 LONG(0xFFFFFFFF);
154 FILL(0);
155 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
156 _relocation_end = .;
157 }
158#endif
159
Jonas Gorski1da8f172015-04-12 12:24:58 +0200160#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
161 __appended_dtb = .;
162 /* leave space for appended DTB */
163 . += 0x100000;
Aaro Koskinen87db5372015-09-11 17:46:14 +0300164#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
165 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
166 *(.appended_dtb)
167 KEEP(*(.appended_dtb))
168 }
Jonas Gorski1da8f172015-04-12 12:24:58 +0200169#endif
David Daney485172b2012-08-14 11:08:01 -0700170 /*
171 * Align to 64K in attempt to eliminate holes before the
172 * .bss..swapper_pg_dir section at the start of .bss. This
173 * also satisfies PAGE_SIZE alignment as the largest page size
174 * allowed is 64K.
175 */
176 . = ALIGN(0x10000);
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200177 __init_end = .;
178 /* freed after init ends here */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179
David Daney485172b2012-08-14 11:08:01 -0700180 /*
181 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
Ralf Baechle70342282013-01-22 12:59:30 +0100182 * gets that alignment. .sbss should be empty, so there will be
David Daney485172b2012-08-14 11:08:01 -0700183 * no holes after __init_end. */
184 BSS_SECTION(0, 0x10000, 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200186 _end = . ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200188 /* These mark the ABI of the kernel for debuggers. */
189 .mdebug.abi32 : {
190 KEEP(*(.mdebug.abi32))
191 }
192 .mdebug.abi64 : {
193 KEEP(*(.mdebug.abi64))
194 }
Daniel Jacobowitz6c769882007-08-03 11:43:01 -0400195
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200196 /* This is the MIPS specific mdebug section. */
197 .mdebug : {
198 *(.mdebug)
199 }
Atsushi Nemoto78665aa2006-05-11 00:41:26 +0900200
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200201 STABS_DEBUG
202 DWARF_DEBUG
Atsushi Nemoto04b6b3b2006-05-10 15:36:04 +0900203
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200204 /* These must appear regardless of . */
205 .gptab.sdata : {
206 *(.gptab.data)
207 *(.gptab.sdata)
208 }
209 .gptab.sbss : {
210 *(.gptab.bss)
211 *(.gptab.sbss)
212 }
Tejun Heo023bf6f2009-07-09 11:27:40 +0900213
214 /* Sections to be discarded */
215 DISCARDS
216 /DISCARD/ : {
217 /* ABI crap starts here */
Aaro Koskinen61379872015-10-30 00:54:47 +0200218 *(.MIPS.abiflags)
Tejun Heo023bf6f2009-07-09 11:27:40 +0900219 *(.MIPS.options)
220 *(.options)
221 *(.pdr)
222 *(.reginfo)
David Daneyb8199542013-08-08 11:40:49 -0700223 *(.eh_frame)
Tejun Heo023bf6f2009-07-09 11:27:40 +0900224 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225}