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Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/clk.h>
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +01009#include <linux/delay.h>
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070010#include <linux/dw_dmac.h>
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +010011#include <linux/fb.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070012#include <linux/init.h>
13#include <linux/platform_device.h>
David Brownell6b84bbf2007-06-22 19:17:57 -070014#include <linux/dma-mapping.h>
David Brownell3c26e172008-07-27 02:34:45 -070015#include <linux/gpio.h>
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +010016#include <linux/spi/spi.h>
Stelian Pop8d855312008-03-05 00:00:00 +010017#include <linux/usb/atmel_usba_udc.h>
Nicolas Ferrec42aa772008-11-20 15:59:12 +010018#include <linux/atmel-mci.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070019
20#include <asm/io.h>
Haavard Skinnemoene7ba1762007-10-10 14:58:29 +020021#include <asm/irq.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070022
Haavard Skinnemoen3663b732008-08-05 13:57:38 +020023#include <mach/at32ap700x.h>
24#include <mach/board.h>
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +020025#include <mach/hmatrix.h>
Haavard Skinnemoen3663b732008-08-05 13:57:38 +020026#include <mach/portmux.h>
27#include <mach/sram.h>
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070028
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +010029#include <sound/atmel-abdac.h>
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +010030#include <sound/atmel-ac97c.h>
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +010031
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +010032#include <video/atmel_lcdc.h>
33
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070034#include "clock.h"
35#include "pio.h"
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +020036#include "pm.h"
37
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070038
39#define PBMEM(base) \
40 { \
41 .start = base, \
42 .end = base + 0x3ff, \
43 .flags = IORESOURCE_MEM, \
44 }
45#define IRQ(num) \
46 { \
47 .start = num, \
48 .end = num, \
49 .flags = IORESOURCE_IRQ, \
50 }
51#define NAMED_IRQ(num, _name) \
52 { \
53 .start = num, \
54 .end = num, \
55 .name = _name, \
56 .flags = IORESOURCE_IRQ, \
57 }
58
David Brownell6b84bbf2007-06-22 19:17:57 -070059/* REVISIT these assume *every* device supports DMA, but several
60 * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
61 */
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070062#define DEFINE_DEV(_name, _id) \
Yang Hongyang284901a2009-04-06 19:01:15 -070063static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070064static struct platform_device _name##_id##_device = { \
65 .name = #_name, \
66 .id = _id, \
67 .dev = { \
David Brownell6b84bbf2007-06-22 19:17:57 -070068 .dma_mask = &_name##_id##_dma_mask, \
Yang Hongyang284901a2009-04-06 19:01:15 -070069 .coherent_dma_mask = DMA_BIT_MASK(32), \
David Brownell6b84bbf2007-06-22 19:17:57 -070070 }, \
71 .resource = _name##_id##_resource, \
72 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
73}
74#define DEFINE_DEV_DATA(_name, _id) \
Yang Hongyang284901a2009-04-06 19:01:15 -070075static u64 _name##_id##_dma_mask = DMA_BIT_MASK(32); \
David Brownell6b84bbf2007-06-22 19:17:57 -070076static struct platform_device _name##_id##_device = { \
77 .name = #_name, \
78 .id = _id, \
79 .dev = { \
80 .dma_mask = &_name##_id##_dma_mask, \
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070081 .platform_data = &_name##_id##_data, \
Yang Hongyang284901a2009-04-06 19:01:15 -070082 .coherent_dma_mask = DMA_BIT_MASK(32), \
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070083 }, \
84 .resource = _name##_id##_resource, \
85 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
86}
87
Julien Maycaf18f12008-09-24 10:30:47 +020088#define select_peripheral(port, pin_mask, periph, flags) \
89 at32_select_periph(GPIO_##port##_BASE, pin_mask, \
90 GPIO_##periph, flags)
Haavard Skinnemoenc3e2a792006-12-04 13:46:52 +010091
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -070092#define DEV_CLK(_name, devname, bus, _index) \
93static struct clk devname##_##_name = { \
94 .name = #_name, \
95 .dev = &devname##_device.dev, \
96 .parent = &bus##_clk, \
97 .mode = bus##_clk_mode, \
98 .get_rate = bus##_clk_get_rate, \
99 .index = _index, \
100}
101
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200102static DEFINE_SPINLOCK(pm_lock);
103
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100104static struct clk osc0;
105static struct clk osc1;
106
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700107static unsigned long osc_get_rate(struct clk *clk)
108{
Alex60ed7952008-03-17 14:55:06 +0100109 return at32_board_osc_rates[clk->index];
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700110}
111
112static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
113{
114 unsigned long div, mul, rate;
115
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200116 div = PM_BFEXT(PLLDIV, control) + 1;
117 mul = PM_BFEXT(PLLMUL, control) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700118
119 rate = clk->parent->get_rate(clk->parent);
120 rate = (rate + div / 2) / div;
121 rate *= mul;
122
123 return rate;
124}
125
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100126static long pll_set_rate(struct clk *clk, unsigned long rate,
127 u32 *pll_ctrl)
128{
129 unsigned long mul;
130 unsigned long mul_best_fit = 0;
131 unsigned long div;
132 unsigned long div_min;
133 unsigned long div_max;
134 unsigned long div_best_fit = 0;
135 unsigned long base;
136 unsigned long pll_in;
137 unsigned long actual = 0;
138 unsigned long rate_error;
139 unsigned long rate_error_prev = ~0UL;
140 u32 ctrl;
141
142 /* Rate must be between 80 MHz and 200 Mhz. */
143 if (rate < 80000000UL || rate > 200000000UL)
144 return -EINVAL;
145
146 ctrl = PM_BF(PLLOPT, 4);
147 base = clk->parent->get_rate(clk->parent);
148
149 /* PLL input frequency must be between 6 MHz and 32 MHz. */
150 div_min = DIV_ROUND_UP(base, 32000000UL);
151 div_max = base / 6000000UL;
152
153 if (div_max < div_min)
154 return -EINVAL;
155
156 for (div = div_min; div <= div_max; div++) {
157 pll_in = (base + div / 2) / div;
158 mul = (rate + pll_in / 2) / pll_in;
159
160 if (mul == 0)
161 continue;
162
163 actual = pll_in * mul;
164 rate_error = abs(actual - rate);
165
166 if (rate_error < rate_error_prev) {
167 mul_best_fit = mul;
168 div_best_fit = div;
169 rate_error_prev = rate_error;
170 }
171
172 if (rate_error == 0)
173 break;
174 }
175
176 if (div_best_fit == 0)
177 return -EINVAL;
178
179 ctrl |= PM_BF(PLLMUL, mul_best_fit - 1);
180 ctrl |= PM_BF(PLLDIV, div_best_fit - 1);
181 ctrl |= PM_BF(PLLCOUNT, 16);
182
183 if (clk->parent == &osc1)
184 ctrl |= PM_BIT(PLLOSC);
185
186 *pll_ctrl = ctrl;
187
188 return actual;
189}
190
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700191static unsigned long pll0_get_rate(struct clk *clk)
192{
193 u32 control;
194
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200195 control = pm_readl(PLL0);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700196
197 return pll_get_rate(clk, control);
198}
199
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100200static void pll1_mode(struct clk *clk, int enabled)
201{
202 unsigned long timeout;
203 u32 status;
204 u32 ctrl;
205
206 ctrl = pm_readl(PLL1);
207
208 if (enabled) {
209 if (!PM_BFEXT(PLLMUL, ctrl) && !PM_BFEXT(PLLDIV, ctrl)) {
210 pr_debug("clk %s: failed to enable, rate not set\n",
211 clk->name);
212 return;
213 }
214
215 ctrl |= PM_BIT(PLLEN);
216 pm_writel(PLL1, ctrl);
217
218 /* Wait for PLL lock. */
219 for (timeout = 10000; timeout; timeout--) {
220 status = pm_readl(ISR);
221 if (status & PM_BIT(LOCK1))
222 break;
223 udelay(10);
224 }
225
226 if (!(status & PM_BIT(LOCK1)))
227 printk(KERN_ERR "clk %s: timeout waiting for lock\n",
228 clk->name);
229 } else {
230 ctrl &= ~PM_BIT(PLLEN);
231 pm_writel(PLL1, ctrl);
232 }
233}
234
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700235static unsigned long pll1_get_rate(struct clk *clk)
236{
237 u32 control;
238
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200239 control = pm_readl(PLL1);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700240
241 return pll_get_rate(clk, control);
242}
243
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100244static long pll1_set_rate(struct clk *clk, unsigned long rate, int apply)
245{
246 u32 ctrl = 0;
247 unsigned long actual_rate;
248
249 actual_rate = pll_set_rate(clk, rate, &ctrl);
250
251 if (apply) {
252 if (actual_rate != rate)
253 return -EINVAL;
254 if (clk->users > 0)
255 return -EBUSY;
256 pr_debug(KERN_INFO "clk %s: new rate %lu (actual rate %lu)\n",
257 clk->name, rate, actual_rate);
258 pm_writel(PLL1, ctrl);
259 }
260
261 return actual_rate;
262}
263
264static int pll1_set_parent(struct clk *clk, struct clk *parent)
265{
266 u32 ctrl;
267
268 if (clk->users > 0)
269 return -EBUSY;
270
271 ctrl = pm_readl(PLL1);
272 WARN_ON(ctrl & PM_BIT(PLLEN));
273
274 if (parent == &osc0)
275 ctrl &= ~PM_BIT(PLLOSC);
276 else if (parent == &osc1)
277 ctrl |= PM_BIT(PLLOSC);
278 else
279 return -EINVAL;
280
281 pm_writel(PLL1, ctrl);
282 clk->parent = parent;
283
284 return 0;
285}
286
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700287/*
288 * The AT32AP7000 has five primary clock sources: One 32kHz
289 * oscillator, two crystal oscillators and two PLLs.
290 */
291static struct clk osc32k = {
292 .name = "osc32k",
293 .get_rate = osc_get_rate,
294 .users = 1,
295 .index = 0,
296};
297static struct clk osc0 = {
298 .name = "osc0",
299 .get_rate = osc_get_rate,
300 .users = 1,
301 .index = 1,
302};
303static struct clk osc1 = {
304 .name = "osc1",
305 .get_rate = osc_get_rate,
306 .index = 2,
307};
308static struct clk pll0 = {
309 .name = "pll0",
310 .get_rate = pll0_get_rate,
311 .parent = &osc0,
312};
313static struct clk pll1 = {
314 .name = "pll1",
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100315 .mode = pll1_mode,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700316 .get_rate = pll1_get_rate,
Hans-Christian Egtvedt35bf50c2007-12-19 09:29:19 +0100317 .set_rate = pll1_set_rate,
318 .set_parent = pll1_set_parent,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700319 .parent = &osc0,
320};
321
322/*
323 * The main clock can be either osc0 or pll0. The boot loader may
324 * have chosen one for us, so we don't really know which one until we
325 * have a look at the SM.
326 */
327static struct clk *main_clock;
328
329/*
330 * Synchronous clocks are generated from the main clock. The clocks
331 * must satisfy the constraint
332 * fCPU >= fHSB >= fPB
333 * i.e. each clock must not be faster than its parent.
334 */
335static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
336{
337 return main_clock->get_rate(main_clock) >> shift;
338};
339
340static void cpu_clk_mode(struct clk *clk, int enabled)
341{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700342 unsigned long flags;
343 u32 mask;
344
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200345 spin_lock_irqsave(&pm_lock, flags);
346 mask = pm_readl(CPU_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700347 if (enabled)
348 mask |= 1 << clk->index;
349 else
350 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200351 pm_writel(CPU_MASK, mask);
352 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700353}
354
355static unsigned long cpu_clk_get_rate(struct clk *clk)
356{
357 unsigned long cksel, shift = 0;
358
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200359 cksel = pm_readl(CKSEL);
360 if (cksel & PM_BIT(CPUDIV))
361 shift = PM_BFEXT(CPUSEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700362
363 return bus_clk_get_rate(clk, shift);
364}
365
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +0200366static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
367{
368 u32 control;
369 unsigned long parent_rate, child_div, actual_rate, div;
370
371 parent_rate = clk->parent->get_rate(clk->parent);
372 control = pm_readl(CKSEL);
373
374 if (control & PM_BIT(HSBDIV))
375 child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
376 else
377 child_div = 1;
378
379 if (rate > 3 * (parent_rate / 4) || child_div == 1) {
380 actual_rate = parent_rate;
381 control &= ~PM_BIT(CPUDIV);
382 } else {
383 unsigned int cpusel;
384 div = (parent_rate + rate / 2) / rate;
385 if (div > child_div)
386 div = child_div;
387 cpusel = (div > 1) ? (fls(div) - 2) : 0;
388 control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
389 actual_rate = parent_rate / (1 << (cpusel + 1));
390 }
391
392 pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
393 clk->name, rate, actual_rate);
394
395 if (apply)
396 pm_writel(CKSEL, control);
397
398 return actual_rate;
399}
400
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700401static void hsb_clk_mode(struct clk *clk, int enabled)
402{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700403 unsigned long flags;
404 u32 mask;
405
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200406 spin_lock_irqsave(&pm_lock, flags);
407 mask = pm_readl(HSB_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700408 if (enabled)
409 mask |= 1 << clk->index;
410 else
411 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200412 pm_writel(HSB_MASK, mask);
413 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700414}
415
416static unsigned long hsb_clk_get_rate(struct clk *clk)
417{
418 unsigned long cksel, shift = 0;
419
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200420 cksel = pm_readl(CKSEL);
421 if (cksel & PM_BIT(HSBDIV))
422 shift = PM_BFEXT(HSBSEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700423
424 return bus_clk_get_rate(clk, shift);
425}
426
Alex Raimondidd5e1332008-12-09 16:17:13 +0100427void pba_clk_mode(struct clk *clk, int enabled)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700428{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700429 unsigned long flags;
430 u32 mask;
431
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200432 spin_lock_irqsave(&pm_lock, flags);
433 mask = pm_readl(PBA_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700434 if (enabled)
435 mask |= 1 << clk->index;
436 else
437 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200438 pm_writel(PBA_MASK, mask);
439 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700440}
441
Alex Raimondidd5e1332008-12-09 16:17:13 +0100442unsigned long pba_clk_get_rate(struct clk *clk)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700443{
444 unsigned long cksel, shift = 0;
445
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200446 cksel = pm_readl(CKSEL);
447 if (cksel & PM_BIT(PBADIV))
448 shift = PM_BFEXT(PBASEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700449
450 return bus_clk_get_rate(clk, shift);
451}
452
453static void pbb_clk_mode(struct clk *clk, int enabled)
454{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700455 unsigned long flags;
456 u32 mask;
457
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200458 spin_lock_irqsave(&pm_lock, flags);
459 mask = pm_readl(PBB_MASK);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700460 if (enabled)
461 mask |= 1 << clk->index;
462 else
463 mask &= ~(1 << clk->index);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200464 pm_writel(PBB_MASK, mask);
465 spin_unlock_irqrestore(&pm_lock, flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700466}
467
468static unsigned long pbb_clk_get_rate(struct clk *clk)
469{
470 unsigned long cksel, shift = 0;
471
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200472 cksel = pm_readl(CKSEL);
473 if (cksel & PM_BIT(PBBDIV))
474 shift = PM_BFEXT(PBBSEL, cksel) + 1;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700475
476 return bus_clk_get_rate(clk, shift);
477}
478
479static struct clk cpu_clk = {
480 .name = "cpu",
481 .get_rate = cpu_clk_get_rate,
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +0200482 .set_rate = cpu_clk_set_rate,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700483 .users = 1,
484};
485static struct clk hsb_clk = {
486 .name = "hsb",
487 .parent = &cpu_clk,
488 .get_rate = hsb_clk_get_rate,
489};
490static struct clk pba_clk = {
491 .name = "pba",
492 .parent = &hsb_clk,
493 .mode = hsb_clk_mode,
494 .get_rate = pba_clk_get_rate,
495 .index = 1,
496};
497static struct clk pbb_clk = {
498 .name = "pbb",
499 .parent = &hsb_clk,
500 .mode = hsb_clk_mode,
501 .get_rate = pbb_clk_get_rate,
502 .users = 1,
503 .index = 2,
504};
505
506/* --------------------------------------------------------------------
507 * Generic Clock operations
508 * -------------------------------------------------------------------- */
509
510static void genclk_mode(struct clk *clk, int enabled)
511{
512 u32 control;
513
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200514 control = pm_readl(GCCTRL(clk->index));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700515 if (enabled)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200516 control |= PM_BIT(CEN);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700517 else
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200518 control &= ~PM_BIT(CEN);
519 pm_writel(GCCTRL(clk->index), control);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700520}
521
522static unsigned long genclk_get_rate(struct clk *clk)
523{
524 u32 control;
525 unsigned long div = 1;
526
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200527 control = pm_readl(GCCTRL(clk->index));
528 if (control & PM_BIT(DIVEN))
529 div = 2 * (PM_BFEXT(DIV, control) + 1);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700530
531 return clk->parent->get_rate(clk->parent) / div;
532}
533
534static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
535{
536 u32 control;
537 unsigned long parent_rate, actual_rate, div;
538
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700539 parent_rate = clk->parent->get_rate(clk->parent);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200540 control = pm_readl(GCCTRL(clk->index));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700541
542 if (rate > 3 * parent_rate / 4) {
543 actual_rate = parent_rate;
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200544 control &= ~PM_BIT(DIVEN);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700545 } else {
546 div = (parent_rate + rate) / (2 * rate) - 1;
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200547 control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700548 actual_rate = parent_rate / (2 * (div + 1));
549 }
550
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200551 dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
552 clk->name, rate, actual_rate);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700553
554 if (apply)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200555 pm_writel(GCCTRL(clk->index), control);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700556
557 return actual_rate;
558}
559
560int genclk_set_parent(struct clk *clk, struct clk *parent)
561{
562 u32 control;
563
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200564 dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
565 clk->name, parent->name, clk->parent->name);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700566
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200567 control = pm_readl(GCCTRL(clk->index));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700568
569 if (parent == &osc1 || parent == &pll1)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200570 control |= PM_BIT(OSCSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700571 else if (parent == &osc0 || parent == &pll0)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200572 control &= ~PM_BIT(OSCSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700573 else
574 return -EINVAL;
575
576 if (parent == &pll0 || parent == &pll1)
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200577 control |= PM_BIT(PLLSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700578 else
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200579 control &= ~PM_BIT(PLLSEL);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700580
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200581 pm_writel(GCCTRL(clk->index), control);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700582 clk->parent = parent;
583
584 return 0;
585}
586
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +0100587static void __init genclk_init_parent(struct clk *clk)
588{
589 u32 control;
590 struct clk *parent;
591
592 BUG_ON(clk->index > 7);
593
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200594 control = pm_readl(GCCTRL(clk->index));
595 if (control & PM_BIT(OSCSEL))
596 parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +0100597 else
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200598 parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +0100599
600 clk->parent = parent;
601}
602
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -0700603static struct dw_dma_platform_data dw_dmac0_data = {
604 .nr_channels = 3,
605};
606
607static struct resource dw_dmac0_resource[] = {
608 PBMEM(0xff200000),
609 IRQ(2),
610};
611DEFINE_DEV_DATA(dw_dmac, 0);
612DEV_CLK(hclk, dw_dmac0, hsb, 10);
613
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700614/* --------------------------------------------------------------------
615 * System peripherals
616 * -------------------------------------------------------------------- */
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200617static struct resource at32_pm0_resource[] = {
618 {
619 .start = 0xfff00000,
620 .end = 0xfff0007f,
621 .flags = IORESOURCE_MEM,
622 },
623 IRQ(20),
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700624};
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200625
626static struct resource at32ap700x_rtc0_resource[] = {
627 {
628 .start = 0xfff00080,
629 .end = 0xfff000af,
630 .flags = IORESOURCE_MEM,
631 },
632 IRQ(21),
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700633};
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200634
635static struct resource at32_wdt0_resource[] = {
636 {
637 .start = 0xfff000b0,
Hans-Christian Egtvedt9797bed2007-10-30 14:29:50 +0100638 .end = 0xfff000cf,
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200639 .flags = IORESOURCE_MEM,
640 },
641};
642
643static struct resource at32_eic0_resource[] = {
644 {
645 .start = 0xfff00100,
646 .end = 0xfff0013f,
647 .flags = IORESOURCE_MEM,
648 },
649 IRQ(19),
650};
651
652DEFINE_DEV(at32_pm, 0);
653DEFINE_DEV(at32ap700x_rtc, 0);
654DEFINE_DEV(at32_wdt, 0);
655DEFINE_DEV(at32_eic, 0);
656
657/*
658 * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
659 * is always running.
660 */
661static struct clk at32_pm_pclk = {
Haavard Skinnemoen188ff652007-03-14 13:23:44 +0100662 .name = "pclk",
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200663 .dev = &at32_pm0_device.dev,
Haavard Skinnemoen188ff652007-03-14 13:23:44 +0100664 .parent = &pbb_clk,
665 .mode = pbb_clk_mode,
666 .get_rate = pbb_clk_get_rate,
667 .users = 1,
668 .index = 0,
669};
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700670
671static struct resource intc0_resource[] = {
672 PBMEM(0xfff00400),
673};
674struct platform_device at32_intc0_device = {
675 .name = "intc",
676 .id = 0,
677 .resource = intc0_resource,
678 .num_resources = ARRAY_SIZE(intc0_resource),
679};
680DEV_CLK(pclk, at32_intc0, pbb, 1);
681
682static struct clk ebi_clk = {
683 .name = "ebi",
684 .parent = &hsb_clk,
685 .mode = hsb_clk_mode,
686 .get_rate = hsb_clk_get_rate,
687 .users = 1,
688};
689static struct clk hramc_clk = {
690 .name = "hramc",
691 .parent = &hsb_clk,
692 .mode = hsb_clk_mode,
693 .get_rate = hsb_clk_get_rate,
694 .users = 1,
Haavard Skinnemoen188ff652007-03-14 13:23:44 +0100695 .index = 3,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700696};
Haavard Skinnemoen7951f182008-03-05 15:08:27 +0100697static struct clk sdramc_clk = {
698 .name = "sdramc_clk",
699 .parent = &pbb_clk,
700 .mode = pbb_clk_mode,
701 .get_rate = pbb_clk_get_rate,
702 .users = 1,
703 .index = 14,
704};
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700705
Haavard Skinnemoenbc157b72006-09-25 23:32:16 -0700706static struct resource smc0_resource[] = {
707 PBMEM(0xfff03400),
708};
709DEFINE_DEV(smc, 0);
710DEV_CLK(pclk, smc0, pbb, 13);
711DEV_CLK(mck, smc0, hsb, 0);
712
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700713static struct platform_device pdc_device = {
714 .name = "pdc",
715 .id = 0,
716};
717DEV_CLK(hclk, pdc, hsb, 4);
718DEV_CLK(pclk, pdc, pba, 16);
719
720static struct clk pico_clk = {
721 .name = "pico",
722 .parent = &cpu_clk,
723 .mode = cpu_clk_mode,
724 .get_rate = cpu_clk_get_rate,
725 .users = 1,
726};
727
728/* --------------------------------------------------------------------
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100729 * HMATRIX
730 * -------------------------------------------------------------------- */
731
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +0200732struct clk at32_hmatrix_clk = {
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100733 .name = "hmatrix_clk",
734 .parent = &pbb_clk,
735 .mode = pbb_clk_mode,
736 .get_rate = pbb_clk_get_rate,
737 .index = 2,
738 .users = 1,
739};
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100740
741/*
742 * Set bits in the HMATRIX Special Function Register (SFR) used by the
743 * External Bus Interface (EBI). This can be used to enable special
744 * features like CompactFlash support, NAND Flash support, etc. on
745 * certain chipselects.
746 */
747static inline void set_ebi_sfr_bits(u32 mask)
748{
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +0200749 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, mask);
Haavard Skinnemoen9c8f8e72007-02-01 16:34:10 +0100750}
751
752/* --------------------------------------------------------------------
David Brownelle723ff62008-02-14 11:24:02 -0800753 * Timer/Counter (TC)
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100754 * -------------------------------------------------------------------- */
David Brownelle723ff62008-02-14 11:24:02 -0800755
756static struct resource at32_tcb0_resource[] = {
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100757 PBMEM(0xfff00c00),
758 IRQ(22),
759};
David Brownelle723ff62008-02-14 11:24:02 -0800760static struct platform_device at32_tcb0_device = {
761 .name = "atmel_tcb",
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100762 .id = 0,
David Brownelle723ff62008-02-14 11:24:02 -0800763 .resource = at32_tcb0_resource,
764 .num_resources = ARRAY_SIZE(at32_tcb0_resource),
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100765};
David Brownelle723ff62008-02-14 11:24:02 -0800766DEV_CLK(t0_clk, at32_tcb0, pbb, 3);
767
768static struct resource at32_tcb1_resource[] = {
769 PBMEM(0xfff01000),
770 IRQ(23),
771};
772static struct platform_device at32_tcb1_device = {
773 .name = "atmel_tcb",
774 .id = 1,
775 .resource = at32_tcb1_resource,
776 .num_resources = ARRAY_SIZE(at32_tcb1_resource),
777};
778DEV_CLK(t0_clk, at32_tcb1, pbb, 4);
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100779
780/* --------------------------------------------------------------------
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700781 * PIO
782 * -------------------------------------------------------------------- */
783
784static struct resource pio0_resource[] = {
785 PBMEM(0xffe02800),
786 IRQ(13),
787};
788DEFINE_DEV(pio, 0);
789DEV_CLK(mck, pio0, pba, 10);
790
791static struct resource pio1_resource[] = {
792 PBMEM(0xffe02c00),
793 IRQ(14),
794};
795DEFINE_DEV(pio, 1);
796DEV_CLK(mck, pio1, pba, 11);
797
798static struct resource pio2_resource[] = {
799 PBMEM(0xffe03000),
800 IRQ(15),
801};
802DEFINE_DEV(pio, 2);
803DEV_CLK(mck, pio2, pba, 12);
804
805static struct resource pio3_resource[] = {
806 PBMEM(0xffe03400),
807 IRQ(16),
808};
809DEFINE_DEV(pio, 3);
810DEV_CLK(mck, pio3, pba, 13);
811
Haavard Skinnemoen7f9f4672007-01-30 11:16:16 +0100812static struct resource pio4_resource[] = {
813 PBMEM(0xffe03800),
814 IRQ(17),
815};
816DEFINE_DEV(pio, 4);
817DEV_CLK(mck, pio4, pba, 14);
818
Haavard Skinnemoene82c6102008-10-23 14:42:19 +0200819static int __init system_device_init(void)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700820{
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200821 platform_device_register(&at32_pm0_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700822 platform_device_register(&at32_intc0_device);
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +0200823 platform_device_register(&at32ap700x_rtc0_device);
824 platform_device_register(&at32_wdt0_device);
825 platform_device_register(&at32_eic0_device);
Haavard Skinnemoenbc157b72006-09-25 23:32:16 -0700826 platform_device_register(&smc0_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700827 platform_device_register(&pdc_device);
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -0700828 platform_device_register(&dw_dmac0_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700829
David Brownelle723ff62008-02-14 11:24:02 -0800830 platform_device_register(&at32_tcb0_device);
831 platform_device_register(&at32_tcb1_device);
Hans-Christian Egtvedt77609892007-03-12 18:15:16 +0100832
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700833 platform_device_register(&pio0_device);
834 platform_device_register(&pio1_device);
835 platform_device_register(&pio2_device);
836 platform_device_register(&pio3_device);
Haavard Skinnemoen7f9f4672007-01-30 11:16:16 +0100837 platform_device_register(&pio4_device);
Haavard Skinnemoene82c6102008-10-23 14:42:19 +0200838
839 return 0;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700840}
Haavard Skinnemoene82c6102008-10-23 14:42:19 +0200841core_initcall(system_device_init);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700842
843/* --------------------------------------------------------------------
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100844 * PSIF
845 * -------------------------------------------------------------------- */
846static struct resource atmel_psif0_resource[] __initdata = {
847 {
848 .start = 0xffe03c00,
849 .end = 0xffe03cff,
850 .flags = IORESOURCE_MEM,
851 },
852 IRQ(18),
853};
854static struct clk atmel_psif0_pclk = {
855 .name = "pclk",
856 .parent = &pba_clk,
857 .mode = pba_clk_mode,
858 .get_rate = pba_clk_get_rate,
859 .index = 15,
860};
861
862static struct resource atmel_psif1_resource[] __initdata = {
863 {
864 .start = 0xffe03d00,
865 .end = 0xffe03dff,
866 .flags = IORESOURCE_MEM,
867 },
868 IRQ(18),
869};
870static struct clk atmel_psif1_pclk = {
871 .name = "pclk",
872 .parent = &pba_clk,
873 .mode = pba_clk_mode,
874 .get_rate = pba_clk_get_rate,
875 .index = 15,
876};
877
878struct platform_device *__init at32_add_device_psif(unsigned int id)
879{
880 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +0200881 u32 pin_mask;
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100882
883 if (!(id == 0 || id == 1))
884 return NULL;
885
886 pdev = platform_device_alloc("atmel_psif", id);
887 if (!pdev)
888 return NULL;
889
890 switch (id) {
891 case 0:
Julien Maycaf18f12008-09-24 10:30:47 +0200892 pin_mask = (1 << 8) | (1 << 9); /* CLOCK & DATA */
893
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100894 if (platform_device_add_resources(pdev, atmel_psif0_resource,
895 ARRAY_SIZE(atmel_psif0_resource)))
896 goto err_add_resources;
897 atmel_psif0_pclk.dev = &pdev->dev;
Julien Maycaf18f12008-09-24 10:30:47 +0200898 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100899 break;
900 case 1:
Julien Maycaf18f12008-09-24 10:30:47 +0200901 pin_mask = (1 << 11) | (1 << 12); /* CLOCK & DATA */
902
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100903 if (platform_device_add_resources(pdev, atmel_psif1_resource,
904 ARRAY_SIZE(atmel_psif1_resource)))
905 goto err_add_resources;
906 atmel_psif1_pclk.dev = &pdev->dev;
Julien Maycaf18f12008-09-24 10:30:47 +0200907 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +0100908 break;
909 default:
910 return NULL;
911 }
912
913 platform_device_add(pdev);
914 return pdev;
915
916err_add_resources:
917 platform_device_put(pdev);
918 return NULL;
919}
920
921/* --------------------------------------------------------------------
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700922 * USART
923 * -------------------------------------------------------------------- */
924
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200925static struct atmel_uart_data atmel_usart0_data = {
926 .use_dma_tx = 1,
927 .use_dma_rx = 1,
928};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200929static struct resource atmel_usart0_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700930 PBMEM(0xffe00c00),
David Brownella3d912c82007-01-23 20:14:02 -0800931 IRQ(6),
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700932};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200933DEFINE_DEV_DATA(atmel_usart, 0);
ben.nizette@iinet.net.au80f76c52007-11-07 16:16:22 +0900934DEV_CLK(usart, atmel_usart0, pba, 3);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700935
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200936static struct atmel_uart_data atmel_usart1_data = {
937 .use_dma_tx = 1,
938 .use_dma_rx = 1,
939};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200940static struct resource atmel_usart1_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700941 PBMEM(0xffe01000),
942 IRQ(7),
943};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200944DEFINE_DEV_DATA(atmel_usart, 1);
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200945DEV_CLK(usart, atmel_usart1, pba, 4);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700946
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200947static struct atmel_uart_data atmel_usart2_data = {
948 .use_dma_tx = 1,
949 .use_dma_rx = 1,
950};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200951static struct resource atmel_usart2_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700952 PBMEM(0xffe01400),
953 IRQ(8),
954};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200955DEFINE_DEV_DATA(atmel_usart, 2);
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200956DEV_CLK(usart, atmel_usart2, pba, 5);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700957
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200958static struct atmel_uart_data atmel_usart3_data = {
959 .use_dma_tx = 1,
960 .use_dma_rx = 1,
961};
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200962static struct resource atmel_usart3_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700963 PBMEM(0xffe01800),
964 IRQ(9),
965};
Haavard Skinnemoen75d35212006-10-04 16:02:08 +0200966DEFINE_DEV_DATA(atmel_usart, 3);
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +0200967DEV_CLK(usart, atmel_usart3, pba, 6);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700968
Peter Mabf4861c2009-03-31 10:31:02 -0700969static inline void configure_usart0_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700970{
Julien Maycaf18f12008-09-24 10:30:47 +0200971 u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -0700972 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 6);
973 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 7);
974 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 10);
Julien Maycaf18f12008-09-24 10:30:47 +0200975
Anders Blomdell10546262008-10-24 14:54:08 +0200976 select_peripheral(PIOA, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700977}
978
Peter Mabf4861c2009-03-31 10:31:02 -0700979static inline void configure_usart1_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700980{
Julien Maycaf18f12008-09-24 10:30:47 +0200981 u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -0700982 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 19);
983 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 20);
984 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 16);
Julien Maycaf18f12008-09-24 10:30:47 +0200985
Anders Blomdell10546262008-10-24 14:54:08 +0200986 select_peripheral(PIOA, pin_mask, PERIPH_A, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700987}
988
Peter Mabf4861c2009-03-31 10:31:02 -0700989static inline void configure_usart2_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700990{
Julien Maycaf18f12008-09-24 10:30:47 +0200991 u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -0700992 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 30);
993 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 29);
994 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 28);
Julien Maycaf18f12008-09-24 10:30:47 +0200995
Anders Blomdell10546262008-10-24 14:54:08 +0200996 select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -0700997}
998
Peter Mabf4861c2009-03-31 10:31:02 -0700999static inline void configure_usart3_pins(int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001000{
Julien Maycaf18f12008-09-24 10:30:47 +02001001 u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */
Peter Mabf4861c2009-03-31 10:31:02 -07001002 if (flags & ATMEL_USART_RTS) pin_mask |= (1 << 16);
1003 if (flags & ATMEL_USART_CTS) pin_mask |= (1 << 15);
1004 if (flags & ATMEL_USART_CLK) pin_mask |= (1 << 19);
Julien Maycaf18f12008-09-24 10:30:47 +02001005
Anders Blomdell10546262008-10-24 14:54:08 +02001006 select_peripheral(PIOB, pin_mask, PERIPH_B, AT32_GPIOF_PULLUP);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001007}
1008
David Brownella3d912c82007-01-23 20:14:02 -08001009static struct platform_device *__initdata at32_usarts[4];
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001010
Peter Mabf4861c2009-03-31 10:31:02 -07001011void __init at32_map_usart(unsigned int hw_id, unsigned int line, int flags)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001012{
1013 struct platform_device *pdev;
1014
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001015 switch (hw_id) {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001016 case 0:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001017 pdev = &atmel_usart0_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001018 configure_usart0_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001019 break;
1020 case 1:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001021 pdev = &atmel_usart1_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001022 configure_usart1_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001023 break;
1024 case 2:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001025 pdev = &atmel_usart2_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001026 configure_usart2_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001027 break;
1028 case 3:
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02001029 pdev = &atmel_usart3_device;
Peter Mabf4861c2009-03-31 10:31:02 -07001030 configure_usart3_pins(flags);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001031 break;
1032 default:
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001033 return;
Haavard Skinnemoen75d35212006-10-04 16:02:08 +02001034 }
1035
1036 if (PXSEG(pdev->resource[0].start) == P4SEG) {
1037 /* Addresses in the P4 segment are permanently mapped 1:1 */
1038 struct atmel_uart_data *data = pdev->dev.platform_data;
1039 data->regs = (void __iomem *)pdev->resource[0].start;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001040 }
1041
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001042 pdev->id = line;
1043 at32_usarts[line] = pdev;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001044}
1045
1046struct platform_device *__init at32_add_device_usart(unsigned int id)
1047{
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001048 platform_device_register(at32_usarts[id]);
1049 return at32_usarts[id];
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001050}
1051
Haavard Skinnemoen73e27982006-10-04 16:02:04 +02001052struct platform_device *atmel_default_console_device;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001053
1054void __init at32_setup_serial_console(unsigned int usart_id)
1055{
Haavard Skinnemoenc1945882006-10-04 16:02:10 +02001056 atmel_default_console_device = at32_usarts[usart_id];
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001057}
1058
1059/* --------------------------------------------------------------------
1060 * Ethernet
1061 * -------------------------------------------------------------------- */
1062
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001063#ifdef CONFIG_CPU_AT32AP7000
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001064static struct eth_platform_data macb0_data;
1065static struct resource macb0_resource[] = {
1066 PBMEM(0xfff01800),
1067 IRQ(25),
1068};
1069DEFINE_DEV_DATA(macb, 0);
1070DEV_CLK(hclk, macb0, hsb, 8);
1071DEV_CLK(pclk, macb0, pbb, 6);
1072
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001073static struct eth_platform_data macb1_data;
1074static struct resource macb1_resource[] = {
1075 PBMEM(0xfff01c00),
1076 IRQ(26),
1077};
1078DEFINE_DEV_DATA(macb, 1);
1079DEV_CLK(hclk, macb1, hsb, 9);
1080DEV_CLK(pclk, macb1, pbb, 7);
1081
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001082struct platform_device *__init
1083at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
1084{
1085 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001086 u32 pin_mask;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001087
1088 switch (id) {
1089 case 0:
1090 pdev = &macb0_device;
1091
Julien Maycaf18f12008-09-24 10:30:47 +02001092 pin_mask = (1 << 3); /* TXD0 */
1093 pin_mask |= (1 << 4); /* TXD1 */
1094 pin_mask |= (1 << 7); /* TXEN */
1095 pin_mask |= (1 << 8); /* TXCK */
1096 pin_mask |= (1 << 9); /* RXD0 */
1097 pin_mask |= (1 << 10); /* RXD1 */
1098 pin_mask |= (1 << 13); /* RXER */
1099 pin_mask |= (1 << 15); /* RXDV */
1100 pin_mask |= (1 << 16); /* MDC */
1101 pin_mask |= (1 << 17); /* MDIO */
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001102
1103 if (!data->is_rmii) {
Julien Maycaf18f12008-09-24 10:30:47 +02001104 pin_mask |= (1 << 0); /* COL */
1105 pin_mask |= (1 << 1); /* CRS */
1106 pin_mask |= (1 << 2); /* TXER */
1107 pin_mask |= (1 << 5); /* TXD2 */
1108 pin_mask |= (1 << 6); /* TXD3 */
1109 pin_mask |= (1 << 11); /* RXD2 */
1110 pin_mask |= (1 << 12); /* RXD3 */
1111 pin_mask |= (1 << 14); /* RXCK */
Mark Jackson198f2932008-10-13 10:46:27 +00001112#ifndef CONFIG_BOARD_MIMC200
Julien Maycaf18f12008-09-24 10:30:47 +02001113 pin_mask |= (1 << 18); /* SPD */
Mark Jackson198f2932008-10-13 10:46:27 +00001114#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001115 }
Julien Maycaf18f12008-09-24 10:30:47 +02001116
1117 select_peripheral(PIOC, pin_mask, PERIPH_A, 0);
1118
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001119 break;
1120
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001121 case 1:
1122 pdev = &macb1_device;
1123
Julien Maycaf18f12008-09-24 10:30:47 +02001124 pin_mask = (1 << 13); /* TXD0 */
1125 pin_mask |= (1 << 14); /* TXD1 */
1126 pin_mask |= (1 << 11); /* TXEN */
1127 pin_mask |= (1 << 12); /* TXCK */
1128 pin_mask |= (1 << 10); /* RXD0 */
1129 pin_mask |= (1 << 6); /* RXD1 */
1130 pin_mask |= (1 << 5); /* RXER */
1131 pin_mask |= (1 << 4); /* RXDV */
1132 pin_mask |= (1 << 3); /* MDC */
1133 pin_mask |= (1 << 2); /* MDIO */
1134
Mark Jackson198f2932008-10-13 10:46:27 +00001135#ifndef CONFIG_BOARD_MIMC200
Julien Maycaf18f12008-09-24 10:30:47 +02001136 if (!data->is_rmii)
1137 pin_mask |= (1 << 15); /* SPD */
Mark Jackson198f2932008-10-13 10:46:27 +00001138#endif
Julien Maycaf18f12008-09-24 10:30:47 +02001139
1140 select_peripheral(PIOD, pin_mask, PERIPH_B, 0);
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001141
1142 if (!data->is_rmii) {
Julien Maycaf18f12008-09-24 10:30:47 +02001143 pin_mask = (1 << 19); /* COL */
1144 pin_mask |= (1 << 23); /* CRS */
1145 pin_mask |= (1 << 26); /* TXER */
1146 pin_mask |= (1 << 27); /* TXD2 */
1147 pin_mask |= (1 << 28); /* TXD3 */
1148 pin_mask |= (1 << 29); /* RXD2 */
1149 pin_mask |= (1 << 30); /* RXD3 */
1150 pin_mask |= (1 << 24); /* RXCK */
1151
1152 select_peripheral(PIOC, pin_mask, PERIPH_B, 0);
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01001153 }
1154 break;
1155
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001156 default:
1157 return NULL;
1158 }
1159
1160 memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
1161 platform_device_register(pdev);
1162
1163 return pdev;
1164}
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001165#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001166
1167/* --------------------------------------------------------------------
1168 * SPI
1169 * -------------------------------------------------------------------- */
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001170static struct resource atmel_spi0_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001171 PBMEM(0xffe00000),
1172 IRQ(3),
1173};
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001174DEFINE_DEV(atmel_spi, 0);
1175DEV_CLK(spi_clk, atmel_spi0, pba, 0);
1176
1177static struct resource atmel_spi1_resource[] = {
1178 PBMEM(0xffe00400),
1179 IRQ(4),
1180};
1181DEFINE_DEV(atmel_spi, 1);
1182DEV_CLK(spi_clk, atmel_spi1, pba, 1);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001183
Peter Ma07084202009-08-27 00:31:47 -07001184void __init
1185at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, unsigned int n)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001186{
Peter Ma07084202009-08-27 00:31:47 -07001187 /*
1188 * Manage the chipselects as GPIOs, normally using the same pins
1189 * the SPI controller expects; but boards can use other pins.
1190 */
1191 static u8 __initdata spi_pins[][4] = {
1192 { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
1193 GPIO_PIN_PA(5), GPIO_PIN_PA(20) },
1194 { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
1195 GPIO_PIN_PB(4), GPIO_PIN_PA(27) },
1196 };
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001197 unsigned int pin, mode;
1198
Peter Ma07084202009-08-27 00:31:47 -07001199 /* There are only 2 SPI controllers */
1200 if (bus_num > 1)
1201 return;
1202
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001203 for (; n; n--, b++) {
1204 b->bus_num = bus_num;
1205 if (b->chip_select >= 4)
1206 continue;
1207 pin = (unsigned)b->controller_data;
1208 if (!pin) {
Peter Ma07084202009-08-27 00:31:47 -07001209 pin = spi_pins[bus_num][b->chip_select];
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001210 b->controller_data = (void *)pin;
1211 }
1212 mode = AT32_GPIOF_OUTPUT;
1213 if (!(b->mode & SPI_CS_HIGH))
1214 mode |= AT32_GPIOF_HIGH;
1215 at32_select_gpio(pin, mode);
1216 }
1217}
1218
1219struct platform_device *__init
1220at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
1221{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001222 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001223 u32 pin_mask;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001224
1225 switch (id) {
1226 case 0:
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001227 pdev = &atmel_spi0_device;
Julien Maycaf18f12008-09-24 10:30:47 +02001228 pin_mask = (1 << 1) | (1 << 2); /* MOSI & SCK */
1229
David Brownell9c2baf72008-06-18 02:31:43 -07001230 /* pullup MISO so a level is always defined */
Julien Maycaf18f12008-09-24 10:30:47 +02001231 select_peripheral(PIOA, (1 << 0), PERIPH_A, AT32_GPIOF_PULLUP);
1232 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1233
Peter Ma07084202009-08-27 00:31:47 -07001234 at32_spi_setup_slaves(0, b, n);
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01001235 break;
1236
1237 case 1:
1238 pdev = &atmel_spi1_device;
Julien Maycaf18f12008-09-24 10:30:47 +02001239 pin_mask = (1 << 1) | (1 << 5); /* MOSI */
1240
David Brownell9c2baf72008-06-18 02:31:43 -07001241 /* pullup MISO so a level is always defined */
Julien Maycaf18f12008-09-24 10:30:47 +02001242 select_peripheral(PIOB, (1 << 0), PERIPH_B, AT32_GPIOF_PULLUP);
1243 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
1244
Peter Ma07084202009-08-27 00:31:47 -07001245 at32_spi_setup_slaves(1, b, n);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001246 break;
1247
1248 default:
1249 return NULL;
1250 }
1251
Haavard Skinnemoen41d8ca42007-02-16 13:56:11 +01001252 spi_register_board_info(b, n);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001253 platform_device_register(pdev);
1254 return pdev;
1255}
1256
1257/* --------------------------------------------------------------------
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001258 * TWI
1259 * -------------------------------------------------------------------- */
1260static struct resource atmel_twi0_resource[] __initdata = {
1261 PBMEM(0xffe00800),
1262 IRQ(5),
1263};
1264static struct clk atmel_twi0_pclk = {
1265 .name = "twi_pclk",
1266 .parent = &pba_clk,
1267 .mode = pba_clk_mode,
1268 .get_rate = pba_clk_get_rate,
1269 .index = 2,
1270};
1271
Ben Nizette040b28f2008-02-07 15:28:57 +11001272struct platform_device *__init at32_add_device_twi(unsigned int id,
1273 struct i2c_board_info *b,
1274 unsigned int n)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001275{
1276 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001277 u32 pin_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001278
1279 if (id != 0)
1280 return NULL;
1281
1282 pdev = platform_device_alloc("atmel_twi", id);
1283 if (!pdev)
1284 return NULL;
1285
1286 if (platform_device_add_resources(pdev, atmel_twi0_resource,
1287 ARRAY_SIZE(atmel_twi0_resource)))
1288 goto err_add_resources;
1289
Julien Maycaf18f12008-09-24 10:30:47 +02001290 pin_mask = (1 << 6) | (1 << 7); /* SDA & SDL */
1291
1292 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001293
1294 atmel_twi0_pclk.dev = &pdev->dev;
1295
Ben Nizette040b28f2008-02-07 15:28:57 +11001296 if (b)
1297 i2c_register_board_info(id, b, n);
1298
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001299 platform_device_add(pdev);
1300 return pdev;
1301
1302err_add_resources:
1303 platform_device_put(pdev);
1304 return NULL;
1305}
1306
1307/* --------------------------------------------------------------------
1308 * MMC
1309 * -------------------------------------------------------------------- */
1310static struct resource atmel_mci0_resource[] __initdata = {
1311 PBMEM(0xfff02400),
1312 IRQ(28),
1313};
1314static struct clk atmel_mci0_pclk = {
1315 .name = "mci_clk",
1316 .parent = &pbb_clk,
1317 .mode = pbb_clk_mode,
1318 .get_rate = pbb_clk_get_rate,
1319 .index = 9,
1320};
1321
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001322struct platform_device *__init
1323at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001324{
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001325 struct platform_device *pdev;
Dan Williams74465b42009-01-06 11:38:16 -07001326 struct dw_dma_slave *dws = &data->dma_slave;
Julien Maycaf18f12008-09-24 10:30:47 +02001327 u32 pioa_mask;
1328 u32 piob_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001329
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001330 if (id != 0 || !data)
1331 return NULL;
1332
1333 /* Must have at least one usable slot */
1334 if (!data->slot[0].bus_width && !data->slot[1].bus_width)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001335 return NULL;
1336
1337 pdev = platform_device_alloc("atmel_mci", id);
1338 if (!pdev)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001339 goto fail;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001340
1341 if (platform_device_add_resources(pdev, atmel_mci0_resource,
1342 ARRAY_SIZE(atmel_mci0_resource)))
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001343 goto fail;
1344
Dan Williams74465b42009-01-06 11:38:16 -07001345 dws->dma_dev = &dw_dmac0_device.dev;
1346 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001347 dws->cfg_hi = (DWC_CFGH_SRC_PER(0)
1348 | DWC_CFGH_DST_PER(1));
1349 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL
1350 | DWC_CFGL_HS_SRC_POL);
1351
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001352 if (platform_device_add_data(pdev, data,
1353 sizeof(struct mci_platform_data)))
1354 goto fail;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001355
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001356 /* CLK line is common to both slots */
Julien Maycaf18f12008-09-24 10:30:47 +02001357 pioa_mask = 1 << 10;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001358
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001359 switch (data->slot[0].bus_width) {
1360 case 4:
Julien Maycaf18f12008-09-24 10:30:47 +02001361 pioa_mask |= 1 << 13; /* DATA1 */
1362 pioa_mask |= 1 << 14; /* DATA2 */
1363 pioa_mask |= 1 << 15; /* DATA3 */
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001364 /* fall through */
1365 case 1:
Julien Maycaf18f12008-09-24 10:30:47 +02001366 pioa_mask |= 1 << 11; /* CMD */
1367 pioa_mask |= 1 << 12; /* DATA0 */
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001368
1369 if (gpio_is_valid(data->slot[0].detect_pin))
1370 at32_select_gpio(data->slot[0].detect_pin, 0);
1371 if (gpio_is_valid(data->slot[0].wp_pin))
1372 at32_select_gpio(data->slot[0].wp_pin, 0);
1373 break;
1374 case 0:
1375 /* Slot is unused */
1376 break;
1377 default:
1378 goto fail;
1379 }
1380
Julien Maycaf18f12008-09-24 10:30:47 +02001381 select_peripheral(PIOA, pioa_mask, PERIPH_A, 0);
1382 piob_mask = 0;
1383
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001384 switch (data->slot[1].bus_width) {
1385 case 4:
Julien Maycaf18f12008-09-24 10:30:47 +02001386 piob_mask |= 1 << 8; /* DATA1 */
1387 piob_mask |= 1 << 9; /* DATA2 */
1388 piob_mask |= 1 << 10; /* DATA3 */
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001389 /* fall through */
1390 case 1:
Julien Maycaf18f12008-09-24 10:30:47 +02001391 piob_mask |= 1 << 6; /* CMD */
1392 piob_mask |= 1 << 7; /* DATA0 */
1393 select_peripheral(PIOB, piob_mask, PERIPH_B, 0);
Haavard Skinnemoen6b918652008-08-07 14:08:49 +02001394
1395 if (gpio_is_valid(data->slot[1].detect_pin))
1396 at32_select_gpio(data->slot[1].detect_pin, 0);
1397 if (gpio_is_valid(data->slot[1].wp_pin))
1398 at32_select_gpio(data->slot[1].wp_pin, 0);
1399 break;
1400 case 0:
1401 /* Slot is unused */
1402 break;
1403 default:
1404 if (!data->slot[0].bus_width)
1405 goto fail;
1406
1407 data->slot[1].bus_width = 0;
1408 break;
1409 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001410
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001411 atmel_mci0_pclk.dev = &pdev->dev;
1412
1413 platform_device_add(pdev);
1414 return pdev;
1415
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001416fail:
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001417 platform_device_put(pdev);
1418 return NULL;
1419}
1420
1421/* --------------------------------------------------------------------
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001422 * LCDC
1423 * -------------------------------------------------------------------- */
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001424#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001425static struct atmel_lcdfb_info atmel_lcdfb0_data;
1426static struct resource atmel_lcdfb0_resource[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001427 {
1428 .start = 0xff000000,
1429 .end = 0xff000fff,
1430 .flags = IORESOURCE_MEM,
1431 },
1432 IRQ(1),
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001433 {
1434 /* Placeholder for pre-allocated fb memory */
1435 .start = 0x00000000,
1436 .end = 0x00000000,
1437 .flags = 0,
1438 },
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001439};
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001440DEFINE_DEV_DATA(atmel_lcdfb, 0);
1441DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
1442static struct clk atmel_lcdfb0_pixclk = {
1443 .name = "lcdc_clk",
1444 .dev = &atmel_lcdfb0_device.dev,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001445 .mode = genclk_mode,
1446 .get_rate = genclk_get_rate,
1447 .set_rate = genclk_set_rate,
1448 .set_parent = genclk_set_parent,
1449 .index = 7,
1450};
1451
1452struct platform_device *__init
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001453at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
Hans-Christian Egtvedt47882cf2008-02-05 15:27:16 +01001454 unsigned long fbmem_start, unsigned long fbmem_len,
Julien May70664122008-08-04 14:27:38 +02001455 u64 pin_mask)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001456{
1457 struct platform_device *pdev;
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001458 struct atmel_lcdfb_info *info;
1459 struct fb_monspecs *monspecs;
1460 struct fb_videomode *modedb;
1461 unsigned int modedb_size;
Julien Maycaf18f12008-09-24 10:30:47 +02001462 u32 portc_mask, portd_mask, porte_mask;
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001463
1464 /*
1465 * Do a deep copy of the fb data, monspecs and modedb. Make
1466 * sure all allocations are done before setting up the
1467 * portmux.
1468 */
1469 monspecs = kmemdup(data->default_monspecs,
1470 sizeof(struct fb_monspecs), GFP_KERNEL);
1471 if (!monspecs)
1472 return NULL;
1473
1474 modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
1475 modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
1476 if (!modedb)
1477 goto err_dup_modedb;
1478 monspecs->modedb = modedb;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001479
1480 switch (id) {
1481 case 0:
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001482 pdev = &atmel_lcdfb0_device;
Hans-Christian Egtvedt47882cf2008-02-05 15:27:16 +01001483
Julien May70664122008-08-04 14:27:38 +02001484 if (pin_mask == 0ULL)
1485 /* Default to "full" lcdc control signals and 24bit */
1486 pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
1487
1488 /* LCDC on port C */
Alex Raimondi60900652008-10-13 16:03:45 +02001489 portc_mask = pin_mask & 0xfff80000;
Julien Maycaf18f12008-09-24 10:30:47 +02001490 select_peripheral(PIOC, portc_mask, PERIPH_A, 0);
Julien May70664122008-08-04 14:27:38 +02001491
1492 /* LCDC on port D */
Julien Maycaf18f12008-09-24 10:30:47 +02001493 portd_mask = pin_mask & 0x0003ffff;
1494 select_peripheral(PIOD, portd_mask, PERIPH_A, 0);
Julien May70664122008-08-04 14:27:38 +02001495
1496 /* LCDC on port E */
Julien Maycaf18f12008-09-24 10:30:47 +02001497 porte_mask = (pin_mask >> 32) & 0x0007ffff;
1498 select_peripheral(PIOE, porte_mask, PERIPH_B, 0);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001499
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001500 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
1501 clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001502 break;
1503
1504 default:
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001505 goto err_invalid_id;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001506 }
1507
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001508 if (fbmem_len) {
1509 pdev->resource[2].start = fbmem_start;
1510 pdev->resource[2].end = fbmem_start + fbmem_len - 1;
1511 pdev->resource[2].flags = IORESOURCE_MEM;
1512 }
1513
1514 info = pdev->dev.platform_data;
1515 memcpy(info, data, sizeof(struct atmel_lcdfb_info));
1516 info->default_monspecs = monspecs;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001517
1518 platform_device_register(pdev);
1519 return pdev;
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01001520
1521err_invalid_id:
1522 kfree(modedb);
1523err_dup_modedb:
1524 kfree(monspecs);
1525 return NULL;
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001526}
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001527#endif
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07001528
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01001529/* --------------------------------------------------------------------
David Brownell9a1e8eb2008-02-08 04:21:21 -08001530 * PWM
1531 * -------------------------------------------------------------------- */
1532static struct resource atmel_pwm0_resource[] __initdata = {
1533 PBMEM(0xfff01400),
1534 IRQ(24),
1535};
1536static struct clk atmel_pwm0_mck = {
Sedji Gaouaou84059962008-06-25 10:32:50 +02001537 .name = "pwm_clk",
David Brownell9a1e8eb2008-02-08 04:21:21 -08001538 .parent = &pbb_clk,
1539 .mode = pbb_clk_mode,
1540 .get_rate = pbb_clk_get_rate,
1541 .index = 5,
1542};
1543
1544struct platform_device *__init at32_add_device_pwm(u32 mask)
1545{
1546 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001547 u32 pin_mask;
David Brownell9a1e8eb2008-02-08 04:21:21 -08001548
1549 if (!mask)
1550 return NULL;
1551
1552 pdev = platform_device_alloc("atmel_pwm", 0);
1553 if (!pdev)
1554 return NULL;
1555
1556 if (platform_device_add_resources(pdev, atmel_pwm0_resource,
1557 ARRAY_SIZE(atmel_pwm0_resource)))
1558 goto out_free_pdev;
1559
1560 if (platform_device_add_data(pdev, &mask, sizeof(mask)))
1561 goto out_free_pdev;
1562
Julien Maycaf18f12008-09-24 10:30:47 +02001563 pin_mask = 0;
David Brownell9a1e8eb2008-02-08 04:21:21 -08001564 if (mask & (1 << 0))
Julien Maycaf18f12008-09-24 10:30:47 +02001565 pin_mask |= (1 << 28);
David Brownell9a1e8eb2008-02-08 04:21:21 -08001566 if (mask & (1 << 1))
Julien Maycaf18f12008-09-24 10:30:47 +02001567 pin_mask |= (1 << 29);
1568 if (pin_mask > 0)
1569 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1570
1571 pin_mask = 0;
David Brownell9a1e8eb2008-02-08 04:21:21 -08001572 if (mask & (1 << 2))
Julien Maycaf18f12008-09-24 10:30:47 +02001573 pin_mask |= (1 << 21);
David Brownell9a1e8eb2008-02-08 04:21:21 -08001574 if (mask & (1 << 3))
Julien Maycaf18f12008-09-24 10:30:47 +02001575 pin_mask |= (1 << 22);
1576 if (pin_mask > 0)
1577 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
David Brownell9a1e8eb2008-02-08 04:21:21 -08001578
1579 atmel_pwm0_mck.dev = &pdev->dev;
1580
1581 platform_device_add(pdev);
1582
1583 return pdev;
1584
1585out_free_pdev:
1586 platform_device_put(pdev);
1587 return NULL;
1588}
1589
1590/* --------------------------------------------------------------------
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001591 * SSC
1592 * -------------------------------------------------------------------- */
1593static struct resource ssc0_resource[] = {
1594 PBMEM(0xffe01c00),
1595 IRQ(10),
1596};
1597DEFINE_DEV(ssc, 0);
1598DEV_CLK(pclk, ssc0, pba, 7);
1599
1600static struct resource ssc1_resource[] = {
1601 PBMEM(0xffe02000),
1602 IRQ(11),
1603};
1604DEFINE_DEV(ssc, 1);
1605DEV_CLK(pclk, ssc1, pba, 8);
1606
1607static struct resource ssc2_resource[] = {
1608 PBMEM(0xffe02400),
1609 IRQ(12),
1610};
1611DEFINE_DEV(ssc, 2);
1612DEV_CLK(pclk, ssc2, pba, 9);
1613
1614struct platform_device *__init
1615at32_add_device_ssc(unsigned int id, unsigned int flags)
1616{
1617 struct platform_device *pdev;
Julien Maycaf18f12008-09-24 10:30:47 +02001618 u32 pin_mask = 0;
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001619
1620 switch (id) {
1621 case 0:
1622 pdev = &ssc0_device;
1623 if (flags & ATMEL_SSC_RF)
Julien Maycaf18f12008-09-24 10:30:47 +02001624 pin_mask |= (1 << 21); /* RF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001625 if (flags & ATMEL_SSC_RK)
Julien Maycaf18f12008-09-24 10:30:47 +02001626 pin_mask |= (1 << 22); /* RK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001627 if (flags & ATMEL_SSC_TK)
Julien Maycaf18f12008-09-24 10:30:47 +02001628 pin_mask |= (1 << 23); /* TK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001629 if (flags & ATMEL_SSC_TF)
Julien Maycaf18f12008-09-24 10:30:47 +02001630 pin_mask |= (1 << 24); /* TF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001631 if (flags & ATMEL_SSC_TD)
Julien Maycaf18f12008-09-24 10:30:47 +02001632 pin_mask |= (1 << 25); /* TD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001633 if (flags & ATMEL_SSC_RD)
Julien Maycaf18f12008-09-24 10:30:47 +02001634 pin_mask |= (1 << 26); /* RD */
1635
1636 if (pin_mask > 0)
1637 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1638
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001639 break;
1640 case 1:
1641 pdev = &ssc1_device;
1642 if (flags & ATMEL_SSC_RF)
Julien Maycaf18f12008-09-24 10:30:47 +02001643 pin_mask |= (1 << 0); /* RF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001644 if (flags & ATMEL_SSC_RK)
Julien Maycaf18f12008-09-24 10:30:47 +02001645 pin_mask |= (1 << 1); /* RK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001646 if (flags & ATMEL_SSC_TK)
Julien Maycaf18f12008-09-24 10:30:47 +02001647 pin_mask |= (1 << 2); /* TK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001648 if (flags & ATMEL_SSC_TF)
Julien Maycaf18f12008-09-24 10:30:47 +02001649 pin_mask |= (1 << 3); /* TF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001650 if (flags & ATMEL_SSC_TD)
Julien Maycaf18f12008-09-24 10:30:47 +02001651 pin_mask |= (1 << 4); /* TD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001652 if (flags & ATMEL_SSC_RD)
Julien Maycaf18f12008-09-24 10:30:47 +02001653 pin_mask |= (1 << 5); /* RD */
1654
1655 if (pin_mask > 0)
1656 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
1657
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001658 break;
1659 case 2:
1660 pdev = &ssc2_device;
1661 if (flags & ATMEL_SSC_TD)
Julien Maycaf18f12008-09-24 10:30:47 +02001662 pin_mask |= (1 << 13); /* TD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001663 if (flags & ATMEL_SSC_RD)
Julien Maycaf18f12008-09-24 10:30:47 +02001664 pin_mask |= (1 << 14); /* RD */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001665 if (flags & ATMEL_SSC_TK)
Julien Maycaf18f12008-09-24 10:30:47 +02001666 pin_mask |= (1 << 15); /* TK */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001667 if (flags & ATMEL_SSC_TF)
Julien Maycaf18f12008-09-24 10:30:47 +02001668 pin_mask |= (1 << 16); /* TF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001669 if (flags & ATMEL_SSC_RF)
Julien Maycaf18f12008-09-24 10:30:47 +02001670 pin_mask |= (1 << 17); /* RF */
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001671 if (flags & ATMEL_SSC_RK)
Julien Maycaf18f12008-09-24 10:30:47 +02001672 pin_mask |= (1 << 18); /* RK */
1673
1674 if (pin_mask > 0)
1675 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
1676
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02001677 break;
1678 default:
1679 return NULL;
1680 }
1681
1682 platform_device_register(pdev);
1683 return pdev;
1684}
1685
1686/* --------------------------------------------------------------------
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001687 * USB Device Controller
1688 * -------------------------------------------------------------------- */
1689static struct resource usba0_resource[] __initdata = {
1690 {
1691 .start = 0xff300000,
1692 .end = 0xff3fffff,
1693 .flags = IORESOURCE_MEM,
1694 }, {
1695 .start = 0xfff03000,
1696 .end = 0xfff033ff,
1697 .flags = IORESOURCE_MEM,
1698 },
1699 IRQ(31),
1700};
1701static struct clk usba0_pclk = {
1702 .name = "pclk",
1703 .parent = &pbb_clk,
1704 .mode = pbb_clk_mode,
1705 .get_rate = pbb_clk_get_rate,
1706 .index = 12,
1707};
1708static struct clk usba0_hclk = {
1709 .name = "hclk",
1710 .parent = &hsb_clk,
1711 .mode = hsb_clk_mode,
1712 .get_rate = hsb_clk_get_rate,
1713 .index = 6,
1714};
1715
Stelian Pop8d855312008-03-05 00:00:00 +01001716#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
1717 [idx] = { \
1718 .name = nam, \
1719 .index = idx, \
1720 .fifo_size = maxpkt, \
1721 .nr_banks = maxbk, \
1722 .can_dma = dma, \
1723 .can_isoc = isoc, \
1724 }
1725
1726static struct usba_ep_data at32_usba_ep[] __initdata = {
1727 EP("ep0", 0, 64, 1, 0, 0),
1728 EP("ep1", 1, 512, 2, 1, 1),
1729 EP("ep2", 2, 512, 2, 1, 1),
1730 EP("ep3-int", 3, 64, 3, 1, 0),
1731 EP("ep4-int", 4, 64, 3, 1, 0),
1732 EP("ep5", 5, 1024, 3, 1, 1),
1733 EP("ep6", 6, 1024, 3, 1, 1),
1734};
1735
1736#undef EP
1737
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001738struct platform_device *__init
1739at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
1740{
Stelian Pop8d855312008-03-05 00:00:00 +01001741 /*
1742 * pdata doesn't have room for any endpoints, so we need to
1743 * append room for the ones we need right after it.
1744 */
1745 struct {
1746 struct usba_platform_data pdata;
1747 struct usba_ep_data ep[7];
1748 } usba_data;
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001749 struct platform_device *pdev;
1750
1751 if (id != 0)
1752 return NULL;
1753
1754 pdev = platform_device_alloc("atmel_usba_udc", 0);
1755 if (!pdev)
1756 return NULL;
1757
1758 if (platform_device_add_resources(pdev, usba0_resource,
1759 ARRAY_SIZE(usba0_resource)))
1760 goto out_free_pdev;
1761
Stelian Pop8d855312008-03-05 00:00:00 +01001762 if (data)
1763 usba_data.pdata.vbus_pin = data->vbus_pin;
1764 else
1765 usba_data.pdata.vbus_pin = -EINVAL;
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001766
Stelian Pop8d855312008-03-05 00:00:00 +01001767 data = &usba_data.pdata;
1768 data->num_ep = ARRAY_SIZE(at32_usba_ep);
1769 memcpy(data->ep, at32_usba_ep, sizeof(at32_usba_ep));
1770
1771 if (platform_device_add_data(pdev, data, sizeof(usba_data)))
1772 goto out_free_pdev;
1773
Hans-Christian Egtvedt9477ab22009-03-24 15:45:21 +01001774 if (gpio_is_valid(data->vbus_pin))
Stelian Pop8d855312008-03-05 00:00:00 +01001775 at32_select_gpio(data->vbus_pin, 0);
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02001776
1777 usba0_pclk.dev = &pdev->dev;
1778 usba0_hclk.dev = &pdev->dev;
1779
1780 platform_device_add(pdev);
1781
1782 return pdev;
1783
1784out_free_pdev:
1785 platform_device_put(pdev);
1786 return NULL;
1787}
1788
1789/* --------------------------------------------------------------------
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001790 * IDE / CompactFlash
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001791 * -------------------------------------------------------------------- */
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001792#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001793static struct resource at32_smc_cs4_resource[] __initdata = {
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001794 {
1795 .start = 0x04000000,
1796 .end = 0x07ffffff,
1797 .flags = IORESOURCE_MEM,
1798 },
1799 IRQ(~0UL), /* Magic IRQ will be overridden */
1800};
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001801static struct resource at32_smc_cs5_resource[] __initdata = {
1802 {
1803 .start = 0x20000000,
1804 .end = 0x23ffffff,
1805 .flags = IORESOURCE_MEM,
1806 },
1807 IRQ(~0UL), /* Magic IRQ will be overridden */
1808};
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001809
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001810static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1811 unsigned int cs, unsigned int extint)
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001812{
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001813 static unsigned int extint_pin_map[4] __initdata = {
Julien Maycaf18f12008-09-24 10:30:47 +02001814 (1 << 25),
1815 (1 << 26),
1816 (1 << 27),
1817 (1 << 28),
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001818 };
1819 static bool common_pins_initialized __initdata = false;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001820 unsigned int extint_pin;
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001821 int ret;
Julien Maycaf18f12008-09-24 10:30:47 +02001822 u32 pin_mask;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001823
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001824 if (extint >= ARRAY_SIZE(extint_pin_map))
1825 return -EINVAL;
1826 extint_pin = extint_pin_map[extint];
1827
1828 switch (cs) {
1829 case 4:
1830 ret = platform_device_add_resources(pdev,
1831 at32_smc_cs4_resource,
1832 ARRAY_SIZE(at32_smc_cs4_resource));
1833 if (ret)
1834 return ret;
1835
Julien Maycaf18f12008-09-24 10:30:47 +02001836 /* NCS4 -> OE_N */
1837 select_peripheral(PIOE, (1 << 21), PERIPH_A, 0);
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02001838 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001839 break;
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001840 case 5:
1841 ret = platform_device_add_resources(pdev,
1842 at32_smc_cs5_resource,
1843 ARRAY_SIZE(at32_smc_cs5_resource));
1844 if (ret)
1845 return ret;
1846
Julien Maycaf18f12008-09-24 10:30:47 +02001847 /* NCS5 -> OE_N */
1848 select_peripheral(PIOE, (1 << 22), PERIPH_A, 0);
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02001849 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001850 break;
1851 default:
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001852 return -EINVAL;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001853 }
1854
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001855 if (!common_pins_initialized) {
Julien Maycaf18f12008-09-24 10:30:47 +02001856 pin_mask = (1 << 19); /* CFCE1 -> CS0_N */
1857 pin_mask |= (1 << 20); /* CFCE2 -> CS1_N */
1858 pin_mask |= (1 << 23); /* CFRNW -> DIR */
1859 pin_mask |= (1 << 24); /* NWAIT <- IORDY */
1860
1861 select_peripheral(PIOE, pin_mask, PERIPH_A, 0);
1862
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001863 common_pins_initialized = true;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001864 }
1865
Julien Maycaf18f12008-09-24 10:30:47 +02001866 select_peripheral(PIOB, extint_pin, PERIPH_A, AT32_GPIOF_DEGLITCH);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001867
1868 pdev->resource[1].start = EIM_IRQ_BASE + extint;
1869 pdev->resource[1].end = pdev->resource[1].start;
1870
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001871 return 0;
1872}
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001873
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001874struct platform_device *__init
1875at32_add_device_ide(unsigned int id, unsigned int extint,
1876 struct ide_platform_data *data)
1877{
1878 struct platform_device *pdev;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001879
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001880 pdev = platform_device_alloc("at32_ide", id);
1881 if (!pdev)
1882 goto fail;
1883
1884 if (platform_device_add_data(pdev, data,
1885 sizeof(struct ide_platform_data)))
1886 goto fail;
1887
1888 if (at32_init_ide_or_cf(pdev, data->cs, extint))
1889 goto fail;
1890
1891 platform_device_add(pdev);
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001892 return pdev;
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001893
1894fail:
1895 platform_device_put(pdev);
1896 return NULL;
1897}
1898
1899struct platform_device *__init
1900at32_add_device_cf(unsigned int id, unsigned int extint,
1901 struct cf_platform_data *data)
1902{
1903 struct platform_device *pdev;
1904
1905 pdev = platform_device_alloc("at32_cf", id);
1906 if (!pdev)
1907 goto fail;
1908
1909 if (platform_device_add_data(pdev, data,
1910 sizeof(struct cf_platform_data)))
1911 goto fail;
1912
1913 if (at32_init_ide_or_cf(pdev, data->cs, extint))
1914 goto fail;
1915
David Brownell3c26e172008-07-27 02:34:45 -07001916 if (gpio_is_valid(data->detect_pin))
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001917 at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
David Brownell3c26e172008-07-27 02:34:45 -07001918 if (gpio_is_valid(data->reset_pin))
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001919 at32_select_gpio(data->reset_pin, 0);
David Brownell3c26e172008-07-27 02:34:45 -07001920 if (gpio_is_valid(data->vcc_pin))
Haavard Skinnemoeneaf5f922007-10-22 18:32:14 +02001921 at32_select_gpio(data->vcc_pin, 0);
1922 /* READY is used as extint, so we can't select it as gpio */
1923
1924 platform_device_add(pdev);
1925 return pdev;
1926
1927fail:
1928 platform_device_put(pdev);
1929 return NULL;
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001930}
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01001931#endif
Kristoffer Nyborg Gregertsen48021bd2007-08-16 13:45:00 +02001932
1933/* --------------------------------------------------------------------
HÃ¥vard Skinnemoen62090a02008-06-06 18:04:56 +02001934 * NAND Flash / SmartMedia
1935 * -------------------------------------------------------------------- */
1936static struct resource smc_cs3_resource[] __initdata = {
1937 {
1938 .start = 0x0c000000,
1939 .end = 0x0fffffff,
1940 .flags = IORESOURCE_MEM,
1941 }, {
1942 .start = 0xfff03c00,
1943 .end = 0xfff03fff,
1944 .flags = IORESOURCE_MEM,
1945 },
1946};
1947
1948struct platform_device *__init
1949at32_add_device_nand(unsigned int id, struct atmel_nand_data *data)
1950{
1951 struct platform_device *pdev;
1952
1953 if (id != 0 || !data)
1954 return NULL;
1955
1956 pdev = platform_device_alloc("atmel_nand", id);
1957 if (!pdev)
1958 goto fail;
1959
1960 if (platform_device_add_resources(pdev, smc_cs3_resource,
1961 ARRAY_SIZE(smc_cs3_resource)))
1962 goto fail;
1963
1964 if (platform_device_add_data(pdev, data,
1965 sizeof(struct atmel_nand_data)))
1966 goto fail;
1967
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02001968 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_NAND_ENABLE);
HÃ¥vard Skinnemoen62090a02008-06-06 18:04:56 +02001969 if (data->enable_pin)
1970 at32_select_gpio(data->enable_pin,
1971 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
1972 if (data->rdy_pin)
1973 at32_select_gpio(data->rdy_pin, 0);
1974 if (data->det_pin)
1975 at32_select_gpio(data->det_pin, 0);
1976
1977 platform_device_add(pdev);
1978 return pdev;
1979
1980fail:
1981 platform_device_put(pdev);
1982 return NULL;
1983}
1984
1985/* --------------------------------------------------------------------
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02001986 * AC97C
1987 * -------------------------------------------------------------------- */
1988static struct resource atmel_ac97c0_resource[] __initdata = {
1989 PBMEM(0xfff02800),
1990 IRQ(29),
1991};
1992static struct clk atmel_ac97c0_pclk = {
1993 .name = "pclk",
1994 .parent = &pbb_clk,
1995 .mode = pbb_clk_mode,
1996 .get_rate = pbb_clk_get_rate,
1997 .index = 10,
1998};
1999
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002000struct platform_device *__init
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002001at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
2002 unsigned int flags)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002003{
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002004 struct platform_device *pdev;
2005 struct dw_dma_slave *rx_dws;
2006 struct dw_dma_slave *tx_dws;
2007 struct ac97c_platform_data _data;
2008 u32 pin_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002009
2010 if (id != 0)
2011 return NULL;
2012
2013 pdev = platform_device_alloc("atmel_ac97c", id);
2014 if (!pdev)
2015 return NULL;
2016
2017 if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
2018 ARRAY_SIZE(atmel_ac97c0_resource)))
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002019 goto out_free_resources;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002020
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002021 if (!data) {
2022 data = &_data;
2023 memset(data, 0, sizeof(struct ac97c_platform_data));
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002024 data->reset_pin = -ENODEV;
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002025 }
2026
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002027 rx_dws = &data->rx_dws;
2028 tx_dws = &data->tx_dws;
2029
2030 /* Check if DMA slave interface for capture should be configured. */
2031 if (flags & AC97C_CAPTURE) {
2032 rx_dws->dma_dev = &dw_dmac0_device.dev;
2033 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2034 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
2035 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2036 }
2037
2038 /* Check if DMA slave interface for playback should be configured. */
2039 if (flags & AC97C_PLAYBACK) {
2040 tx_dws->dma_dev = &dw_dmac0_device.dev;
2041 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2042 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
2043 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2044 }
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002045
2046 if (platform_device_add_data(pdev, data,
2047 sizeof(struct ac97c_platform_data)))
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002048 goto out_free_resources;
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002049
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002050 /* SDO | SYNC | SCLK | SDI */
2051 pin_mask = (1 << 20) | (1 << 21) | (1 << 22) | (1 << 23);
Julien Maycaf18f12008-09-24 10:30:47 +02002052
2053 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
Hans-Christian Egtvedt218df4a2008-07-01 14:26:45 +02002054
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002055 if (gpio_is_valid(data->reset_pin))
2056 at32_select_gpio(data->reset_pin, AT32_GPIOF_OUTPUT
2057 | AT32_GPIOF_HIGH);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002058
2059 atmel_ac97c0_pclk.dev = &pdev->dev;
2060
2061 platform_device_add(pdev);
2062 return pdev;
2063
Hans-Christian Egtvedt2f47c8c2009-03-24 13:59:23 +01002064out_free_resources:
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002065 platform_device_put(pdev);
2066 return NULL;
2067}
2068
2069/* --------------------------------------------------------------------
2070 * ABDAC
2071 * -------------------------------------------------------------------- */
2072static struct resource abdac0_resource[] __initdata = {
2073 PBMEM(0xfff02000),
2074 IRQ(27),
2075};
2076static struct clk abdac0_pclk = {
2077 .name = "pclk",
2078 .parent = &pbb_clk,
2079 .mode = pbb_clk_mode,
2080 .get_rate = pbb_clk_get_rate,
2081 .index = 8,
2082};
2083static struct clk abdac0_sample_clk = {
2084 .name = "sample_clk",
2085 .mode = genclk_mode,
2086 .get_rate = genclk_get_rate,
2087 .set_rate = genclk_set_rate,
2088 .set_parent = genclk_set_parent,
2089 .index = 6,
2090};
2091
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002092struct platform_device *__init
2093at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002094{
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002095 struct platform_device *pdev;
2096 struct dw_dma_slave *dws;
2097 u32 pin_mask;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002098
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002099 if (id != 0 || !data)
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002100 return NULL;
2101
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002102 pdev = platform_device_alloc("atmel_abdac", id);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002103 if (!pdev)
2104 return NULL;
2105
2106 if (platform_device_add_resources(pdev, abdac0_resource,
2107 ARRAY_SIZE(abdac0_resource)))
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002108 goto out_free_resources;
2109
2110 dws = &data->dws;
2111
2112 dws->dma_dev = &dw_dmac0_device.dev;
2113 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
2114 dws->cfg_hi = DWC_CFGH_DST_PER(2);
2115 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2116
2117 if (platform_device_add_data(pdev, data,
2118 sizeof(struct atmel_abdac_pdata)))
2119 goto out_free_resources;
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002120
Julien Maycaf18f12008-09-24 10:30:47 +02002121 pin_mask = (1 << 20) | (1 << 22); /* DATA1 & DATAN1 */
2122 pin_mask |= (1 << 21) | (1 << 23); /* DATA0 & DATAN0 */
2123
2124 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002125
2126 abdac0_pclk.dev = &pdev->dev;
2127 abdac0_sample_clk.dev = &pdev->dev;
2128
2129 platform_device_add(pdev);
2130 return pdev;
2131
Hans-Christian Egtvedt6b0c9352009-03-24 13:59:22 +01002132out_free_resources:
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002133 platform_device_put(pdev);
2134 return NULL;
2135}
2136
2137/* --------------------------------------------------------------------
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002138 * GCLK
2139 * -------------------------------------------------------------------- */
2140static struct clk gclk0 = {
2141 .name = "gclk0",
2142 .mode = genclk_mode,
2143 .get_rate = genclk_get_rate,
2144 .set_rate = genclk_set_rate,
2145 .set_parent = genclk_set_parent,
2146 .index = 0,
2147};
2148static struct clk gclk1 = {
2149 .name = "gclk1",
2150 .mode = genclk_mode,
2151 .get_rate = genclk_get_rate,
2152 .set_rate = genclk_set_rate,
2153 .set_parent = genclk_set_parent,
2154 .index = 1,
2155};
2156static struct clk gclk2 = {
2157 .name = "gclk2",
2158 .mode = genclk_mode,
2159 .get_rate = genclk_get_rate,
2160 .set_rate = genclk_set_rate,
2161 .set_parent = genclk_set_parent,
2162 .index = 2,
2163};
2164static struct clk gclk3 = {
2165 .name = "gclk3",
2166 .mode = genclk_mode,
2167 .get_rate = genclk_get_rate,
2168 .set_rate = genclk_set_rate,
2169 .set_parent = genclk_set_parent,
2170 .index = 3,
2171};
2172static struct clk gclk4 = {
2173 .name = "gclk4",
2174 .mode = genclk_mode,
2175 .get_rate = genclk_get_rate,
2176 .set_rate = genclk_set_rate,
2177 .set_parent = genclk_set_parent,
2178 .index = 4,
2179};
2180
Alex Raimondi300bb762008-09-22 21:40:55 +02002181static __initdata struct clk *init_clocks[] = {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002182 &osc32k,
2183 &osc0,
2184 &osc1,
2185 &pll0,
2186 &pll1,
2187 &cpu_clk,
2188 &hsb_clk,
2189 &pba_clk,
2190 &pbb_clk,
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002191 &at32_pm_pclk,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002192 &at32_intc0_pclk,
Haavard Skinnemoenb47eb402008-07-31 15:56:36 +02002193 &at32_hmatrix_clk,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002194 &ebi_clk,
2195 &hramc_clk,
Haavard Skinnemoen7951f182008-03-05 15:08:27 +01002196 &sdramc_clk,
Haavard Skinnemoenbc157b72006-09-25 23:32:16 -07002197 &smc0_pclk,
2198 &smc0_mck,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002199 &pdc_hclk,
2200 &pdc_pclk,
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -07002201 &dw_dmac0_hclk,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002202 &pico_clk,
2203 &pio0_mck,
2204 &pio1_mck,
2205 &pio2_mck,
2206 &pio3_mck,
Haavard Skinnemoen7f9f4672007-01-30 11:16:16 +01002207 &pio4_mck,
David Brownelle723ff62008-02-14 11:24:02 -08002208 &at32_tcb0_t0_clk,
2209 &at32_tcb1_t0_clk,
Hans-Christian Egtvedtd86d3142008-02-25 11:24:30 +01002210 &atmel_psif0_pclk,
2211 &atmel_psif1_pclk,
Haavard Skinnemoen1e8ea802006-10-04 16:02:03 +02002212 &atmel_usart0_usart,
2213 &atmel_usart1_usart,
2214 &atmel_usart2_usart,
2215 &atmel_usart3_usart,
David Brownell9a1e8eb2008-02-08 04:21:21 -08002216 &atmel_pwm0_mck,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002217#if defined(CONFIG_CPU_AT32AP7000)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002218 &macb0_hclk,
2219 &macb0_pclk,
Haavard Skinnemoencfcb3a82006-10-30 09:23:12 +01002220 &macb1_hclk,
2221 &macb1_pclk,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002222#endif
Haavard Skinnemoen3d60ee12007-01-10 20:20:02 +01002223 &atmel_spi0_spi_clk,
2224 &atmel_spi1_spi_clk,
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002225 &atmel_twi0_pclk,
2226 &atmel_mci0_pclk,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002227#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01002228 &atmel_lcdfb0_hck1,
2229 &atmel_lcdfb0_pixclk,
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002230#endif
Hans-Christian Egtvedt9cf6cf52007-07-06 14:31:55 +02002231 &ssc0_pclk,
2232 &ssc1_pclk,
2233 &ssc2_pclk,
Haavard Skinnemoen6fcf0612007-06-14 17:37:31 +02002234 &usba0_hclk,
2235 &usba0_pclk,
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002236 &atmel_ac97c0_pclk,
2237 &abdac0_pclk,
2238 &abdac0_sample_clk,
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002239 &gclk0,
2240 &gclk1,
2241 &gclk2,
2242 &gclk3,
2243 &gclk4,
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002244};
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002245
Haavard Skinnemoen65033ed2008-03-04 15:15:00 +01002246void __init setup_platform(void)
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002247{
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002248 u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
2249 int i;
2250
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +02002251 if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002252 main_clock = &pll0;
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +02002253 cpu_clk.parent = &pll0;
2254 } else {
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002255 main_clock = &osc0;
Hans-Christian Egtvedt9e58e182007-06-04 16:10:57 +02002256 cpu_clk.parent = &osc0;
2257 }
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002258
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002259 if (pm_readl(PLL0) & PM_BIT(PLLOSC))
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002260 pll0.parent = &osc1;
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002261 if (pm_readl(PLL1) & PM_BIT(PLLOSC))
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002262 pll1.parent = &osc1;
2263
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002264 genclk_init_parent(&gclk0);
2265 genclk_init_parent(&gclk1);
2266 genclk_init_parent(&gclk2);
2267 genclk_init_parent(&gclk3);
2268 genclk_init_parent(&gclk4);
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002269#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
Haavard Skinnemoend0a2b7a2007-03-21 18:08:49 +01002270 genclk_init_parent(&atmel_lcdfb0_pixclk);
Haavard Skinnemoen438ff3f2007-10-29 15:28:07 +01002271#endif
Haavard Skinnemoen2042c1c2007-10-22 17:42:35 +02002272 genclk_init_parent(&abdac0_sample_clk);
Haavard Skinnemoen7a5fe232007-02-16 13:14:33 +01002273
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002274 /*
Alex Raimondi300bb762008-09-22 21:40:55 +02002275 * Build initial dynamic clock list by registering all clocks
2276 * from the array.
2277 * At the same time, turn on all clocks that have at least one
2278 * user already, and turn off everything else. We only do this
2279 * for module clocks, and even though it isn't particularly
2280 * pretty to check the address of the mode function, it should
2281 * do the trick...
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002282 */
Alex Raimondi300bb762008-09-22 21:40:55 +02002283 for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
2284 struct clk *clk = init_clocks[i];
2285
2286 /* first, register clock */
2287 at32_clk_register(clk);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002288
Haavard Skinnemoen188ff652007-03-14 13:23:44 +01002289 if (clk->users == 0)
2290 continue;
2291
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002292 if (clk->mode == &cpu_clk_mode)
2293 cpu_mask |= 1 << clk->index;
2294 else if (clk->mode == &hsb_clk_mode)
2295 hsb_mask |= 1 << clk->index;
2296 else if (clk->mode == &pba_clk_mode)
2297 pba_mask |= 1 << clk->index;
2298 else if (clk->mode == &pbb_clk_mode)
2299 pbb_mask |= 1 << clk->index;
2300 }
2301
Haavard Skinnemoen7a5b8052007-06-04 12:58:30 +02002302 pm_writel(CPU_MASK, cpu_mask);
2303 pm_writel(HSB_MASK, hsb_mask);
2304 pm_writel(PBA_MASK, pba_mask);
2305 pm_writel(PBB_MASK, pbb_mask);
Haavard Skinnemoen65033ed2008-03-04 15:15:00 +01002306
2307 /* Initialize the port muxes */
2308 at32_init_pio(&pio0_device);
2309 at32_init_pio(&pio1_device);
2310 at32_init_pio(&pio2_device);
2311 at32_init_pio(&pio3_device);
2312 at32_init_pio(&pio4_device);
Haavard Skinnemoen5f97f7f2006-09-25 23:32:13 -07002313}
Haavard Skinnemoenb83d6ee12008-03-05 10:00:28 +01002314
2315struct gen_pool *sram_pool;
2316
2317static int __init sram_init(void)
2318{
2319 struct gen_pool *pool;
2320
2321 /* 1KiB granularity */
2322 pool = gen_pool_create(10, -1);
2323 if (!pool)
2324 goto fail;
2325
2326 if (gen_pool_add(pool, 0x24000000, 0x8000, -1))
2327 goto err_pool_add;
2328
2329 sram_pool = pool;
2330 return 0;
2331
2332err_pool_add:
2333 gen_pool_destroy(pool);
2334fail:
2335 pr_err("Failed to create SRAM pool\n");
2336 return -ENOMEM;
2337}
2338core_initcall(sram_init);