Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Driver for SGI's IOC3 based Ethernet cards as found in the PCI card. |
| 7 | * |
Ralf Baechle | bbfb86c | 2007-07-25 12:31:57 +0100 | [diff] [blame] | 8 | * Copyright (C) 1999, 2000, 01, 03, 06 Ralf Baechle |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Copyright (C) 1995, 1999, 2000, 2001 by Silicon Graphics, Inc. |
| 10 | * |
| 11 | * References: |
| 12 | * o IOC3 ASIC specification 4.51, 1996-04-18 |
| 13 | * o IEEE 802.3 specification, 2000 edition |
| 14 | * o DP38840A Specification, National Semiconductor, March 1997 |
| 15 | * |
| 16 | * To do: |
| 17 | * |
| 18 | * o Handle allocation failures in ioc3_alloc_skb() more gracefully. |
| 19 | * o Handle allocation failures in ioc3_init_rings(). |
| 20 | * o Use prefetching for large packets. What is a good lower limit for |
| 21 | * prefetching? |
| 22 | * o We're probably allocating a bit too much memory. |
| 23 | * o Use hardware checksums. |
| 24 | * o Convert to using a IOC3 meta driver. |
| 25 | * o Which PHYs might possibly be attached to the IOC3 in real live, |
| 26 | * which workarounds are required for them? Do we ever have Lucent's? |
| 27 | * o For the 2.5 branch kill the mii-tool ioctls. |
| 28 | */ |
| 29 | |
| 30 | #define IOC3_NAME "ioc3-eth" |
Andy Gospodarek | d5b2069 | 2006-09-11 17:39:18 -0400 | [diff] [blame] | 31 | #define IOC3_VERSION "2.6.3-4" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/init.h> |
| 34 | #include <linux/delay.h> |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/mm.h> |
| 37 | #include <linux/errno.h> |
| 38 | #include <linux/module.h> |
| 39 | #include <linux/pci.h> |
| 40 | #include <linux/crc32.h> |
| 41 | #include <linux/mii.h> |
| 42 | #include <linux/in.h> |
| 43 | #include <linux/ip.h> |
| 44 | #include <linux/tcp.h> |
| 45 | #include <linux/udp.h> |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 46 | #include <linux/dma-mapping.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
| 48 | #ifdef CONFIG_SERIAL_8250 |
Ralf Baechle | 15a9380 | 2005-11-08 23:10:51 +0000 | [diff] [blame] | 49 | #include <linux/serial_core.h> |
| 50 | #include <linux/serial_8250.h> |
Ralf Baechle | 0491d1f3 | 2007-08-26 18:51:22 +0100 | [diff] [blame] | 51 | #include <linux/serial_reg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | #endif |
| 53 | |
| 54 | #include <linux/netdevice.h> |
| 55 | #include <linux/etherdevice.h> |
| 56 | #include <linux/ethtool.h> |
| 57 | #include <linux/skbuff.h> |
| 58 | #include <net/ip.h> |
| 59 | |
| 60 | #include <asm/byteorder.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | #include <asm/io.h> |
| 62 | #include <asm/pgtable.h> |
| 63 | #include <asm/uaccess.h> |
| 64 | #include <asm/sn/types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | #include <asm/sn/ioc3.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | #include <asm/pci/bridge.h> |
| 67 | |
| 68 | /* |
| 69 | * 64 RX buffers. This is tunable in the range of 16 <= x < 512. The |
| 70 | * value must be a power of two. |
| 71 | */ |
| 72 | #define RX_BUFFS 64 |
| 73 | |
| 74 | #define ETCSR_FD ((17<<ETCSR_IPGR2_SHIFT) | (11<<ETCSR_IPGR1_SHIFT) | 21) |
| 75 | #define ETCSR_HD ((21<<ETCSR_IPGR2_SHIFT) | (21<<ETCSR_IPGR1_SHIFT) | 21) |
| 76 | |
| 77 | /* Private per NIC data of the driver. */ |
| 78 | struct ioc3_private { |
| 79 | struct ioc3 *regs; |
| 80 | unsigned long *rxr; /* pointer to receiver ring */ |
| 81 | struct ioc3_etxd *txr; |
| 82 | struct sk_buff *rx_skbs[512]; |
| 83 | struct sk_buff *tx_skbs[128]; |
| 84 | struct net_device_stats stats; |
| 85 | int rx_ci; /* RX consumer index */ |
| 86 | int rx_pi; /* RX producer index */ |
| 87 | int tx_ci; /* TX consumer index */ |
| 88 | int tx_pi; /* TX producer index */ |
| 89 | int txqlen; |
| 90 | u32 emcr, ehar_h, ehar_l; |
| 91 | spinlock_t ioc3_lock; |
| 92 | struct mii_if_info mii; |
Ralf Baechle | bbfb86c | 2007-07-25 12:31:57 +0100 | [diff] [blame] | 93 | unsigned long flags; |
| 94 | #define IOC3_FLAG_RX_CHECKSUMS 1 |
| 95 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | struct pci_dev *pdev; |
| 97 | |
| 98 | /* Members used by autonegotiation */ |
| 99 | struct timer_list ioc3_timer; |
| 100 | }; |
| 101 | |
| 102 | static inline struct net_device *priv_netdev(struct ioc3_private *dev) |
| 103 | { |
| 104 | return (void *)dev - ((sizeof(struct net_device) + 31) & ~31); |
| 105 | } |
| 106 | |
| 107 | static int ioc3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 108 | static void ioc3_set_multicast_list(struct net_device *dev); |
| 109 | static int ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev); |
| 110 | static void ioc3_timeout(struct net_device *dev); |
| 111 | static inline unsigned int ioc3_hash(const unsigned char *addr); |
| 112 | static inline void ioc3_stop(struct ioc3_private *ip); |
| 113 | static void ioc3_init(struct net_device *dev); |
| 114 | |
| 115 | static const char ioc3_str[] = "IOC3 Ethernet"; |
Jeff Garzik | 7282d49 | 2006-09-13 14:30:00 -0400 | [diff] [blame] | 116 | static const struct ethtool_ops ioc3_ethtool_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | |
| 118 | /* We use this to acquire receive skb's that we can DMA directly into. */ |
| 119 | |
| 120 | #define IOC3_CACHELINE 128UL |
| 121 | |
| 122 | static inline unsigned long aligned_rx_skb_addr(unsigned long addr) |
| 123 | { |
| 124 | return (~addr + 1) & (IOC3_CACHELINE - 1UL); |
| 125 | } |
| 126 | |
| 127 | static inline struct sk_buff * ioc3_alloc_skb(unsigned long length, |
| 128 | unsigned int gfp_mask) |
| 129 | { |
| 130 | struct sk_buff *skb; |
| 131 | |
| 132 | skb = alloc_skb(length + IOC3_CACHELINE - 1, gfp_mask); |
| 133 | if (likely(skb)) { |
| 134 | int offset = aligned_rx_skb_addr((unsigned long) skb->data); |
| 135 | if (offset) |
| 136 | skb_reserve(skb, offset); |
| 137 | } |
| 138 | |
| 139 | return skb; |
| 140 | } |
| 141 | |
| 142 | static inline unsigned long ioc3_map(void *ptr, unsigned long vdev) |
| 143 | { |
| 144 | #ifdef CONFIG_SGI_IP27 |
Ralf Baechle | d955d90 | 2006-06-17 18:57:39 +0100 | [diff] [blame] | 145 | vdev <<= 57; /* Shift to PCI64_ATTR_VIRTUAL */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
| 147 | return vdev | (0xaUL << PCI64_ATTR_TARG_SHFT) | PCI64_ATTR_PREF | |
| 148 | ((unsigned long)ptr & TO_PHYS_MASK); |
| 149 | #else |
| 150 | return virt_to_bus(ptr); |
| 151 | #endif |
| 152 | } |
| 153 | |
| 154 | /* BEWARE: The IOC3 documentation documents the size of rx buffers as |
| 155 | 1644 while it's actually 1664. This one was nasty to track down ... */ |
| 156 | #define RX_OFFSET 10 |
| 157 | #define RX_BUF_ALLOC_SIZE (1664 + RX_OFFSET + IOC3_CACHELINE) |
| 158 | |
| 159 | /* DMA barrier to separate cached and uncached accesses. */ |
| 160 | #define BARRIER() \ |
| 161 | __asm__("sync" ::: "memory") |
| 162 | |
| 163 | |
| 164 | #define IOC3_SIZE 0x100000 |
| 165 | |
| 166 | /* |
| 167 | * IOC3 is a big endian device |
| 168 | * |
| 169 | * Unorthodox but makes the users of these macros more readable - the pointer |
| 170 | * to the IOC3's memory mapped registers is expected as struct ioc3 * ioc3 |
| 171 | * in the environment. |
| 172 | */ |
| 173 | #define ioc3_r_mcr() be32_to_cpu(ioc3->mcr) |
| 174 | #define ioc3_w_mcr(v) do { ioc3->mcr = cpu_to_be32(v); } while (0) |
| 175 | #define ioc3_w_gpcr_s(v) do { ioc3->gpcr_s = cpu_to_be32(v); } while (0) |
| 176 | #define ioc3_r_emcr() be32_to_cpu(ioc3->emcr) |
| 177 | #define ioc3_w_emcr(v) do { ioc3->emcr = cpu_to_be32(v); } while (0) |
| 178 | #define ioc3_r_eisr() be32_to_cpu(ioc3->eisr) |
| 179 | #define ioc3_w_eisr(v) do { ioc3->eisr = cpu_to_be32(v); } while (0) |
| 180 | #define ioc3_r_eier() be32_to_cpu(ioc3->eier) |
| 181 | #define ioc3_w_eier(v) do { ioc3->eier = cpu_to_be32(v); } while (0) |
| 182 | #define ioc3_r_ercsr() be32_to_cpu(ioc3->ercsr) |
| 183 | #define ioc3_w_ercsr(v) do { ioc3->ercsr = cpu_to_be32(v); } while (0) |
| 184 | #define ioc3_r_erbr_h() be32_to_cpu(ioc3->erbr_h) |
| 185 | #define ioc3_w_erbr_h(v) do { ioc3->erbr_h = cpu_to_be32(v); } while (0) |
| 186 | #define ioc3_r_erbr_l() be32_to_cpu(ioc3->erbr_l) |
| 187 | #define ioc3_w_erbr_l(v) do { ioc3->erbr_l = cpu_to_be32(v); } while (0) |
| 188 | #define ioc3_r_erbar() be32_to_cpu(ioc3->erbar) |
| 189 | #define ioc3_w_erbar(v) do { ioc3->erbar = cpu_to_be32(v); } while (0) |
| 190 | #define ioc3_r_ercir() be32_to_cpu(ioc3->ercir) |
| 191 | #define ioc3_w_ercir(v) do { ioc3->ercir = cpu_to_be32(v); } while (0) |
| 192 | #define ioc3_r_erpir() be32_to_cpu(ioc3->erpir) |
| 193 | #define ioc3_w_erpir(v) do { ioc3->erpir = cpu_to_be32(v); } while (0) |
| 194 | #define ioc3_r_ertr() be32_to_cpu(ioc3->ertr) |
| 195 | #define ioc3_w_ertr(v) do { ioc3->ertr = cpu_to_be32(v); } while (0) |
| 196 | #define ioc3_r_etcsr() be32_to_cpu(ioc3->etcsr) |
| 197 | #define ioc3_w_etcsr(v) do { ioc3->etcsr = cpu_to_be32(v); } while (0) |
| 198 | #define ioc3_r_ersr() be32_to_cpu(ioc3->ersr) |
| 199 | #define ioc3_w_ersr(v) do { ioc3->ersr = cpu_to_be32(v); } while (0) |
| 200 | #define ioc3_r_etcdc() be32_to_cpu(ioc3->etcdc) |
| 201 | #define ioc3_w_etcdc(v) do { ioc3->etcdc = cpu_to_be32(v); } while (0) |
| 202 | #define ioc3_r_ebir() be32_to_cpu(ioc3->ebir) |
| 203 | #define ioc3_w_ebir(v) do { ioc3->ebir = cpu_to_be32(v); } while (0) |
| 204 | #define ioc3_r_etbr_h() be32_to_cpu(ioc3->etbr_h) |
| 205 | #define ioc3_w_etbr_h(v) do { ioc3->etbr_h = cpu_to_be32(v); } while (0) |
| 206 | #define ioc3_r_etbr_l() be32_to_cpu(ioc3->etbr_l) |
| 207 | #define ioc3_w_etbr_l(v) do { ioc3->etbr_l = cpu_to_be32(v); } while (0) |
| 208 | #define ioc3_r_etcir() be32_to_cpu(ioc3->etcir) |
| 209 | #define ioc3_w_etcir(v) do { ioc3->etcir = cpu_to_be32(v); } while (0) |
| 210 | #define ioc3_r_etpir() be32_to_cpu(ioc3->etpir) |
| 211 | #define ioc3_w_etpir(v) do { ioc3->etpir = cpu_to_be32(v); } while (0) |
| 212 | #define ioc3_r_emar_h() be32_to_cpu(ioc3->emar_h) |
| 213 | #define ioc3_w_emar_h(v) do { ioc3->emar_h = cpu_to_be32(v); } while (0) |
| 214 | #define ioc3_r_emar_l() be32_to_cpu(ioc3->emar_l) |
| 215 | #define ioc3_w_emar_l(v) do { ioc3->emar_l = cpu_to_be32(v); } while (0) |
| 216 | #define ioc3_r_ehar_h() be32_to_cpu(ioc3->ehar_h) |
| 217 | #define ioc3_w_ehar_h(v) do { ioc3->ehar_h = cpu_to_be32(v); } while (0) |
| 218 | #define ioc3_r_ehar_l() be32_to_cpu(ioc3->ehar_l) |
| 219 | #define ioc3_w_ehar_l(v) do { ioc3->ehar_l = cpu_to_be32(v); } while (0) |
| 220 | #define ioc3_r_micr() be32_to_cpu(ioc3->micr) |
| 221 | #define ioc3_w_micr(v) do { ioc3->micr = cpu_to_be32(v); } while (0) |
| 222 | #define ioc3_r_midr_r() be32_to_cpu(ioc3->midr_r) |
| 223 | #define ioc3_w_midr_r(v) do { ioc3->midr_r = cpu_to_be32(v); } while (0) |
| 224 | #define ioc3_r_midr_w() be32_to_cpu(ioc3->midr_w) |
| 225 | #define ioc3_w_midr_w(v) do { ioc3->midr_w = cpu_to_be32(v); } while (0) |
| 226 | |
| 227 | static inline u32 mcr_pack(u32 pulse, u32 sample) |
| 228 | { |
| 229 | return (pulse << 10) | (sample << 2); |
| 230 | } |
| 231 | |
| 232 | static int nic_wait(struct ioc3 *ioc3) |
| 233 | { |
| 234 | u32 mcr; |
| 235 | |
| 236 | do { |
| 237 | mcr = ioc3_r_mcr(); |
| 238 | } while (!(mcr & 2)); |
| 239 | |
| 240 | return mcr & 1; |
| 241 | } |
| 242 | |
| 243 | static int nic_reset(struct ioc3 *ioc3) |
| 244 | { |
| 245 | int presence; |
| 246 | |
| 247 | ioc3_w_mcr(mcr_pack(500, 65)); |
| 248 | presence = nic_wait(ioc3); |
| 249 | |
| 250 | ioc3_w_mcr(mcr_pack(0, 500)); |
| 251 | nic_wait(ioc3); |
| 252 | |
| 253 | return presence; |
| 254 | } |
| 255 | |
| 256 | static inline int nic_read_bit(struct ioc3 *ioc3) |
| 257 | { |
| 258 | int result; |
| 259 | |
| 260 | ioc3_w_mcr(mcr_pack(6, 13)); |
| 261 | result = nic_wait(ioc3); |
| 262 | ioc3_w_mcr(mcr_pack(0, 100)); |
| 263 | nic_wait(ioc3); |
| 264 | |
| 265 | return result; |
| 266 | } |
| 267 | |
| 268 | static inline void nic_write_bit(struct ioc3 *ioc3, int bit) |
| 269 | { |
| 270 | if (bit) |
| 271 | ioc3_w_mcr(mcr_pack(6, 110)); |
| 272 | else |
| 273 | ioc3_w_mcr(mcr_pack(80, 30)); |
| 274 | |
| 275 | nic_wait(ioc3); |
| 276 | } |
| 277 | |
| 278 | /* |
| 279 | * Read a byte from an iButton device |
| 280 | */ |
| 281 | static u32 nic_read_byte(struct ioc3 *ioc3) |
| 282 | { |
| 283 | u32 result = 0; |
| 284 | int i; |
| 285 | |
| 286 | for (i = 0; i < 8; i++) |
| 287 | result = (result >> 1) | (nic_read_bit(ioc3) << 7); |
| 288 | |
| 289 | return result; |
| 290 | } |
| 291 | |
| 292 | /* |
| 293 | * Write a byte to an iButton device |
| 294 | */ |
| 295 | static void nic_write_byte(struct ioc3 *ioc3, int byte) |
| 296 | { |
| 297 | int i, bit; |
| 298 | |
| 299 | for (i = 8; i; i--) { |
| 300 | bit = byte & 1; |
| 301 | byte >>= 1; |
| 302 | |
| 303 | nic_write_bit(ioc3, bit); |
| 304 | } |
| 305 | } |
| 306 | |
| 307 | static u64 nic_find(struct ioc3 *ioc3, int *last) |
| 308 | { |
| 309 | int a, b, index, disc; |
| 310 | u64 address = 0; |
| 311 | |
| 312 | nic_reset(ioc3); |
| 313 | /* Search ROM. */ |
| 314 | nic_write_byte(ioc3, 0xf0); |
| 315 | |
| 316 | /* Algorithm from ``Book of iButton Standards''. */ |
| 317 | for (index = 0, disc = 0; index < 64; index++) { |
| 318 | a = nic_read_bit(ioc3); |
| 319 | b = nic_read_bit(ioc3); |
| 320 | |
| 321 | if (a && b) { |
| 322 | printk("NIC search failed (not fatal).\n"); |
| 323 | *last = 0; |
| 324 | return 0; |
| 325 | } |
| 326 | |
| 327 | if (!a && !b) { |
| 328 | if (index == *last) { |
| 329 | address |= 1UL << index; |
| 330 | } else if (index > *last) { |
| 331 | address &= ~(1UL << index); |
| 332 | disc = index; |
| 333 | } else if ((address & (1UL << index)) == 0) |
| 334 | disc = index; |
| 335 | nic_write_bit(ioc3, address & (1UL << index)); |
| 336 | continue; |
| 337 | } else { |
| 338 | if (a) |
| 339 | address |= 1UL << index; |
| 340 | else |
| 341 | address &= ~(1UL << index); |
| 342 | nic_write_bit(ioc3, a); |
| 343 | continue; |
| 344 | } |
| 345 | } |
| 346 | |
| 347 | *last = disc; |
| 348 | |
| 349 | return address; |
| 350 | } |
| 351 | |
| 352 | static int nic_init(struct ioc3 *ioc3) |
| 353 | { |
Alan Cox | f49343a | 2007-07-10 17:05:16 +0100 | [diff] [blame] | 354 | const char *unknown = "unknown"; |
| 355 | const char *type = unknown; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | u8 crc; |
| 357 | u8 serial[6]; |
| 358 | int save = 0, i; |
| 359 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | while (1) { |
| 361 | u64 reg; |
| 362 | reg = nic_find(ioc3, &save); |
| 363 | |
| 364 | switch (reg & 0xff) { |
| 365 | case 0x91: |
| 366 | type = "DS1981U"; |
| 367 | break; |
| 368 | default: |
| 369 | if (save == 0) { |
| 370 | /* Let the caller try again. */ |
| 371 | return -1; |
| 372 | } |
| 373 | continue; |
| 374 | } |
| 375 | |
| 376 | nic_reset(ioc3); |
| 377 | |
| 378 | /* Match ROM. */ |
| 379 | nic_write_byte(ioc3, 0x55); |
| 380 | for (i = 0; i < 8; i++) |
| 381 | nic_write_byte(ioc3, (reg >> (i << 3)) & 0xff); |
| 382 | |
| 383 | reg >>= 8; /* Shift out type. */ |
| 384 | for (i = 0; i < 6; i++) { |
| 385 | serial[i] = reg & 0xff; |
| 386 | reg >>= 8; |
| 387 | } |
| 388 | crc = reg & 0xff; |
| 389 | break; |
| 390 | } |
| 391 | |
| 392 | printk("Found %s NIC", type); |
Alan Cox | f49343a | 2007-07-10 17:05:16 +0100 | [diff] [blame] | 393 | if (type != unknown) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | printk (" registration number %02x:%02x:%02x:%02x:%02x:%02x," |
| 395 | " CRC %02x", serial[0], serial[1], serial[2], |
| 396 | serial[3], serial[4], serial[5], crc); |
| 397 | } |
| 398 | printk(".\n"); |
| 399 | |
| 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | /* |
| 404 | * Read the NIC (Number-In-a-Can) device used to store the MAC address on |
| 405 | * SN0 / SN00 nodeboards and PCI cards. |
| 406 | */ |
| 407 | static void ioc3_get_eaddr_nic(struct ioc3_private *ip) |
| 408 | { |
| 409 | struct ioc3 *ioc3 = ip->regs; |
| 410 | u8 nic[14]; |
| 411 | int tries = 2; /* There may be some problem with the battery? */ |
| 412 | int i; |
| 413 | |
| 414 | ioc3_w_gpcr_s(1 << 21); |
| 415 | |
| 416 | while (tries--) { |
| 417 | if (!nic_init(ioc3)) |
| 418 | break; |
| 419 | udelay(500); |
| 420 | } |
| 421 | |
| 422 | if (tries < 0) { |
| 423 | printk("Failed to read MAC address\n"); |
| 424 | return; |
| 425 | } |
| 426 | |
| 427 | /* Read Memory. */ |
| 428 | nic_write_byte(ioc3, 0xf0); |
| 429 | nic_write_byte(ioc3, 0x00); |
| 430 | nic_write_byte(ioc3, 0x00); |
| 431 | |
| 432 | for (i = 13; i >= 0; i--) |
| 433 | nic[i] = nic_read_byte(ioc3); |
| 434 | |
| 435 | for (i = 2; i < 8; i++) |
| 436 | priv_netdev(ip)->dev_addr[i - 2] = nic[i]; |
| 437 | } |
| 438 | |
| 439 | /* |
| 440 | * Ok, this is hosed by design. It's necessary to know what machine the |
| 441 | * NIC is in in order to know how to read the NIC address. We also have |
| 442 | * to know if it's a PCI card or a NIC in on the node board ... |
| 443 | */ |
| 444 | static void ioc3_get_eaddr(struct ioc3_private *ip) |
| 445 | { |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 446 | DECLARE_MAC_BUF(mac); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 447 | |
| 448 | ioc3_get_eaddr_nic(ip); |
| 449 | |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame^] | 450 | printk("Ethernet address is %s.\n", |
| 451 | print_mac(mac, priv_netdev(ip)->dev_addr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | } |
| 453 | |
| 454 | static void __ioc3_set_mac_address(struct net_device *dev) |
| 455 | { |
| 456 | struct ioc3_private *ip = netdev_priv(dev); |
| 457 | struct ioc3 *ioc3 = ip->regs; |
| 458 | |
| 459 | ioc3_w_emar_h((dev->dev_addr[5] << 8) | dev->dev_addr[4]); |
| 460 | ioc3_w_emar_l((dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | |
| 461 | (dev->dev_addr[1] << 8) | dev->dev_addr[0]); |
| 462 | } |
| 463 | |
| 464 | static int ioc3_set_mac_address(struct net_device *dev, void *addr) |
| 465 | { |
| 466 | struct ioc3_private *ip = netdev_priv(dev); |
| 467 | struct sockaddr *sa = addr; |
| 468 | |
| 469 | memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); |
| 470 | |
| 471 | spin_lock_irq(&ip->ioc3_lock); |
| 472 | __ioc3_set_mac_address(dev); |
| 473 | spin_unlock_irq(&ip->ioc3_lock); |
| 474 | |
| 475 | return 0; |
| 476 | } |
| 477 | |
| 478 | /* |
| 479 | * Caller must hold the ioc3_lock ever for MII readers. This is also |
| 480 | * used to protect the transmitter side but it's low contention. |
| 481 | */ |
| 482 | static int ioc3_mdio_read(struct net_device *dev, int phy, int reg) |
| 483 | { |
| 484 | struct ioc3_private *ip = netdev_priv(dev); |
| 485 | struct ioc3 *ioc3 = ip->regs; |
| 486 | |
| 487 | while (ioc3_r_micr() & MICR_BUSY); |
| 488 | ioc3_w_micr((phy << MICR_PHYADDR_SHIFT) | reg | MICR_READTRIG); |
| 489 | while (ioc3_r_micr() & MICR_BUSY); |
| 490 | |
Ralf Baechle | 852ea22 | 2005-08-02 11:01:27 +0100 | [diff] [blame] | 491 | return ioc3_r_midr_r() & MIDR_DATA_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | } |
| 493 | |
| 494 | static void ioc3_mdio_write(struct net_device *dev, int phy, int reg, int data) |
| 495 | { |
| 496 | struct ioc3_private *ip = netdev_priv(dev); |
| 497 | struct ioc3 *ioc3 = ip->regs; |
| 498 | |
| 499 | while (ioc3_r_micr() & MICR_BUSY); |
| 500 | ioc3_w_midr_w(data); |
| 501 | ioc3_w_micr((phy << MICR_PHYADDR_SHIFT) | reg); |
| 502 | while (ioc3_r_micr() & MICR_BUSY); |
| 503 | } |
| 504 | |
| 505 | static int ioc3_mii_init(struct ioc3_private *ip); |
| 506 | |
| 507 | static struct net_device_stats *ioc3_get_stats(struct net_device *dev) |
| 508 | { |
| 509 | struct ioc3_private *ip = netdev_priv(dev); |
| 510 | struct ioc3 *ioc3 = ip->regs; |
| 511 | |
| 512 | ip->stats.collisions += (ioc3_r_etcdc() & ETCDC_COLLCNT_MASK); |
| 513 | return &ip->stats; |
| 514 | } |
| 515 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | static void ioc3_tcpudp_checksum(struct sk_buff *skb, uint32_t hwsum, int len) |
| 517 | { |
| 518 | struct ethhdr *eh = eth_hdr(skb); |
| 519 | uint32_t csum, ehsum; |
| 520 | unsigned int proto; |
| 521 | struct iphdr *ih; |
| 522 | uint16_t *ew; |
| 523 | unsigned char *cp; |
| 524 | |
| 525 | /* |
| 526 | * Did hardware handle the checksum at all? The cases we can handle |
| 527 | * are: |
| 528 | * |
| 529 | * - TCP and UDP checksums of IPv4 only. |
| 530 | * - IPv6 would be doable but we keep that for later ... |
| 531 | * - Only unfragmented packets. Did somebody already tell you |
| 532 | * fragmentation is evil? |
| 533 | * - don't care about packet size. Worst case when processing a |
| 534 | * malformed packet we'll try to access the packet at ip header + |
| 535 | * 64 bytes which is still inside the skb. Even in the unlikely |
| 536 | * case where the checksum is right the higher layers will still |
| 537 | * drop the packet as appropriate. |
| 538 | */ |
| 539 | if (eh->h_proto != ntohs(ETH_P_IP)) |
| 540 | return; |
| 541 | |
| 542 | ih = (struct iphdr *) ((char *)eh + ETH_HLEN); |
| 543 | if (ih->frag_off & htons(IP_MF | IP_OFFSET)) |
| 544 | return; |
| 545 | |
| 546 | proto = ih->protocol; |
| 547 | if (proto != IPPROTO_TCP && proto != IPPROTO_UDP) |
| 548 | return; |
| 549 | |
| 550 | /* Same as tx - compute csum of pseudo header */ |
| 551 | csum = hwsum + |
| 552 | (ih->tot_len - (ih->ihl << 2)) + |
| 553 | htons((uint16_t)ih->protocol) + |
| 554 | (ih->saddr >> 16) + (ih->saddr & 0xffff) + |
| 555 | (ih->daddr >> 16) + (ih->daddr & 0xffff); |
| 556 | |
| 557 | /* Sum up ethernet dest addr, src addr and protocol */ |
| 558 | ew = (uint16_t *) eh; |
| 559 | ehsum = ew[0] + ew[1] + ew[2] + ew[3] + ew[4] + ew[5] + ew[6]; |
| 560 | |
| 561 | ehsum = (ehsum & 0xffff) + (ehsum >> 16); |
| 562 | ehsum = (ehsum & 0xffff) + (ehsum >> 16); |
| 563 | |
| 564 | csum += 0xffff ^ ehsum; |
| 565 | |
| 566 | /* In the next step we also subtract the 1's complement |
| 567 | checksum of the trailing ethernet CRC. */ |
| 568 | cp = (char *)eh + len; /* points at trailing CRC */ |
| 569 | if (len & 1) { |
| 570 | csum += 0xffff ^ (uint16_t) ((cp[1] << 8) | cp[0]); |
| 571 | csum += 0xffff ^ (uint16_t) ((cp[3] << 8) | cp[2]); |
| 572 | } else { |
| 573 | csum += 0xffff ^ (uint16_t) ((cp[0] << 8) | cp[1]); |
| 574 | csum += 0xffff ^ (uint16_t) ((cp[2] << 8) | cp[3]); |
| 575 | } |
| 576 | |
| 577 | csum = (csum & 0xffff) + (csum >> 16); |
| 578 | csum = (csum & 0xffff) + (csum >> 16); |
| 579 | |
| 580 | if (csum == 0xffff) |
| 581 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 582 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | |
| 584 | static inline void ioc3_rx(struct ioc3_private *ip) |
| 585 | { |
| 586 | struct sk_buff *skb, *new_skb; |
| 587 | struct ioc3 *ioc3 = ip->regs; |
| 588 | int rx_entry, n_entry, len; |
| 589 | struct ioc3_erxbuf *rxb; |
| 590 | unsigned long *rxr; |
| 591 | u32 w0, err; |
| 592 | |
| 593 | rxr = (unsigned long *) ip->rxr; /* Ring base */ |
| 594 | rx_entry = ip->rx_ci; /* RX consume index */ |
| 595 | n_entry = ip->rx_pi; |
| 596 | |
| 597 | skb = ip->rx_skbs[rx_entry]; |
| 598 | rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET); |
| 599 | w0 = be32_to_cpu(rxb->w0); |
| 600 | |
| 601 | while (w0 & ERXBUF_V) { |
| 602 | err = be32_to_cpu(rxb->err); /* It's valid ... */ |
| 603 | if (err & ERXBUF_GOODPKT) { |
| 604 | len = ((w0 >> ERXBUF_BYTECNT_SHIFT) & 0x7ff) - 4; |
| 605 | skb_trim(skb, len); |
| 606 | skb->protocol = eth_type_trans(skb, priv_netdev(ip)); |
| 607 | |
| 608 | new_skb = ioc3_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC); |
| 609 | if (!new_skb) { |
| 610 | /* Ouch, drop packet and just recycle packet |
| 611 | to keep the ring filled. */ |
| 612 | ip->stats.rx_dropped++; |
| 613 | new_skb = skb; |
| 614 | goto next; |
| 615 | } |
| 616 | |
Ralf Baechle | bbfb86c | 2007-07-25 12:31:57 +0100 | [diff] [blame] | 617 | if (likely(ip->flags & IOC3_FLAG_RX_CHECKSUMS)) |
| 618 | ioc3_tcpudp_checksum(skb, |
| 619 | w0 & ERXBUF_IPCKSUM_MASK, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | |
| 621 | netif_rx(skb); |
| 622 | |
| 623 | ip->rx_skbs[rx_entry] = NULL; /* Poison */ |
| 624 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | /* Because we reserve afterwards. */ |
| 626 | skb_put(new_skb, (1664 + RX_OFFSET)); |
| 627 | rxb = (struct ioc3_erxbuf *) new_skb->data; |
| 628 | skb_reserve(new_skb, RX_OFFSET); |
| 629 | |
| 630 | priv_netdev(ip)->last_rx = jiffies; |
| 631 | ip->stats.rx_packets++; /* Statistics */ |
| 632 | ip->stats.rx_bytes += len; |
| 633 | } else { |
| 634 | /* The frame is invalid and the skb never |
| 635 | reached the network layer so we can just |
| 636 | recycle it. */ |
| 637 | new_skb = skb; |
| 638 | ip->stats.rx_errors++; |
| 639 | } |
| 640 | if (err & ERXBUF_CRCERR) /* Statistics */ |
| 641 | ip->stats.rx_crc_errors++; |
| 642 | if (err & ERXBUF_FRAMERR) |
| 643 | ip->stats.rx_frame_errors++; |
| 644 | next: |
| 645 | ip->rx_skbs[n_entry] = new_skb; |
| 646 | rxr[n_entry] = cpu_to_be64(ioc3_map(rxb, 1)); |
| 647 | rxb->w0 = 0; /* Clear valid flag */ |
| 648 | n_entry = (n_entry + 1) & 511; /* Update erpir */ |
| 649 | |
| 650 | /* Now go on to the next ring entry. */ |
| 651 | rx_entry = (rx_entry + 1) & 511; |
| 652 | skb = ip->rx_skbs[rx_entry]; |
| 653 | rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET); |
| 654 | w0 = be32_to_cpu(rxb->w0); |
| 655 | } |
| 656 | ioc3_w_erpir((n_entry << 3) | ERPIR_ARM); |
| 657 | ip->rx_pi = n_entry; |
| 658 | ip->rx_ci = rx_entry; |
| 659 | } |
| 660 | |
| 661 | static inline void ioc3_tx(struct ioc3_private *ip) |
| 662 | { |
| 663 | unsigned long packets, bytes; |
| 664 | struct ioc3 *ioc3 = ip->regs; |
| 665 | int tx_entry, o_entry; |
| 666 | struct sk_buff *skb; |
| 667 | u32 etcir; |
| 668 | |
| 669 | spin_lock(&ip->ioc3_lock); |
| 670 | etcir = ioc3_r_etcir(); |
| 671 | |
| 672 | tx_entry = (etcir >> 7) & 127; |
| 673 | o_entry = ip->tx_ci; |
| 674 | packets = 0; |
| 675 | bytes = 0; |
| 676 | |
| 677 | while (o_entry != tx_entry) { |
| 678 | packets++; |
| 679 | skb = ip->tx_skbs[o_entry]; |
| 680 | bytes += skb->len; |
| 681 | dev_kfree_skb_irq(skb); |
| 682 | ip->tx_skbs[o_entry] = NULL; |
| 683 | |
| 684 | o_entry = (o_entry + 1) & 127; /* Next */ |
| 685 | |
| 686 | etcir = ioc3_r_etcir(); /* More pkts sent? */ |
| 687 | tx_entry = (etcir >> 7) & 127; |
| 688 | } |
| 689 | |
| 690 | ip->stats.tx_packets += packets; |
| 691 | ip->stats.tx_bytes += bytes; |
| 692 | ip->txqlen -= packets; |
| 693 | |
| 694 | if (ip->txqlen < 128) |
| 695 | netif_wake_queue(priv_netdev(ip)); |
| 696 | |
| 697 | ip->tx_ci = o_entry; |
| 698 | spin_unlock(&ip->ioc3_lock); |
| 699 | } |
| 700 | |
| 701 | /* |
| 702 | * Deal with fatal IOC3 errors. This condition might be caused by a hard or |
| 703 | * software problems, so we should try to recover |
| 704 | * more gracefully if this ever happens. In theory we might be flooded |
| 705 | * with such error interrupts if something really goes wrong, so we might |
| 706 | * also consider to take the interface down. |
| 707 | */ |
| 708 | static void ioc3_error(struct ioc3_private *ip, u32 eisr) |
| 709 | { |
| 710 | struct net_device *dev = priv_netdev(ip); |
| 711 | unsigned char *iface = dev->name; |
| 712 | |
| 713 | spin_lock(&ip->ioc3_lock); |
| 714 | |
| 715 | if (eisr & EISR_RXOFLO) |
| 716 | printk(KERN_ERR "%s: RX overflow.\n", iface); |
| 717 | if (eisr & EISR_RXBUFOFLO) |
| 718 | printk(KERN_ERR "%s: RX buffer overflow.\n", iface); |
| 719 | if (eisr & EISR_RXMEMERR) |
| 720 | printk(KERN_ERR "%s: RX PCI error.\n", iface); |
| 721 | if (eisr & EISR_RXPARERR) |
| 722 | printk(KERN_ERR "%s: RX SSRAM parity error.\n", iface); |
| 723 | if (eisr & EISR_TXBUFUFLO) |
| 724 | printk(KERN_ERR "%s: TX buffer underflow.\n", iface); |
| 725 | if (eisr & EISR_TXMEMERR) |
| 726 | printk(KERN_ERR "%s: TX PCI error.\n", iface); |
| 727 | |
| 728 | ioc3_stop(ip); |
| 729 | ioc3_init(dev); |
| 730 | ioc3_mii_init(ip); |
| 731 | |
| 732 | netif_wake_queue(dev); |
| 733 | |
| 734 | spin_unlock(&ip->ioc3_lock); |
| 735 | } |
| 736 | |
| 737 | /* The interrupt handler does all of the Rx thread work and cleans up |
| 738 | after the Tx thread. */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 739 | static irqreturn_t ioc3_interrupt(int irq, void *_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | { |
| 741 | struct net_device *dev = (struct net_device *)_dev; |
| 742 | struct ioc3_private *ip = netdev_priv(dev); |
| 743 | struct ioc3 *ioc3 = ip->regs; |
| 744 | const u32 enabled = EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO | |
| 745 | EISR_RXMEMERR | EISR_RXPARERR | EISR_TXBUFUFLO | |
| 746 | EISR_TXEXPLICIT | EISR_TXMEMERR; |
| 747 | u32 eisr; |
| 748 | |
| 749 | eisr = ioc3_r_eisr() & enabled; |
| 750 | |
| 751 | ioc3_w_eisr(eisr); |
| 752 | (void) ioc3_r_eisr(); /* Flush */ |
| 753 | |
| 754 | if (eisr & (EISR_RXOFLO | EISR_RXBUFOFLO | EISR_RXMEMERR | |
| 755 | EISR_RXPARERR | EISR_TXBUFUFLO | EISR_TXMEMERR)) |
| 756 | ioc3_error(ip, eisr); |
| 757 | if (eisr & EISR_RXTIMERINT) |
| 758 | ioc3_rx(ip); |
| 759 | if (eisr & EISR_TXEXPLICIT) |
| 760 | ioc3_tx(ip); |
| 761 | |
| 762 | return IRQ_HANDLED; |
| 763 | } |
| 764 | |
| 765 | static inline void ioc3_setup_duplex(struct ioc3_private *ip) |
| 766 | { |
| 767 | struct ioc3 *ioc3 = ip->regs; |
| 768 | |
| 769 | if (ip->mii.full_duplex) { |
| 770 | ioc3_w_etcsr(ETCSR_FD); |
| 771 | ip->emcr |= EMCR_DUPLEX; |
| 772 | } else { |
| 773 | ioc3_w_etcsr(ETCSR_HD); |
| 774 | ip->emcr &= ~EMCR_DUPLEX; |
| 775 | } |
| 776 | ioc3_w_emcr(ip->emcr); |
| 777 | } |
| 778 | |
| 779 | static void ioc3_timer(unsigned long data) |
| 780 | { |
| 781 | struct ioc3_private *ip = (struct ioc3_private *) data; |
| 782 | |
| 783 | /* Print the link status if it has changed */ |
| 784 | mii_check_media(&ip->mii, 1, 0); |
| 785 | ioc3_setup_duplex(ip); |
| 786 | |
| 787 | ip->ioc3_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2s */ |
| 788 | add_timer(&ip->ioc3_timer); |
| 789 | } |
| 790 | |
| 791 | /* |
| 792 | * Try to find a PHY. There is no apparent relation between the MII addresses |
| 793 | * in the SGI documentation and what we find in reality, so we simply probe |
| 794 | * for the PHY. It seems IOC3 PHYs usually live on address 31. One of my |
| 795 | * onboard IOC3s has the special oddity that probing doesn't seem to find it |
| 796 | * yet the interface seems to work fine, so if probing fails we for now will |
| 797 | * simply default to PHY 31 instead of bailing out. |
| 798 | */ |
| 799 | static int ioc3_mii_init(struct ioc3_private *ip) |
| 800 | { |
| 801 | struct net_device *dev = priv_netdev(ip); |
| 802 | int i, found = 0, res = 0; |
| 803 | int ioc3_phy_workaround = 1; |
| 804 | u16 word; |
| 805 | |
| 806 | for (i = 0; i < 32; i++) { |
| 807 | word = ioc3_mdio_read(dev, i, MII_PHYSID1); |
| 808 | |
| 809 | if (word != 0xffff && word != 0x0000) { |
| 810 | found = 1; |
| 811 | break; /* Found a PHY */ |
| 812 | } |
| 813 | } |
| 814 | |
| 815 | if (!found) { |
| 816 | if (ioc3_phy_workaround) |
| 817 | i = 31; |
| 818 | else { |
| 819 | ip->mii.phy_id = -1; |
| 820 | res = -ENODEV; |
| 821 | goto out; |
| 822 | } |
| 823 | } |
| 824 | |
| 825 | ip->mii.phy_id = i; |
Ralf Baechle | f0ba735 | 2007-02-17 02:51:15 +0000 | [diff] [blame] | 826 | |
| 827 | out: |
| 828 | return res; |
| 829 | } |
| 830 | |
| 831 | static void ioc3_mii_start(struct ioc3_private *ip) |
| 832 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 833 | ip->ioc3_timer.expires = jiffies + (12 * HZ)/10; /* 1.2 sec. */ |
| 834 | ip->ioc3_timer.data = (unsigned long) ip; |
| 835 | ip->ioc3_timer.function = &ioc3_timer; |
| 836 | add_timer(&ip->ioc3_timer); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | } |
| 838 | |
| 839 | static inline void ioc3_clean_rx_ring(struct ioc3_private *ip) |
| 840 | { |
| 841 | struct sk_buff *skb; |
| 842 | int i; |
| 843 | |
| 844 | for (i = ip->rx_ci; i & 15; i++) { |
| 845 | ip->rx_skbs[ip->rx_pi] = ip->rx_skbs[ip->rx_ci]; |
| 846 | ip->rxr[ip->rx_pi++] = ip->rxr[ip->rx_ci++]; |
| 847 | } |
| 848 | ip->rx_pi &= 511; |
| 849 | ip->rx_ci &= 511; |
| 850 | |
| 851 | for (i = ip->rx_ci; i != ip->rx_pi; i = (i+1) & 511) { |
| 852 | struct ioc3_erxbuf *rxb; |
| 853 | skb = ip->rx_skbs[i]; |
| 854 | rxb = (struct ioc3_erxbuf *) (skb->data - RX_OFFSET); |
| 855 | rxb->w0 = 0; |
| 856 | } |
| 857 | } |
| 858 | |
| 859 | static inline void ioc3_clean_tx_ring(struct ioc3_private *ip) |
| 860 | { |
| 861 | struct sk_buff *skb; |
| 862 | int i; |
| 863 | |
| 864 | for (i=0; i < 128; i++) { |
| 865 | skb = ip->tx_skbs[i]; |
| 866 | if (skb) { |
| 867 | ip->tx_skbs[i] = NULL; |
| 868 | dev_kfree_skb_any(skb); |
| 869 | } |
| 870 | ip->txr[i].cmd = 0; |
| 871 | } |
| 872 | ip->tx_pi = 0; |
| 873 | ip->tx_ci = 0; |
| 874 | } |
| 875 | |
| 876 | static void ioc3_free_rings(struct ioc3_private *ip) |
| 877 | { |
| 878 | struct sk_buff *skb; |
| 879 | int rx_entry, n_entry; |
| 880 | |
| 881 | if (ip->txr) { |
| 882 | ioc3_clean_tx_ring(ip); |
| 883 | free_pages((unsigned long)ip->txr, 2); |
| 884 | ip->txr = NULL; |
| 885 | } |
| 886 | |
| 887 | if (ip->rxr) { |
| 888 | n_entry = ip->rx_ci; |
| 889 | rx_entry = ip->rx_pi; |
| 890 | |
| 891 | while (n_entry != rx_entry) { |
| 892 | skb = ip->rx_skbs[n_entry]; |
| 893 | if (skb) |
| 894 | dev_kfree_skb_any(skb); |
| 895 | |
| 896 | n_entry = (n_entry + 1) & 511; |
| 897 | } |
| 898 | free_page((unsigned long)ip->rxr); |
| 899 | ip->rxr = NULL; |
| 900 | } |
| 901 | } |
| 902 | |
| 903 | static void ioc3_alloc_rings(struct net_device *dev) |
| 904 | { |
| 905 | struct ioc3_private *ip = netdev_priv(dev); |
| 906 | struct ioc3_erxbuf *rxb; |
| 907 | unsigned long *rxr; |
| 908 | int i; |
| 909 | |
| 910 | if (ip->rxr == NULL) { |
| 911 | /* Allocate and initialize rx ring. 4kb = 512 entries */ |
| 912 | ip->rxr = (unsigned long *) get_zeroed_page(GFP_ATOMIC); |
| 913 | rxr = (unsigned long *) ip->rxr; |
| 914 | if (!rxr) |
| 915 | printk("ioc3_alloc_rings(): get_zeroed_page() failed!\n"); |
| 916 | |
| 917 | /* Now the rx buffers. The RX ring may be larger but |
| 918 | we only allocate 16 buffers for now. Need to tune |
| 919 | this for performance and memory later. */ |
| 920 | for (i = 0; i < RX_BUFFS; i++) { |
| 921 | struct sk_buff *skb; |
| 922 | |
| 923 | skb = ioc3_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC); |
| 924 | if (!skb) { |
| 925 | show_free_areas(); |
| 926 | continue; |
| 927 | } |
| 928 | |
| 929 | ip->rx_skbs[i] = skb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | |
| 931 | /* Because we reserve afterwards. */ |
| 932 | skb_put(skb, (1664 + RX_OFFSET)); |
| 933 | rxb = (struct ioc3_erxbuf *) skb->data; |
| 934 | rxr[i] = cpu_to_be64(ioc3_map(rxb, 1)); |
| 935 | skb_reserve(skb, RX_OFFSET); |
| 936 | } |
| 937 | ip->rx_ci = 0; |
| 938 | ip->rx_pi = RX_BUFFS; |
| 939 | } |
| 940 | |
| 941 | if (ip->txr == NULL) { |
| 942 | /* Allocate and initialize tx rings. 16kb = 128 bufs. */ |
| 943 | ip->txr = (struct ioc3_etxd *)__get_free_pages(GFP_KERNEL, 2); |
| 944 | if (!ip->txr) |
| 945 | printk("ioc3_alloc_rings(): __get_free_pages() failed!\n"); |
| 946 | ip->tx_pi = 0; |
| 947 | ip->tx_ci = 0; |
| 948 | } |
| 949 | } |
| 950 | |
| 951 | static void ioc3_init_rings(struct net_device *dev) |
| 952 | { |
| 953 | struct ioc3_private *ip = netdev_priv(dev); |
| 954 | struct ioc3 *ioc3 = ip->regs; |
| 955 | unsigned long ring; |
| 956 | |
| 957 | ioc3_free_rings(ip); |
| 958 | ioc3_alloc_rings(dev); |
| 959 | |
| 960 | ioc3_clean_rx_ring(ip); |
| 961 | ioc3_clean_tx_ring(ip); |
| 962 | |
| 963 | /* Now the rx ring base, consume & produce registers. */ |
| 964 | ring = ioc3_map(ip->rxr, 0); |
| 965 | ioc3_w_erbr_h(ring >> 32); |
| 966 | ioc3_w_erbr_l(ring & 0xffffffff); |
| 967 | ioc3_w_ercir(ip->rx_ci << 3); |
| 968 | ioc3_w_erpir((ip->rx_pi << 3) | ERPIR_ARM); |
| 969 | |
| 970 | ring = ioc3_map(ip->txr, 0); |
| 971 | |
| 972 | ip->txqlen = 0; /* nothing queued */ |
| 973 | |
| 974 | /* Now the tx ring base, consume & produce registers. */ |
| 975 | ioc3_w_etbr_h(ring >> 32); |
| 976 | ioc3_w_etbr_l(ring & 0xffffffff); |
| 977 | ioc3_w_etpir(ip->tx_pi << 7); |
| 978 | ioc3_w_etcir(ip->tx_ci << 7); |
| 979 | (void) ioc3_r_etcir(); /* Flush */ |
| 980 | } |
| 981 | |
| 982 | static inline void ioc3_ssram_disc(struct ioc3_private *ip) |
| 983 | { |
| 984 | struct ioc3 *ioc3 = ip->regs; |
| 985 | volatile u32 *ssram0 = &ioc3->ssram[0x0000]; |
| 986 | volatile u32 *ssram1 = &ioc3->ssram[0x4000]; |
| 987 | unsigned int pattern = 0x5555; |
| 988 | |
| 989 | /* Assume the larger size SSRAM and enable parity checking */ |
| 990 | ioc3_w_emcr(ioc3_r_emcr() | (EMCR_BUFSIZ | EMCR_RAMPAR)); |
| 991 | |
| 992 | *ssram0 = pattern; |
| 993 | *ssram1 = ~pattern & IOC3_SSRAM_DM; |
| 994 | |
| 995 | if ((*ssram0 & IOC3_SSRAM_DM) != pattern || |
| 996 | (*ssram1 & IOC3_SSRAM_DM) != (~pattern & IOC3_SSRAM_DM)) { |
| 997 | /* set ssram size to 64 KB */ |
| 998 | ip->emcr = EMCR_RAMPAR; |
| 999 | ioc3_w_emcr(ioc3_r_emcr() & ~EMCR_BUFSIZ); |
| 1000 | } else |
| 1001 | ip->emcr = EMCR_BUFSIZ | EMCR_RAMPAR; |
| 1002 | } |
| 1003 | |
| 1004 | static void ioc3_init(struct net_device *dev) |
| 1005 | { |
| 1006 | struct ioc3_private *ip = netdev_priv(dev); |
| 1007 | struct ioc3 *ioc3 = ip->regs; |
| 1008 | |
Ralf Baechle | cfadbd2 | 2006-10-18 02:15:37 +0100 | [diff] [blame] | 1009 | del_timer_sync(&ip->ioc3_timer); /* Kill if running */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1010 | |
| 1011 | ioc3_w_emcr(EMCR_RST); /* Reset */ |
| 1012 | (void) ioc3_r_emcr(); /* Flush WB */ |
| 1013 | udelay(4); /* Give it time ... */ |
| 1014 | ioc3_w_emcr(0); |
| 1015 | (void) ioc3_r_emcr(); |
| 1016 | |
| 1017 | /* Misc registers */ |
| 1018 | #ifdef CONFIG_SGI_IP27 |
| 1019 | ioc3_w_erbar(PCI64_ATTR_BAR >> 32); /* Barrier on last store */ |
| 1020 | #else |
| 1021 | ioc3_w_erbar(0); /* Let PCI API get it right */ |
| 1022 | #endif |
| 1023 | (void) ioc3_r_etcdc(); /* Clear on read */ |
| 1024 | ioc3_w_ercsr(15); /* RX low watermark */ |
| 1025 | ioc3_w_ertr(0); /* Interrupt immediately */ |
| 1026 | __ioc3_set_mac_address(dev); |
| 1027 | ioc3_w_ehar_h(ip->ehar_h); |
| 1028 | ioc3_w_ehar_l(ip->ehar_l); |
| 1029 | ioc3_w_ersr(42); /* XXX should be random */ |
| 1030 | |
| 1031 | ioc3_init_rings(dev); |
| 1032 | |
| 1033 | ip->emcr |= ((RX_OFFSET / 2) << EMCR_RXOFF_SHIFT) | EMCR_TXDMAEN | |
| 1034 | EMCR_TXEN | EMCR_RXDMAEN | EMCR_RXEN | EMCR_PADEN; |
| 1035 | ioc3_w_emcr(ip->emcr); |
| 1036 | ioc3_w_eier(EISR_RXTIMERINT | EISR_RXOFLO | EISR_RXBUFOFLO | |
| 1037 | EISR_RXMEMERR | EISR_RXPARERR | EISR_TXBUFUFLO | |
| 1038 | EISR_TXEXPLICIT | EISR_TXMEMERR); |
| 1039 | (void) ioc3_r_eier(); |
| 1040 | } |
| 1041 | |
| 1042 | static inline void ioc3_stop(struct ioc3_private *ip) |
| 1043 | { |
| 1044 | struct ioc3 *ioc3 = ip->regs; |
| 1045 | |
| 1046 | ioc3_w_emcr(0); /* Shutup */ |
| 1047 | ioc3_w_eier(0); /* Disable interrupts */ |
| 1048 | (void) ioc3_r_eier(); /* Flush */ |
| 1049 | } |
| 1050 | |
| 1051 | static int ioc3_open(struct net_device *dev) |
| 1052 | { |
| 1053 | struct ioc3_private *ip = netdev_priv(dev); |
| 1054 | |
Thomas Gleixner | 1fb9df5 | 2006-07-01 19:29:39 -0700 | [diff] [blame] | 1055 | if (request_irq(dev->irq, ioc3_interrupt, IRQF_SHARED, ioc3_str, dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1056 | printk(KERN_ERR "%s: Can't get irq %d\n", dev->name, dev->irq); |
| 1057 | |
| 1058 | return -EAGAIN; |
| 1059 | } |
| 1060 | |
| 1061 | ip->ehar_h = 0; |
| 1062 | ip->ehar_l = 0; |
| 1063 | ioc3_init(dev); |
Ralf Baechle | f0ba735 | 2007-02-17 02:51:15 +0000 | [diff] [blame] | 1064 | ioc3_mii_start(ip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | |
| 1066 | netif_start_queue(dev); |
| 1067 | return 0; |
| 1068 | } |
| 1069 | |
| 1070 | static int ioc3_close(struct net_device *dev) |
| 1071 | { |
| 1072 | struct ioc3_private *ip = netdev_priv(dev); |
| 1073 | |
Ralf Baechle | cfadbd2 | 2006-10-18 02:15:37 +0100 | [diff] [blame] | 1074 | del_timer_sync(&ip->ioc3_timer); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1075 | |
| 1076 | netif_stop_queue(dev); |
| 1077 | |
| 1078 | ioc3_stop(ip); |
| 1079 | free_irq(dev->irq, dev); |
| 1080 | |
| 1081 | ioc3_free_rings(ip); |
| 1082 | return 0; |
| 1083 | } |
| 1084 | |
| 1085 | /* |
| 1086 | * MENET cards have four IOC3 chips, which are attached to two sets of |
| 1087 | * PCI slot resources each: the primary connections are on slots |
| 1088 | * 0..3 and the secondaries are on 4..7 |
| 1089 | * |
| 1090 | * All four ethernets are brought out to connectors; six serial ports |
| 1091 | * (a pair from each of the first three IOC3s) are brought out to |
| 1092 | * MiniDINs; all other subdevices are left swinging in the wind, leave |
| 1093 | * them disabled. |
| 1094 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1095 | |
Alan Cox | f49343a | 2007-07-10 17:05:16 +0100 | [diff] [blame] | 1096 | static int ioc3_adjacent_is_ioc3(struct pci_dev *pdev, int slot) |
| 1097 | { |
| 1098 | struct pci_dev *dev = pci_get_slot(pdev->bus, PCI_DEVFN(slot, 0)); |
| 1099 | int ret = 0; |
| 1100 | |
| 1101 | if (dev) { |
| 1102 | if (dev->vendor == PCI_VENDOR_ID_SGI && |
| 1103 | dev->device == PCI_DEVICE_ID_SGI_IOC3) |
| 1104 | ret = 1; |
| 1105 | pci_dev_put(dev); |
| 1106 | } |
| 1107 | |
| 1108 | return ret; |
| 1109 | } |
| 1110 | |
| 1111 | static int ioc3_is_menet(struct pci_dev *pdev) |
| 1112 | { |
| 1113 | return pdev->bus->parent == NULL && |
| 1114 | ioc3_adjacent_is_ioc3(pdev, 0) && |
| 1115 | ioc3_adjacent_is_ioc3(pdev, 1) && |
| 1116 | ioc3_adjacent_is_ioc3(pdev, 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1117 | } |
| 1118 | |
| 1119 | #ifdef CONFIG_SERIAL_8250 |
| 1120 | /* |
| 1121 | * Note about serial ports and consoles: |
| 1122 | * For console output, everyone uses the IOC3 UARTA (offset 0x178) |
| 1123 | * connected to the master node (look in ip27_setup_console() and |
| 1124 | * ip27prom_console_write()). |
| 1125 | * |
| 1126 | * For serial (/dev/ttyS0 etc), we can not have hardcoded serial port |
| 1127 | * addresses on a partitioned machine. Since we currently use the ioc3 |
| 1128 | * serial ports, we use dynamic serial port discovery that the serial.c |
| 1129 | * driver uses for pci/pnp ports (there is an entry for the SGI ioc3 |
| 1130 | * boards in pci_boards[]). Unfortunately, UARTA's pio address is greater |
| 1131 | * than UARTB's, although UARTA on o200s has traditionally been known as |
| 1132 | * port 0. So, we just use one serial port from each ioc3 (since the |
| 1133 | * serial driver adds addresses to get to higher ports). |
| 1134 | * |
| 1135 | * The first one to do a register_console becomes the preferred console |
| 1136 | * (if there is no kernel command line console= directive). /dev/console |
| 1137 | * (ie 5, 1) is then "aliased" into the device number returned by the |
| 1138 | * "device" routine referred to in this console structure |
| 1139 | * (ip27prom_console_dev). |
| 1140 | * |
| 1141 | * Also look in ip27-pci.c:pci_fixup_ioc3() for some comments on working |
| 1142 | * around ioc3 oddities in this respect. |
| 1143 | * |
Ralf Baechle | 0491d1f3 | 2007-08-26 18:51:22 +0100 | [diff] [blame] | 1144 | * The IOC3 serials use a 22MHz clock rate with an additional divider which |
| 1145 | * can be programmed in the SCR register if the DLAB bit is set. |
| 1146 | * |
| 1147 | * Register to interrupt zero because we share the interrupt with |
| 1148 | * the serial driver which we don't properly support yet. |
| 1149 | * |
| 1150 | * Can't use UPF_IOREMAP as the whole of IOC3 resources have already been |
| 1151 | * registered. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1152 | */ |
Ralf Baechle | 0491d1f3 | 2007-08-26 18:51:22 +0100 | [diff] [blame] | 1153 | static void __devinit ioc3_8250_register(struct ioc3_uartregs __iomem *uart) |
| 1154 | { |
| 1155 | #define COSMISC_CONSTANT 6 |
| 1156 | |
| 1157 | struct uart_port port = { |
| 1158 | .irq = 0, |
| 1159 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
| 1160 | .iotype = UPIO_MEM, |
| 1161 | .regshift = 0, |
| 1162 | .uartclk = (22000000 << 1) / COSMISC_CONSTANT, |
| 1163 | |
| 1164 | .membase = (unsigned char __iomem *) uart, |
| 1165 | .mapbase = (unsigned long) uart, |
| 1166 | }; |
| 1167 | unsigned char lcr; |
| 1168 | |
| 1169 | lcr = uart->iu_lcr; |
| 1170 | uart->iu_lcr = lcr | UART_LCR_DLAB; |
| 1171 | uart->iu_scr = COSMISC_CONSTANT, |
| 1172 | uart->iu_lcr = lcr; |
| 1173 | uart->iu_lcr; |
| 1174 | serial8250_register_port(&port); |
| 1175 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1176 | |
| 1177 | static void __devinit ioc3_serial_probe(struct pci_dev *pdev, struct ioc3 *ioc3) |
| 1178 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1179 | /* |
| 1180 | * We need to recognice and treat the fourth MENET serial as it |
| 1181 | * does not have an SuperIO chip attached to it, therefore attempting |
| 1182 | * to access it will result in bus errors. We call something an |
| 1183 | * MENET if PCI slot 0, 1, 2 and 3 of a master PCI bus all have an IOC3 |
| 1184 | * in it. This is paranoid but we want to avoid blowing up on a |
| 1185 | * showhorn PCI box that happens to have 4 IOC3 cards in it so it's |
| 1186 | * not paranoid enough ... |
| 1187 | */ |
| 1188 | if (ioc3_is_menet(pdev) && PCI_SLOT(pdev->devfn) == 3) |
| 1189 | return; |
| 1190 | |
Ralf Baechle | 15a9380 | 2005-11-08 23:10:51 +0000 | [diff] [blame] | 1191 | /* |
Ralf Baechle | 0491d1f3 | 2007-08-26 18:51:22 +0100 | [diff] [blame] | 1192 | * Switch IOC3 to PIO mode. It probably already was but let's be |
| 1193 | * paranoid |
Ralf Baechle | 15a9380 | 2005-11-08 23:10:51 +0000 | [diff] [blame] | 1194 | */ |
Ralf Baechle | 0491d1f3 | 2007-08-26 18:51:22 +0100 | [diff] [blame] | 1195 | ioc3->gpcr_s = GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL; |
| 1196 | ioc3->gpcr_s; |
| 1197 | ioc3->gppr_6 = 0; |
| 1198 | ioc3->gppr_6; |
| 1199 | ioc3->gppr_7 = 0; |
| 1200 | ioc3->gppr_7; |
| 1201 | ioc3->sscr_a = ioc3->sscr_a & ~SSCR_DMA_EN; |
| 1202 | ioc3->sscr_a; |
| 1203 | ioc3->sscr_b = ioc3->sscr_b & ~SSCR_DMA_EN; |
| 1204 | ioc3->sscr_b; |
| 1205 | /* Disable all SA/B interrupts except for SA/B_INT in SIO_IEC. */ |
| 1206 | ioc3->sio_iec &= ~ (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL | |
| 1207 | SIO_IR_SA_RX_HIGH | SIO_IR_SA_RX_TIMER | |
| 1208 | SIO_IR_SA_DELTA_DCD | SIO_IR_SA_DELTA_CTS | |
| 1209 | SIO_IR_SA_TX_EXPLICIT | SIO_IR_SA_MEMERR); |
| 1210 | ioc3->sio_iec |= SIO_IR_SA_INT; |
| 1211 | ioc3->sscr_a = 0; |
| 1212 | ioc3->sio_iec &= ~ (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL | |
| 1213 | SIO_IR_SB_RX_HIGH | SIO_IR_SB_RX_TIMER | |
| 1214 | SIO_IR_SB_DELTA_DCD | SIO_IR_SB_DELTA_CTS | |
| 1215 | SIO_IR_SB_TX_EXPLICIT | SIO_IR_SB_MEMERR); |
| 1216 | ioc3->sio_iec |= SIO_IR_SB_INT; |
| 1217 | ioc3->sscr_b = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1218 | |
Ralf Baechle | 0491d1f3 | 2007-08-26 18:51:22 +0100 | [diff] [blame] | 1219 | ioc3_8250_register(&ioc3->sregs.uarta); |
| 1220 | ioc3_8250_register(&ioc3->sregs.uartb); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1221 | } |
| 1222 | #endif |
| 1223 | |
| 1224 | static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 1225 | { |
| 1226 | unsigned int sw_physid1, sw_physid2; |
| 1227 | struct net_device *dev = NULL; |
| 1228 | struct ioc3_private *ip; |
| 1229 | struct ioc3 *ioc3; |
| 1230 | unsigned long ioc3_base, ioc3_size; |
| 1231 | u32 vendor, model, rev; |
| 1232 | int err, pci_using_dac; |
| 1233 | |
| 1234 | /* Configure DMA attributes. */ |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 1235 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1236 | if (!err) { |
| 1237 | pci_using_dac = 1; |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 1238 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1239 | if (err < 0) { |
| 1240 | printk(KERN_ERR "%s: Unable to obtain 64 bit DMA " |
| 1241 | "for consistent allocations\n", pci_name(pdev)); |
| 1242 | goto out; |
| 1243 | } |
| 1244 | } else { |
Matthias Gehre | 910638a | 2006-03-28 01:56:48 -0800 | [diff] [blame] | 1245 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1246 | if (err) { |
| 1247 | printk(KERN_ERR "%s: No usable DMA configuration, " |
| 1248 | "aborting.\n", pci_name(pdev)); |
| 1249 | goto out; |
| 1250 | } |
| 1251 | pci_using_dac = 0; |
| 1252 | } |
| 1253 | |
| 1254 | if (pci_enable_device(pdev)) |
| 1255 | return -ENODEV; |
| 1256 | |
| 1257 | dev = alloc_etherdev(sizeof(struct ioc3_private)); |
| 1258 | if (!dev) { |
| 1259 | err = -ENOMEM; |
| 1260 | goto out_disable; |
| 1261 | } |
| 1262 | |
| 1263 | if (pci_using_dac) |
| 1264 | dev->features |= NETIF_F_HIGHDMA; |
| 1265 | |
| 1266 | err = pci_request_regions(pdev, "ioc3"); |
| 1267 | if (err) |
| 1268 | goto out_free; |
| 1269 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1270 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 1271 | |
| 1272 | ip = netdev_priv(dev); |
| 1273 | |
| 1274 | dev->irq = pdev->irq; |
| 1275 | |
| 1276 | ioc3_base = pci_resource_start(pdev, 0); |
| 1277 | ioc3_size = pci_resource_len(pdev, 0); |
| 1278 | ioc3 = (struct ioc3 *) ioremap(ioc3_base, ioc3_size); |
| 1279 | if (!ioc3) { |
| 1280 | printk(KERN_CRIT "ioc3eth(%s): ioremap failed, goodbye.\n", |
| 1281 | pci_name(pdev)); |
| 1282 | err = -ENOMEM; |
| 1283 | goto out_res; |
| 1284 | } |
| 1285 | ip->regs = ioc3; |
| 1286 | |
| 1287 | #ifdef CONFIG_SERIAL_8250 |
| 1288 | ioc3_serial_probe(pdev, ioc3); |
| 1289 | #endif |
| 1290 | |
| 1291 | spin_lock_init(&ip->ioc3_lock); |
| 1292 | init_timer(&ip->ioc3_timer); |
| 1293 | |
| 1294 | ioc3_stop(ip); |
| 1295 | ioc3_init(dev); |
| 1296 | |
| 1297 | ip->pdev = pdev; |
| 1298 | |
| 1299 | ip->mii.phy_id_mask = 0x1f; |
| 1300 | ip->mii.reg_num_mask = 0x1f; |
| 1301 | ip->mii.dev = dev; |
| 1302 | ip->mii.mdio_read = ioc3_mdio_read; |
| 1303 | ip->mii.mdio_write = ioc3_mdio_write; |
| 1304 | |
| 1305 | ioc3_mii_init(ip); |
| 1306 | |
| 1307 | if (ip->mii.phy_id == -1) { |
| 1308 | printk(KERN_CRIT "ioc3-eth(%s): Didn't find a PHY, goodbye.\n", |
| 1309 | pci_name(pdev)); |
| 1310 | err = -ENODEV; |
| 1311 | goto out_stop; |
| 1312 | } |
| 1313 | |
Ralf Baechle | f0ba735 | 2007-02-17 02:51:15 +0000 | [diff] [blame] | 1314 | ioc3_mii_start(ip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1315 | ioc3_ssram_disc(ip); |
| 1316 | ioc3_get_eaddr(ip); |
| 1317 | |
| 1318 | /* The IOC3-specific entries in the device structure. */ |
| 1319 | dev->open = ioc3_open; |
| 1320 | dev->hard_start_xmit = ioc3_start_xmit; |
| 1321 | dev->tx_timeout = ioc3_timeout; |
| 1322 | dev->watchdog_timeo = 5 * HZ; |
| 1323 | dev->stop = ioc3_close; |
| 1324 | dev->get_stats = ioc3_get_stats; |
| 1325 | dev->do_ioctl = ioc3_ioctl; |
| 1326 | dev->set_multicast_list = ioc3_set_multicast_list; |
| 1327 | dev->set_mac_address = ioc3_set_mac_address; |
| 1328 | dev->ethtool_ops = &ioc3_ethtool_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1329 | dev->features = NETIF_F_IP_CSUM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1330 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1331 | sw_physid1 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID1); |
| 1332 | sw_physid2 = ioc3_mdio_read(dev, ip->mii.phy_id, MII_PHYSID2); |
| 1333 | |
| 1334 | err = register_netdev(dev); |
| 1335 | if (err) |
| 1336 | goto out_stop; |
| 1337 | |
| 1338 | mii_check_media(&ip->mii, 1, 1); |
Ralf Baechle | 852ea22 | 2005-08-02 11:01:27 +0100 | [diff] [blame] | 1339 | ioc3_setup_duplex(ip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1340 | |
| 1341 | vendor = (sw_physid1 << 12) | (sw_physid2 >> 4); |
| 1342 | model = (sw_physid2 >> 4) & 0x3f; |
| 1343 | rev = sw_physid2 & 0xf; |
| 1344 | printk(KERN_INFO "%s: Using PHY %d, vendor 0x%x, model %d, " |
| 1345 | "rev %d.\n", dev->name, ip->mii.phy_id, vendor, model, rev); |
| 1346 | printk(KERN_INFO "%s: IOC3 SSRAM has %d kbyte.\n", dev->name, |
| 1347 | ip->emcr & EMCR_BUFSIZ ? 128 : 64); |
| 1348 | |
| 1349 | return 0; |
| 1350 | |
| 1351 | out_stop: |
| 1352 | ioc3_stop(ip); |
Ralf Baechle | f0ba735 | 2007-02-17 02:51:15 +0000 | [diff] [blame] | 1353 | del_timer_sync(&ip->ioc3_timer); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1354 | ioc3_free_rings(ip); |
| 1355 | out_res: |
| 1356 | pci_release_regions(pdev); |
| 1357 | out_free: |
| 1358 | free_netdev(dev); |
| 1359 | out_disable: |
| 1360 | /* |
| 1361 | * We should call pci_disable_device(pdev); here if the IOC3 wasn't |
| 1362 | * such a weird device ... |
| 1363 | */ |
| 1364 | out: |
| 1365 | return err; |
| 1366 | } |
| 1367 | |
| 1368 | static void __devexit ioc3_remove_one (struct pci_dev *pdev) |
| 1369 | { |
| 1370 | struct net_device *dev = pci_get_drvdata(pdev); |
| 1371 | struct ioc3_private *ip = netdev_priv(dev); |
| 1372 | struct ioc3 *ioc3 = ip->regs; |
| 1373 | |
| 1374 | unregister_netdev(dev); |
Ralf Baechle | f0ba735 | 2007-02-17 02:51:15 +0000 | [diff] [blame] | 1375 | del_timer_sync(&ip->ioc3_timer); |
| 1376 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1377 | iounmap(ioc3); |
| 1378 | pci_release_regions(pdev); |
| 1379 | free_netdev(dev); |
| 1380 | /* |
| 1381 | * We should call pci_disable_device(pdev); here if the IOC3 wasn't |
| 1382 | * such a weird device ... |
| 1383 | */ |
| 1384 | } |
| 1385 | |
| 1386 | static struct pci_device_id ioc3_pci_tbl[] = { |
| 1387 | { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3, PCI_ANY_ID, PCI_ANY_ID }, |
| 1388 | { 0 } |
| 1389 | }; |
| 1390 | MODULE_DEVICE_TABLE(pci, ioc3_pci_tbl); |
| 1391 | |
| 1392 | static struct pci_driver ioc3_driver = { |
| 1393 | .name = "ioc3-eth", |
| 1394 | .id_table = ioc3_pci_tbl, |
| 1395 | .probe = ioc3_probe, |
| 1396 | .remove = __devexit_p(ioc3_remove_one), |
| 1397 | }; |
| 1398 | |
| 1399 | static int __init ioc3_init_module(void) |
| 1400 | { |
Ralf Baechle | 70f1e00 | 2005-11-13 10:13:05 +0000 | [diff] [blame] | 1401 | return pci_register_driver(&ioc3_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1402 | } |
| 1403 | |
| 1404 | static void __exit ioc3_cleanup_module(void) |
| 1405 | { |
| 1406 | pci_unregister_driver(&ioc3_driver); |
| 1407 | } |
| 1408 | |
| 1409 | static int ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 1410 | { |
| 1411 | unsigned long data; |
| 1412 | struct ioc3_private *ip = netdev_priv(dev); |
| 1413 | struct ioc3 *ioc3 = ip->regs; |
| 1414 | unsigned int len; |
| 1415 | struct ioc3_etxd *desc; |
| 1416 | uint32_t w0 = 0; |
| 1417 | int produce; |
| 1418 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1419 | /* |
| 1420 | * IOC3 has a fairly simple minded checksumming hardware which simply |
| 1421 | * adds up the 1's complement checksum for the entire packet and |
| 1422 | * inserts it at an offset which can be specified in the descriptor |
| 1423 | * into the transmit packet. This means we have to compensate for the |
| 1424 | * MAC header which should not be summed and the TCP/UDP pseudo headers |
| 1425 | * manually. |
| 1426 | */ |
Patrick McHardy | 84fa793 | 2006-08-29 16:44:56 -0700 | [diff] [blame] | 1427 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
Arnaldo Carvalho de Melo | eddc9ec | 2007-04-20 22:47:35 -0700 | [diff] [blame] | 1428 | const struct iphdr *ih = ip_hdr(skb); |
| 1429 | const int proto = ntohs(ih->protocol); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1430 | unsigned int csoff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1431 | uint32_t csum, ehsum; |
| 1432 | uint16_t *eh; |
| 1433 | |
| 1434 | /* The MAC header. skb->mac seem the logic approach |
| 1435 | to find the MAC header - except it's a NULL pointer ... */ |
| 1436 | eh = (uint16_t *) skb->data; |
| 1437 | |
| 1438 | /* Sum up dest addr, src addr and protocol */ |
| 1439 | ehsum = eh[0] + eh[1] + eh[2] + eh[3] + eh[4] + eh[5] + eh[6]; |
| 1440 | |
| 1441 | /* Fold ehsum. can't use csum_fold which negates also ... */ |
| 1442 | ehsum = (ehsum & 0xffff) + (ehsum >> 16); |
| 1443 | ehsum = (ehsum & 0xffff) + (ehsum >> 16); |
| 1444 | |
| 1445 | /* Skip IP header; it's sum is always zero and was |
| 1446 | already filled in by ip_output.c */ |
| 1447 | csum = csum_tcpudp_nofold(ih->saddr, ih->daddr, |
| 1448 | ih->tot_len - (ih->ihl << 2), |
| 1449 | proto, 0xffff ^ ehsum); |
| 1450 | |
| 1451 | csum = (csum & 0xffff) + (csum >> 16); /* Fold again */ |
| 1452 | csum = (csum & 0xffff) + (csum >> 16); |
| 1453 | |
| 1454 | csoff = ETH_HLEN + (ih->ihl << 2); |
| 1455 | if (proto == IPPROTO_UDP) { |
| 1456 | csoff += offsetof(struct udphdr, check); |
Arnaldo Carvalho de Melo | 4bedb45 | 2007-03-13 14:28:48 -0300 | [diff] [blame] | 1457 | udp_hdr(skb)->check = csum; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1458 | } |
| 1459 | if (proto == IPPROTO_TCP) { |
| 1460 | csoff += offsetof(struct tcphdr, check); |
Arnaldo Carvalho de Melo | aa8223c | 2007-04-10 21:04:22 -0700 | [diff] [blame] | 1461 | tcp_hdr(skb)->check = csum; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1462 | } |
| 1463 | |
| 1464 | w0 = ETXD_DOCHECKSUM | (csoff << ETXD_CHKOFF_SHIFT); |
| 1465 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1466 | |
| 1467 | spin_lock_irq(&ip->ioc3_lock); |
| 1468 | |
| 1469 | data = (unsigned long) skb->data; |
| 1470 | len = skb->len; |
| 1471 | |
| 1472 | produce = ip->tx_pi; |
| 1473 | desc = &ip->txr[produce]; |
| 1474 | |
| 1475 | if (len <= 104) { |
| 1476 | /* Short packet, let's copy it directly into the ring. */ |
Arnaldo Carvalho de Melo | d626f62 | 2007-03-27 18:55:52 -0300 | [diff] [blame] | 1477 | skb_copy_from_linear_data(skb, desc->data, skb->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1478 | if (len < ETH_ZLEN) { |
| 1479 | /* Very short packet, pad with zeros at the end. */ |
| 1480 | memset(desc->data + len, 0, ETH_ZLEN - len); |
| 1481 | len = ETH_ZLEN; |
| 1482 | } |
| 1483 | desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_D0V | w0); |
| 1484 | desc->bufcnt = cpu_to_be32(len); |
| 1485 | } else if ((data ^ (data + len - 1)) & 0x4000) { |
| 1486 | unsigned long b2 = (data | 0x3fffUL) + 1UL; |
| 1487 | unsigned long s1 = b2 - data; |
| 1488 | unsigned long s2 = data + len - b2; |
| 1489 | |
| 1490 | desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | |
| 1491 | ETXD_B1V | ETXD_B2V | w0); |
| 1492 | desc->bufcnt = cpu_to_be32((s1 << ETXD_B1CNT_SHIFT) | |
| 1493 | (s2 << ETXD_B2CNT_SHIFT)); |
| 1494 | desc->p1 = cpu_to_be64(ioc3_map(skb->data, 1)); |
| 1495 | desc->p2 = cpu_to_be64(ioc3_map((void *) b2, 1)); |
| 1496 | } else { |
| 1497 | /* Normal sized packet that doesn't cross a page boundary. */ |
| 1498 | desc->cmd = cpu_to_be32(len | ETXD_INTWHENDONE | ETXD_B1V | w0); |
| 1499 | desc->bufcnt = cpu_to_be32(len << ETXD_B1CNT_SHIFT); |
| 1500 | desc->p1 = cpu_to_be64(ioc3_map(skb->data, 1)); |
| 1501 | } |
| 1502 | |
| 1503 | BARRIER(); |
| 1504 | |
| 1505 | dev->trans_start = jiffies; |
| 1506 | ip->tx_skbs[produce] = skb; /* Remember skb */ |
| 1507 | produce = (produce + 1) & 127; |
| 1508 | ip->tx_pi = produce; |
| 1509 | ioc3_w_etpir(produce << 7); /* Fire ... */ |
| 1510 | |
| 1511 | ip->txqlen++; |
| 1512 | |
| 1513 | if (ip->txqlen >= 127) |
| 1514 | netif_stop_queue(dev); |
| 1515 | |
| 1516 | spin_unlock_irq(&ip->ioc3_lock); |
| 1517 | |
| 1518 | return 0; |
| 1519 | } |
| 1520 | |
| 1521 | static void ioc3_timeout(struct net_device *dev) |
| 1522 | { |
| 1523 | struct ioc3_private *ip = netdev_priv(dev); |
| 1524 | |
| 1525 | printk(KERN_ERR "%s: transmit timed out, resetting\n", dev->name); |
| 1526 | |
| 1527 | spin_lock_irq(&ip->ioc3_lock); |
| 1528 | |
| 1529 | ioc3_stop(ip); |
| 1530 | ioc3_init(dev); |
| 1531 | ioc3_mii_init(ip); |
Ralf Baechle | f0ba735 | 2007-02-17 02:51:15 +0000 | [diff] [blame] | 1532 | ioc3_mii_start(ip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1533 | |
| 1534 | spin_unlock_irq(&ip->ioc3_lock); |
| 1535 | |
| 1536 | netif_wake_queue(dev); |
| 1537 | } |
| 1538 | |
| 1539 | /* |
| 1540 | * Given a multicast ethernet address, this routine calculates the |
| 1541 | * address's bit index in the logical address filter mask |
| 1542 | */ |
| 1543 | |
| 1544 | static inline unsigned int ioc3_hash(const unsigned char *addr) |
| 1545 | { |
| 1546 | unsigned int temp = 0; |
| 1547 | u32 crc; |
| 1548 | int bits; |
| 1549 | |
| 1550 | crc = ether_crc_le(ETH_ALEN, addr); |
| 1551 | |
| 1552 | crc &= 0x3f; /* bit reverse lowest 6 bits for hash index */ |
| 1553 | for (bits = 6; --bits >= 0; ) { |
| 1554 | temp <<= 1; |
| 1555 | temp |= (crc & 0x1); |
| 1556 | crc >>= 1; |
| 1557 | } |
| 1558 | |
| 1559 | return temp; |
| 1560 | } |
| 1561 | |
| 1562 | static void ioc3_get_drvinfo (struct net_device *dev, |
| 1563 | struct ethtool_drvinfo *info) |
| 1564 | { |
| 1565 | struct ioc3_private *ip = netdev_priv(dev); |
Ralf Baechle | 852ea22 | 2005-08-02 11:01:27 +0100 | [diff] [blame] | 1566 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1567 | strcpy (info->driver, IOC3_NAME); |
| 1568 | strcpy (info->version, IOC3_VERSION); |
| 1569 | strcpy (info->bus_info, pci_name(ip->pdev)); |
| 1570 | } |
| 1571 | |
| 1572 | static int ioc3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 1573 | { |
| 1574 | struct ioc3_private *ip = netdev_priv(dev); |
| 1575 | int rc; |
| 1576 | |
| 1577 | spin_lock_irq(&ip->ioc3_lock); |
| 1578 | rc = mii_ethtool_gset(&ip->mii, cmd); |
| 1579 | spin_unlock_irq(&ip->ioc3_lock); |
| 1580 | |
| 1581 | return rc; |
| 1582 | } |
| 1583 | |
| 1584 | static int ioc3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 1585 | { |
| 1586 | struct ioc3_private *ip = netdev_priv(dev); |
| 1587 | int rc; |
| 1588 | |
| 1589 | spin_lock_irq(&ip->ioc3_lock); |
| 1590 | rc = mii_ethtool_sset(&ip->mii, cmd); |
| 1591 | spin_unlock_irq(&ip->ioc3_lock); |
Ralf Baechle | 852ea22 | 2005-08-02 11:01:27 +0100 | [diff] [blame] | 1592 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1593 | return rc; |
| 1594 | } |
| 1595 | |
| 1596 | static int ioc3_nway_reset(struct net_device *dev) |
| 1597 | { |
| 1598 | struct ioc3_private *ip = netdev_priv(dev); |
| 1599 | int rc; |
| 1600 | |
| 1601 | spin_lock_irq(&ip->ioc3_lock); |
| 1602 | rc = mii_nway_restart(&ip->mii); |
| 1603 | spin_unlock_irq(&ip->ioc3_lock); |
| 1604 | |
| 1605 | return rc; |
| 1606 | } |
| 1607 | |
| 1608 | static u32 ioc3_get_link(struct net_device *dev) |
| 1609 | { |
| 1610 | struct ioc3_private *ip = netdev_priv(dev); |
| 1611 | int rc; |
| 1612 | |
| 1613 | spin_lock_irq(&ip->ioc3_lock); |
| 1614 | rc = mii_link_ok(&ip->mii); |
| 1615 | spin_unlock_irq(&ip->ioc3_lock); |
| 1616 | |
| 1617 | return rc; |
| 1618 | } |
| 1619 | |
Ralf Baechle | bbfb86c | 2007-07-25 12:31:57 +0100 | [diff] [blame] | 1620 | static u32 ioc3_get_rx_csum(struct net_device *dev) |
| 1621 | { |
| 1622 | struct ioc3_private *ip = netdev_priv(dev); |
| 1623 | |
| 1624 | return ip->flags & IOC3_FLAG_RX_CHECKSUMS; |
| 1625 | } |
| 1626 | |
| 1627 | static int ioc3_set_rx_csum(struct net_device *dev, u32 data) |
| 1628 | { |
| 1629 | struct ioc3_private *ip = netdev_priv(dev); |
| 1630 | |
| 1631 | spin_lock_bh(&ip->ioc3_lock); |
| 1632 | if (data) |
| 1633 | ip->flags |= IOC3_FLAG_RX_CHECKSUMS; |
| 1634 | else |
| 1635 | ip->flags &= ~IOC3_FLAG_RX_CHECKSUMS; |
| 1636 | spin_unlock_bh(&ip->ioc3_lock); |
| 1637 | |
| 1638 | return 0; |
| 1639 | } |
| 1640 | |
Jeff Garzik | 7282d49 | 2006-09-13 14:30:00 -0400 | [diff] [blame] | 1641 | static const struct ethtool_ops ioc3_ethtool_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1642 | .get_drvinfo = ioc3_get_drvinfo, |
| 1643 | .get_settings = ioc3_get_settings, |
| 1644 | .set_settings = ioc3_set_settings, |
| 1645 | .nway_reset = ioc3_nway_reset, |
| 1646 | .get_link = ioc3_get_link, |
Ralf Baechle | bbfb86c | 2007-07-25 12:31:57 +0100 | [diff] [blame] | 1647 | .get_rx_csum = ioc3_get_rx_csum, |
| 1648 | .set_rx_csum = ioc3_set_rx_csum, |
| 1649 | .get_tx_csum = ethtool_op_get_tx_csum, |
| 1650 | .set_tx_csum = ethtool_op_set_tx_csum |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1651 | }; |
| 1652 | |
| 1653 | static int ioc3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
| 1654 | { |
| 1655 | struct ioc3_private *ip = netdev_priv(dev); |
| 1656 | int rc; |
| 1657 | |
| 1658 | spin_lock_irq(&ip->ioc3_lock); |
| 1659 | rc = generic_mii_ioctl(&ip->mii, if_mii(rq), cmd, NULL); |
| 1660 | spin_unlock_irq(&ip->ioc3_lock); |
| 1661 | |
| 1662 | return rc; |
| 1663 | } |
| 1664 | |
| 1665 | static void ioc3_set_multicast_list(struct net_device *dev) |
| 1666 | { |
| 1667 | struct dev_mc_list *dmi = dev->mc_list; |
| 1668 | struct ioc3_private *ip = netdev_priv(dev); |
| 1669 | struct ioc3 *ioc3 = ip->regs; |
| 1670 | u64 ehar = 0; |
| 1671 | int i; |
| 1672 | |
| 1673 | netif_stop_queue(dev); /* Lock out others. */ |
| 1674 | |
| 1675 | if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1676 | ip->emcr |= EMCR_PROMISC; |
| 1677 | ioc3_w_emcr(ip->emcr); |
| 1678 | (void) ioc3_r_emcr(); |
| 1679 | } else { |
| 1680 | ip->emcr &= ~EMCR_PROMISC; |
| 1681 | ioc3_w_emcr(ip->emcr); /* Clear promiscuous. */ |
| 1682 | (void) ioc3_r_emcr(); |
| 1683 | |
| 1684 | if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) { |
| 1685 | /* Too many for hashing to make sense or we want all |
| 1686 | multicast packets anyway, so skip computing all the |
| 1687 | hashes and just accept all packets. */ |
| 1688 | ip->ehar_h = 0xffffffff; |
| 1689 | ip->ehar_l = 0xffffffff; |
| 1690 | } else { |
| 1691 | for (i = 0; i < dev->mc_count; i++) { |
| 1692 | char *addr = dmi->dmi_addr; |
| 1693 | dmi = dmi->next; |
| 1694 | |
| 1695 | if (!(*addr & 1)) |
| 1696 | continue; |
| 1697 | |
| 1698 | ehar |= (1UL << ioc3_hash(addr)); |
| 1699 | } |
| 1700 | ip->ehar_h = ehar >> 32; |
| 1701 | ip->ehar_l = ehar & 0xffffffff; |
| 1702 | } |
| 1703 | ioc3_w_ehar_h(ip->ehar_h); |
| 1704 | ioc3_w_ehar_l(ip->ehar_l); |
| 1705 | } |
| 1706 | |
| 1707 | netif_wake_queue(dev); /* Let us get going again. */ |
| 1708 | } |
| 1709 | |
| 1710 | MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>"); |
| 1711 | MODULE_DESCRIPTION("SGI IOC3 Ethernet driver"); |
| 1712 | MODULE_LICENSE("GPL"); |
| 1713 | |
| 1714 | module_init(ioc3_init_module); |
| 1715 | module_exit(ioc3_cleanup_module); |