blob: 0c2f44aed404532833daf9ea82f4e624ede77825 [file] [log] [blame]
Stephen Warren90027222012-09-26 13:08:59 -06001config ARCH_TEGRA
2 bool "NVIDIA Tegra" if ARCH_MULTI_V7
3 select ARCH_HAS_CPUFREQ
4 select ARCH_REQUIRE_GPIOLIB
Stephen Warren20984c42013-08-06 14:38:51 -06005 select ARM_GIC
Stephen Warren90027222012-09-26 13:08:59 -06006 select CLKSRC_MMIO
7 select CLKSRC_OF
8 select COMMON_CLK
Stephen Warren20984c42013-08-06 14:38:51 -06009 select CPU_V7
Stephen Warren90027222012-09-26 13:08:59 -060010 select GENERIC_CLOCKEVENTS
Stephen Boyd4c3ffff2013-02-27 15:28:14 -080011 select HAVE_ARM_SCU if SMP
Stephen Boyda894fcc2013-02-15 16:02:20 -080012 select HAVE_ARM_TWD if SMP
Stephen Warren90027222012-09-26 13:08:59 -060013 select HAVE_SMP
14 select MIGHT_HAVE_CACHE_L2X0
Thierry Redinge8a72e22013-08-28 22:05:34 +020015 select MIGHT_HAVE_PCI
Stephen Warren20984c42013-08-06 14:38:51 -060016 select PINCTRL
Stephen Warren90027222012-09-26 13:08:59 -060017 select SOC_BUS
18 select SPARSE_IRQ
Stephen Warren20984c42013-08-06 14:38:51 -060019 select USB_ARCH_HAS_EHCI if USB_SUPPORT
20 select USB_ULPI if USB_PHY
21 select USB_ULPI_VIEWPORT if USB_PHY
Stephen Warren90027222012-09-26 13:08:59 -060022 select USE_OF
23 help
24 This enables support for NVIDIA Tegra based systems.
Erik Gillingc5f80062010-01-21 16:53:02 -080025
Stephen Warren90027222012-09-26 13:08:59 -060026menu "NVIDIA Tegra options"
27 depends on ARCH_TEGRA
Erik Gillingc5f80062010-01-21 16:53:02 -080028
Erik Gillingc5f80062010-01-21 16:53:02 -080029config ARCH_TEGRA_2x_SOC
Peter De Schrijver44107d82011-12-14 17:03:25 +020030 bool "Enable support for Tegra20 family"
Joseph Lo1d328602013-01-16 17:33:55 +000031 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
Stephen Warrenf35b4312012-02-14 13:39:39 -070032 select ARM_ERRATA_720789
Stephen Warren45c9e592013-01-02 14:34:15 -070033 select ARM_ERRATA_754327 if SMP
Arnd Bergmann8f90cce2012-08-16 09:36:04 +000034 select ARM_ERRATA_764369 if SMP
Russell Kingb1b3f492012-10-06 17:12:25 +010035 select PINCTRL_TEGRA20
Stephen Warrenf35b4312012-02-14 13:39:39 -070036 select PL310_ERRATA_727915 if CACHE_L2X0
37 select PL310_ERRATA_769419 if CACHE_L2X0
Erik Gillingc5f80062010-01-21 16:53:02 -080038 help
39 Support for NVIDIA Tegra AP20 and T20 processors, based on the
40 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
41
Peter De Schrijver44107d82011-12-14 17:03:25 +020042config ARCH_TEGRA_3x_SOC
43 bool "Enable support for Tegra30 family"
Stephen Warrenf35b4312012-02-14 13:39:39 -070044 select ARM_ERRATA_754322
Arnd Bergmann8f90cce2012-08-16 09:36:04 +000045 select ARM_ERRATA_764369 if SMP
Russell Kingb1b3f492012-10-06 17:12:25 +010046 select PINCTRL_TEGRA30
47 select PL310_ERRATA_769419 if CACHE_L2X0
Peter De Schrijver44107d82011-12-14 17:03:25 +020048 help
49 Support for NVIDIA Tegra T30 processor family, based on the
50 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
Erik Gillingc5f80062010-01-21 16:53:02 -080051
Hiroshi Doyu5c541b82013-01-24 01:10:26 +000052config ARCH_TEGRA_114_SOC
53 bool "Enable support for Tegra114 family"
Mark Rutlandfb521a02013-03-20 13:57:38 +000054 select HAVE_ARM_ARCH_TIMER
Joseph Lof2bd77c2013-07-03 17:55:48 +080055 select ARM_ERRATA_798181
Stephen Warren1d7e5c22013-02-07 14:43:24 -070056 select ARM_L1_CACHE_SHIFT_6
Laxman Dewangan20fd4802013-01-29 18:26:17 +053057 select PINCTRL_TEGRA114
Hiroshi Doyu5c541b82013-01-24 01:10:26 +000058 help
59 Support for NVIDIA Tegra T114 processor family, based on the
60 ARM CortexA15MP CPU
61
Hiroshi DOYU87d0bab2012-05-07 12:24:48 +020062config TEGRA_AHB
63 bool "Enable AHB driver for NVIDIA Tegra SoCs"
64 default y
65 help
66 Adds AHB configuration functionality for NVIDIA Tegra SoCs,
67 which controls AHB bus master arbitration and some
Masanari Iidae41e85c2012-11-30 16:44:39 +090068 performance parameters(priority, prefech size).
Hiroshi DOYU87d0bab2012-05-07 12:24:48 +020069
Colin Crossefdf72a2011-02-12 18:22:49 -080070config TEGRA_EMC_SCALING_ENABLE
71 bool "Enable scaling the memory frequency"
Mark Brown38376862011-02-22 20:35:24 +000072
Stephen Warren90027222012-09-26 13:08:59 -060073endmenu