| Stefan Wahren | 291ab06 | 2014-09-26 22:21:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011, 2012, Qualcomm Atheros Communications Inc. |
| 3 | * Copyright (c) 2014, I2SE GmbH |
| 4 | * |
| 5 | * Permission to use, copy, modify, and/or distribute this software |
| 6 | * for any purpose with or without fee is hereby granted, provided |
| 7 | * that the above copyright notice and this permission notice appear |
| 8 | * in all copies. |
| 9 | * |
| 10 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 11 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 12 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL |
| 13 | * THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR |
| 14 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM |
| 15 | * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, |
| 16 | * NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN |
| 17 | * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 18 | */ |
| 19 | |
| 20 | /* Qualcomm Atheros SPI register definition. |
| 21 | * |
| 22 | * This module is designed to define the Qualcomm Atheros SPI register |
| 23 | * placeholders; |
| 24 | */ |
| 25 | |
| 26 | #ifndef _QCA_SPI_H |
| 27 | #define _QCA_SPI_H |
| 28 | |
| 29 | #include <linux/netdevice.h> |
| 30 | #include <linux/sched.h> |
| 31 | #include <linux/skbuff.h> |
| 32 | #include <linux/spi/spi.h> |
| 33 | #include <linux/types.h> |
| 34 | |
| 35 | #include "qca_framing.h" |
| 36 | |
| 37 | #define QCASPI_DRV_VERSION "0.2.7-i" |
| 38 | #define QCASPI_DRV_NAME "qcaspi" |
| 39 | |
| 40 | #define QCASPI_GOOD_SIGNATURE 0xAA55 |
| 41 | |
| 42 | #define TX_RING_MAX_LEN 10 |
| 43 | #define TX_RING_MIN_LEN 2 |
| 44 | |
| 45 | /* sync related constants */ |
| 46 | #define QCASPI_SYNC_UNKNOWN 0 |
| 47 | #define QCASPI_SYNC_RESET 1 |
| 48 | #define QCASPI_SYNC_READY 2 |
| 49 | |
| 50 | #define QCASPI_RESET_TIMEOUT 10 |
| 51 | |
| 52 | /* sync events */ |
| 53 | #define QCASPI_EVENT_UPDATE 0 |
| 54 | #define QCASPI_EVENT_CPUON 1 |
| 55 | |
| 56 | struct tx_ring { |
| 57 | struct sk_buff *skb[TX_RING_MAX_LEN]; |
| 58 | u16 head; |
| 59 | u16 tail; |
| 60 | u16 size; |
| 61 | u16 count; |
| 62 | }; |
| 63 | |
| 64 | struct qcaspi_stats { |
| 65 | u64 trig_reset; |
| 66 | u64 device_reset; |
| 67 | u64 reset_timeout; |
| 68 | u64 read_err; |
| 69 | u64 write_err; |
| 70 | u64 read_buf_err; |
| 71 | u64 write_buf_err; |
| 72 | u64 out_of_mem; |
| 73 | u64 write_buf_miss; |
| 74 | u64 ring_full; |
| 75 | u64 spi_err; |
| 76 | }; |
| 77 | |
| 78 | struct qcaspi { |
| 79 | struct net_device *net_dev; |
| 80 | struct spi_device *spi_dev; |
| 81 | struct task_struct *spi_thread; |
| 82 | |
| 83 | struct tx_ring txr; |
| 84 | struct qcaspi_stats stats; |
| 85 | |
| 86 | struct spi_message spi_msg1; |
| 87 | struct spi_message spi_msg2; |
| 88 | struct spi_transfer spi_xfer1; |
| 89 | struct spi_transfer spi_xfer2[2]; |
| 90 | |
| 91 | u8 *rx_buffer; |
| 92 | u32 buffer_size; |
| 93 | u8 sync; |
| 94 | |
| 95 | struct qcafrm_handle frm_handle; |
| 96 | struct sk_buff *rx_skb; |
| 97 | |
| 98 | unsigned int intr_req; |
| 99 | unsigned int intr_svc; |
| 100 | |
| 101 | #ifdef CONFIG_DEBUG_FS |
| 102 | struct dentry *device_root; |
| 103 | #endif |
| 104 | |
| 105 | /* user configurable options */ |
| 106 | u32 clkspeed; |
| 107 | u8 legacy_mode; |
| 108 | u16 burst_len; |
| 109 | }; |
| 110 | |
| 111 | int qcaspi_netdev_open(struct net_device *dev); |
| 112 | int qcaspi_netdev_close(struct net_device *dev); |
| 113 | |
| 114 | #endif /* _QCA_SPI_H */ |