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Ralf Baechle90e8cac2013-01-17 15:11:16 +01001/*
2 * Format of an instruction in memory.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 2000 by Ralf Baechle
9 * Copyright (C) 2006 by Thiemo Seufer
10 */
11#ifndef _UAPI_ASM_INST_H
12#define _UAPI_ASM_INST_H
13
14/*
15 * Major opcodes; before MIPS IV cop1x was called cop3.
16 */
17enum major_op {
18 spec_op, bcond_op, j_op, jal_op,
19 beq_op, bne_op, blez_op, bgtz_op,
20 addi_op, addiu_op, slti_op, sltiu_op,
21 andi_op, ori_op, xori_op, lui_op,
22 cop0_op, cop1_op, cop2_op, cop1x_op,
23 beql_op, bnel_op, blezl_op, bgtzl_op,
24 daddi_op, daddiu_op, ldl_op, ldr_op,
25 spec2_op, jalx_op, mdmx_op, spec3_op,
26 lb_op, lh_op, lwl_op, lw_op,
27 lbu_op, lhu_op, lwr_op, lwu_op,
28 sb_op, sh_op, swl_op, sw_op,
29 sdl_op, sdr_op, swr_op, cache_op,
30 ll_op, lwc1_op, lwc2_op, pref_op,
31 lld_op, ldc1_op, ldc2_op, ld_op,
32 sc_op, swc1_op, swc2_op, major_3b_op,
33 scd_op, sdc1_op, sdc2_op, sd_op
34};
35
36/*
37 * func field of spec opcode.
38 */
39enum spec_op {
40 sll_op, movc_op, srl_op, sra_op,
41 sllv_op, pmon_op, srlv_op, srav_op,
42 jr_op, jalr_op, movz_op, movn_op,
43 syscall_op, break_op, spim_op, sync_op,
44 mfhi_op, mthi_op, mflo_op, mtlo_op,
45 dsllv_op, spec2_unused_op, dsrlv_op, dsrav_op,
46 mult_op, multu_op, div_op, divu_op,
47 dmult_op, dmultu_op, ddiv_op, ddivu_op,
48 add_op, addu_op, sub_op, subu_op,
49 and_op, or_op, xor_op, nor_op,
50 spec3_unused_op, spec4_unused_op, slt_op, sltu_op,
51 dadd_op, daddu_op, dsub_op, dsubu_op,
52 tge_op, tgeu_op, tlt_op, tltu_op,
53 teq_op, spec5_unused_op, tne_op, spec6_unused_op,
54 dsll_op, spec7_unused_op, dsrl_op, dsra_op,
55 dsll32_op, spec8_unused_op, dsrl32_op, dsra32_op
56};
57
58/*
59 * func field of spec2 opcode.
60 */
61enum spec2_op {
62 madd_op, maddu_op, mul_op, spec2_3_unused_op,
63 msub_op, msubu_op, /* more unused ops */
64 clz_op = 0x20, clo_op,
65 dclz_op = 0x24, dclo_op,
66 sdbpp_op = 0x3f
67};
68
69/*
70 * func field of spec3 opcode.
71 */
72enum spec3_op {
73 ext_op, dextm_op, dextu_op, dext_op,
74 ins_op, dinsm_op, dinsu_op, dins_op,
75 lx_op = 0x0a,
76 bshfl_op = 0x20,
77 dbshfl_op = 0x24,
78 rdhwr_op = 0x3b
79};
80
81/*
82 * rt field of bcond opcodes.
83 */
84enum rt_op {
85 bltz_op, bgez_op, bltzl_op, bgezl_op,
86 spimi_op, unused_rt_op_0x05, unused_rt_op_0x06, unused_rt_op_0x07,
87 tgei_op, tgeiu_op, tlti_op, tltiu_op,
88 teqi_op, unused_0x0d_rt_op, tnei_op, unused_0x0f_rt_op,
89 bltzal_op, bgezal_op, bltzall_op, bgezall_op,
90 rt_op_0x14, rt_op_0x15, rt_op_0x16, rt_op_0x17,
91 rt_op_0x18, rt_op_0x19, rt_op_0x1a, rt_op_0x1b,
92 bposge32_op, rt_op_0x1d, rt_op_0x1e, rt_op_0x1f
93};
94
95/*
96 * rs field of cop opcodes.
97 */
98enum cop_op {
Ralf Baechle70342282013-01-22 12:59:30 +010099 mfc_op = 0x00, dmfc_op = 0x01,
100 cfc_op = 0x02, mtc_op = 0x04,
101 dmtc_op = 0x05, ctc_op = 0x06,
102 bc_op = 0x08, cop_op = 0x10,
103 copm_op = 0x18
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100104};
105
106/*
107 * rt field of cop.bc_op opcodes
108 */
109enum bcop_op {
110 bcf_op, bct_op, bcfl_op, bctl_op
111};
112
113/*
114 * func field of cop0 coi opcodes.
115 */
116enum cop0_coi_func {
Ralf Baechle70342282013-01-22 12:59:30 +0100117 tlbr_op = 0x01, tlbwi_op = 0x02,
118 tlbwr_op = 0x06, tlbp_op = 0x08,
119 rfe_op = 0x10, eret_op = 0x18
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100120};
121
122/*
123 * func field of cop0 com opcodes.
124 */
125enum cop0_com_func {
Ralf Baechle70342282013-01-22 12:59:30 +0100126 tlbr1_op = 0x01, tlbw_op = 0x02,
127 tlbp1_op = 0x08, dctr_op = 0x09,
128 dctw_op = 0x0a
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100129};
130
131/*
132 * fmt field of cop1 opcodes.
133 */
134enum cop1_fmt {
135 s_fmt, d_fmt, e_fmt, q_fmt,
136 w_fmt, l_fmt
137};
138
139/*
140 * func field of cop1 instructions using d, s or w format.
141 */
142enum cop1_sdw_func {
Ralf Baechle70342282013-01-22 12:59:30 +0100143 fadd_op = 0x00, fsub_op = 0x01,
144 fmul_op = 0x02, fdiv_op = 0x03,
145 fsqrt_op = 0x04, fabs_op = 0x05,
146 fmov_op = 0x06, fneg_op = 0x07,
147 froundl_op = 0x08, ftruncl_op = 0x09,
148 fceill_op = 0x0a, ffloorl_op = 0x0b,
149 fround_op = 0x0c, ftrunc_op = 0x0d,
150 fceil_op = 0x0e, ffloor_op = 0x0f,
151 fmovc_op = 0x11, fmovz_op = 0x12,
152 fmovn_op = 0x13, frecip_op = 0x15,
153 frsqrt_op = 0x16, fcvts_op = 0x20,
154 fcvtd_op = 0x21, fcvte_op = 0x22,
155 fcvtw_op = 0x24, fcvtl_op = 0x25,
156 fcmp_op = 0x30
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100157};
158
159/*
160 * func field of cop1x opcodes (MIPS IV).
161 */
162enum cop1x_func {
Ralf Baechle70342282013-01-22 12:59:30 +0100163 lwxc1_op = 0x00, ldxc1_op = 0x01,
164 pfetch_op = 0x07, swxc1_op = 0x08,
165 sdxc1_op = 0x09, madd_s_op = 0x20,
166 madd_d_op = 0x21, madd_e_op = 0x22,
167 msub_s_op = 0x28, msub_d_op = 0x29,
168 msub_e_op = 0x2a, nmadd_s_op = 0x30,
169 nmadd_d_op = 0x31, nmadd_e_op = 0x32,
170 nmsub_s_op = 0x38, nmsub_d_op = 0x39,
171 nmsub_e_op = 0x3a
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100172};
173
174/*
175 * func field for mad opcodes (MIPS IV).
176 */
177enum mad_func {
Ralf Baechle70342282013-01-22 12:59:30 +0100178 madd_fp_op = 0x08, msub_fp_op = 0x0a,
179 nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100180};
181
182/*
183 * func field for special3 lx opcodes (Cavium Octeon).
184 */
185enum lx_func {
186 lwx_op = 0x00,
187 lhx_op = 0x04,
Ralf Baechle70342282013-01-22 12:59:30 +0100188 lbux_op = 0x06,
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100189 ldx_op = 0x08,
Ralf Baechle70342282013-01-22 12:59:30 +0100190 lwux_op = 0x10,
191 lhux_op = 0x14,
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100192 lbx_op = 0x16,
193};
194
195/*
196 * Damn ... bitfields depend from byteorder :-(
197 */
198#ifdef __MIPSEB__
Ralf Baechle85dfaf02013-01-17 15:28:31 +0100199#define BITFIELD_FIELD(field, more) \
200 field; \
201 more
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100202
203#elif defined(__MIPSEL__)
204
Ralf Baechle85dfaf02013-01-17 15:28:31 +0100205#define BITFIELD_FIELD(field, more) \
206 more \
207 field;
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100208
209#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
210#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
211#endif
212
Ralf Baechle85dfaf02013-01-17 15:28:31 +0100213struct j_format {
Ralf Baechle70342282013-01-22 12:59:30 +0100214 BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
Ralf Baechle85dfaf02013-01-17 15:28:31 +0100215 BITFIELD_FIELD(unsigned int target : 26,
216 ;))
217};
218
219struct i_format { /* signed immediate format */
220 BITFIELD_FIELD(unsigned int opcode : 6,
221 BITFIELD_FIELD(unsigned int rs : 5,
222 BITFIELD_FIELD(unsigned int rt : 5,
223 BITFIELD_FIELD(signed int simmediate : 16,
224 ;))))
225};
226
227struct u_format { /* unsigned immediate format */
228 BITFIELD_FIELD(unsigned int opcode : 6,
229 BITFIELD_FIELD(unsigned int rs : 5,
230 BITFIELD_FIELD(unsigned int rt : 5,
231 BITFIELD_FIELD(unsigned int uimmediate : 16,
232 ;))))
233};
234
235struct c_format { /* Cache (>= R6000) format */
236 BITFIELD_FIELD(unsigned int opcode : 6,
237 BITFIELD_FIELD(unsigned int rs : 5,
238 BITFIELD_FIELD(unsigned int c_op : 3,
239 BITFIELD_FIELD(unsigned int cache : 2,
240 BITFIELD_FIELD(unsigned int simmediate : 16,
241 ;)))))
242};
243
244struct r_format { /* Register format */
245 BITFIELD_FIELD(unsigned int opcode : 6,
246 BITFIELD_FIELD(unsigned int rs : 5,
247 BITFIELD_FIELD(unsigned int rt : 5,
248 BITFIELD_FIELD(unsigned int rd : 5,
249 BITFIELD_FIELD(unsigned int re : 5,
250 BITFIELD_FIELD(unsigned int func : 6,
251 ;))))))
252};
253
254struct p_format { /* Performance counter format (R10000) */
255 BITFIELD_FIELD(unsigned int opcode : 6,
256 BITFIELD_FIELD(unsigned int rs : 5,
257 BITFIELD_FIELD(unsigned int rt : 5,
258 BITFIELD_FIELD(unsigned int rd : 5,
259 BITFIELD_FIELD(unsigned int re : 5,
260 BITFIELD_FIELD(unsigned int func : 6,
261 ;))))))
262};
263
Ralf Baechle70342282013-01-22 12:59:30 +0100264struct f_format { /* FPU register format */
Ralf Baechle85dfaf02013-01-17 15:28:31 +0100265 BITFIELD_FIELD(unsigned int opcode : 6,
266 BITFIELD_FIELD(unsigned int : 1,
267 BITFIELD_FIELD(unsigned int fmt : 4,
268 BITFIELD_FIELD(unsigned int rt : 5,
269 BITFIELD_FIELD(unsigned int rd : 5,
270 BITFIELD_FIELD(unsigned int re : 5,
271 BITFIELD_FIELD(unsigned int func : 6,
272 ;)))))))
273};
274
275struct ma_format { /* FPU multiply and add format (MIPS IV) */
276 BITFIELD_FIELD(unsigned int opcode : 6,
277 BITFIELD_FIELD(unsigned int fr : 5,
278 BITFIELD_FIELD(unsigned int ft : 5,
279 BITFIELD_FIELD(unsigned int fs : 5,
280 BITFIELD_FIELD(unsigned int fd : 5,
281 BITFIELD_FIELD(unsigned int func : 4,
282 BITFIELD_FIELD(unsigned int fmt : 2,
283 ;)))))))
284};
285
286struct b_format { /* BREAK and SYSCALL */
287 BITFIELD_FIELD(unsigned int opcode : 6,
288 BITFIELD_FIELD(unsigned int code : 20,
289 BITFIELD_FIELD(unsigned int func : 6,
290 ;)))
291};
292
Ralf Baechle8fba1e52013-01-17 16:29:27 +0100293struct ps_format { /* MIPS-3D / paired single format */
294 BITFIELD_FIELD(unsigned int opcode : 6,
295 BITFIELD_FIELD(unsigned int rs : 5,
296 BITFIELD_FIELD(unsigned int ft : 5,
297 BITFIELD_FIELD(unsigned int fs : 5,
298 BITFIELD_FIELD(unsigned int fd : 5,
299 BITFIELD_FIELD(unsigned int func : 6,
300 ;))))))
301};
302
303struct v_format { /* MDMX vector format */
304 BITFIELD_FIELD(unsigned int opcode : 6,
305 BITFIELD_FIELD(unsigned int sel : 4,
306 BITFIELD_FIELD(unsigned int fmt : 1,
307 BITFIELD_FIELD(unsigned int vt : 5,
308 BITFIELD_FIELD(unsigned int vs : 5,
309 BITFIELD_FIELD(unsigned int vd : 5,
310 BITFIELD_FIELD(unsigned int func : 6,
311 ;)))))))
312};
313
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100314union mips_instruction {
315 unsigned int word;
316 unsigned short halfword[2];
317 unsigned char byte[4];
318 struct j_format j_format;
319 struct i_format i_format;
320 struct u_format u_format;
321 struct c_format c_format;
322 struct r_format r_format;
323 struct p_format p_format;
324 struct f_format f_format;
325 struct ma_format ma_format;
326 struct b_format b_format;
Ralf Baechle8fba1e52013-01-17 16:29:27 +0100327 struct ps_format ps_format;
328 struct v_format v_format;
Ralf Baechle90e8cac2013-01-17 15:11:16 +0100329};
330
331#endif /* _UAPI_ASM_INST_H */