Ben Dooks | a21765a | 2007-02-11 18:31:01 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/plat-s3c24xx/gpio.c |
| 2 | * |
| 3 | * Copyright (c) 2004-2005 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * S3C24XX GPIO support |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | */ |
| 22 | |
| 23 | |
| 24 | #include <linux/kernel.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/interrupt.h> |
| 28 | #include <linux/ioport.h> |
| 29 | |
| 30 | #include <asm/hardware.h> |
| 31 | #include <asm/irq.h> |
| 32 | #include <asm/io.h> |
| 33 | |
| 34 | #include <asm/arch/regs-gpio.h> |
| 35 | |
| 36 | void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) |
| 37 | { |
| 38 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
| 39 | unsigned long mask; |
| 40 | unsigned long con; |
| 41 | unsigned long flags; |
| 42 | |
| 43 | if (pin < S3C2410_GPIO_BANKB) { |
| 44 | mask = 1 << S3C2410_GPIO_OFFSET(pin); |
| 45 | } else { |
| 46 | mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; |
| 47 | } |
| 48 | |
| 49 | switch (function) { |
| 50 | case S3C2410_GPIO_LEAVE: |
| 51 | mask = 0; |
| 52 | function = 0; |
| 53 | break; |
| 54 | |
| 55 | case S3C2410_GPIO_INPUT: |
| 56 | case S3C2410_GPIO_OUTPUT: |
| 57 | case S3C2410_GPIO_SFN2: |
| 58 | case S3C2410_GPIO_SFN3: |
| 59 | if (pin < S3C2410_GPIO_BANKB) { |
| 60 | function -= 1; |
| 61 | function &= 1; |
| 62 | function <<= S3C2410_GPIO_OFFSET(pin); |
| 63 | } else { |
| 64 | function &= 3; |
| 65 | function <<= S3C2410_GPIO_OFFSET(pin)*2; |
| 66 | } |
| 67 | } |
| 68 | |
| 69 | /* modify the specified register wwith IRQs off */ |
| 70 | |
| 71 | local_irq_save(flags); |
| 72 | |
| 73 | con = __raw_readl(base + 0x00); |
| 74 | con &= ~mask; |
| 75 | con |= function; |
| 76 | |
| 77 | __raw_writel(con, base + 0x00); |
| 78 | |
| 79 | local_irq_restore(flags); |
| 80 | } |
| 81 | |
| 82 | EXPORT_SYMBOL(s3c2410_gpio_cfgpin); |
| 83 | |
| 84 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) |
| 85 | { |
| 86 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
| 87 | unsigned long val = __raw_readl(base); |
| 88 | |
| 89 | if (pin < S3C2410_GPIO_BANKB) { |
| 90 | val >>= S3C2410_GPIO_OFFSET(pin); |
| 91 | val &= 1; |
| 92 | val += 1; |
| 93 | } else { |
| 94 | val >>= S3C2410_GPIO_OFFSET(pin)*2; |
| 95 | val &= 3; |
| 96 | } |
| 97 | |
| 98 | return val | S3C2410_GPIO_INPUT; |
| 99 | } |
| 100 | |
| 101 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); |
| 102 | |
| 103 | void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) |
| 104 | { |
| 105 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
| 106 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
| 107 | unsigned long flags; |
| 108 | unsigned long up; |
| 109 | |
| 110 | if (pin < S3C2410_GPIO_BANKB) |
| 111 | return; |
| 112 | |
| 113 | local_irq_save(flags); |
| 114 | |
| 115 | up = __raw_readl(base + 0x08); |
| 116 | up &= ~(1L << offs); |
| 117 | up |= to << offs; |
| 118 | __raw_writel(up, base + 0x08); |
| 119 | |
| 120 | local_irq_restore(flags); |
| 121 | } |
| 122 | |
| 123 | EXPORT_SYMBOL(s3c2410_gpio_pullup); |
| 124 | |
| 125 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) |
| 126 | { |
| 127 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
| 128 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
| 129 | unsigned long flags; |
| 130 | unsigned long dat; |
| 131 | |
| 132 | local_irq_save(flags); |
| 133 | |
| 134 | dat = __raw_readl(base + 0x04); |
| 135 | dat &= ~(1 << offs); |
| 136 | dat |= to << offs; |
| 137 | __raw_writel(dat, base + 0x04); |
| 138 | |
| 139 | local_irq_restore(flags); |
| 140 | } |
| 141 | |
| 142 | EXPORT_SYMBOL(s3c2410_gpio_setpin); |
| 143 | |
| 144 | unsigned int s3c2410_gpio_getpin(unsigned int pin) |
| 145 | { |
| 146 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
| 147 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); |
| 148 | |
| 149 | return __raw_readl(base + 0x04) & (1<< offs); |
| 150 | } |
| 151 | |
| 152 | EXPORT_SYMBOL(s3c2410_gpio_getpin); |
| 153 | |
| 154 | unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) |
| 155 | { |
| 156 | unsigned long flags; |
| 157 | unsigned long misccr; |
| 158 | |
| 159 | local_irq_save(flags); |
| 160 | misccr = __raw_readl(S3C24XX_MISCCR); |
| 161 | misccr &= ~clear; |
| 162 | misccr ^= change; |
| 163 | __raw_writel(misccr, S3C24XX_MISCCR); |
| 164 | local_irq_restore(flags); |
| 165 | |
| 166 | return misccr; |
| 167 | } |
| 168 | |
| 169 | EXPORT_SYMBOL(s3c2410_modify_misccr); |
| 170 | |
| 171 | int s3c2410_gpio_getirq(unsigned int pin) |
| 172 | { |
| 173 | if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15) |
| 174 | return -1; /* not valid interrupts */ |
| 175 | |
| 176 | if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) |
| 177 | return -1; /* not valid pin */ |
| 178 | |
| 179 | if (pin < S3C2410_GPF4) |
| 180 | return (pin - S3C2410_GPF0) + IRQ_EINT0; |
| 181 | |
| 182 | if (pin < S3C2410_GPG0) |
| 183 | return (pin - S3C2410_GPF4) + IRQ_EINT4; |
| 184 | |
| 185 | return (pin - S3C2410_GPG0) + IRQ_EINT8; |
| 186 | } |
| 187 | |
| 188 | EXPORT_SYMBOL(s3c2410_gpio_getirq); |