| David Vrabel | fc4effc | 2006-03-27 01:17:23 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Geode GX video device |
| 3 | * |
| 4 | * Copyright (C) 2006 Arcom Control Systems Ltd. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | #ifndef __VIDEO_GX_H__ |
| 12 | #define __VIDEO_GX_H__ |
| 13 | |
| 14 | extern struct geode_vid_ops gx_vid_ops; |
| 15 | |
| 16 | /* Geode GX video processor registers */ |
| 17 | |
| 18 | #define GX_DCFG 0x0008 |
| 19 | # define GX_DCFG_CRT_EN 0x00000001 |
| 20 | # define GX_DCFG_HSYNC_EN 0x00000002 |
| 21 | # define GX_DCFG_VSYNC_EN 0x00000004 |
| 22 | # define GX_DCFG_DAC_BL_EN 0x00000008 |
| 23 | # define GX_DCFG_CRT_HSYNC_POL 0x00000100 |
| 24 | # define GX_DCFG_CRT_VSYNC_POL 0x00000200 |
| 25 | # define GX_DCFG_CRT_SYNC_SKW_MASK 0x0001C000 |
| 26 | # define GX_DCFG_CRT_SYNC_SKW_DFLT 0x00010000 |
| 27 | # define GX_DCFG_VG_CK 0x00100000 |
| 28 | # define GX_DCFG_GV_GAM 0x00200000 |
| 29 | # define GX_DCFG_DAC_VREF 0x04000000 |
| 30 | |
| 31 | /* Geode GX flat panel display control registers */ |
| 32 | #define GX_FP_PM 0x410 |
| 33 | # define GX_FP_PM_P 0x01000000 |
| 34 | |
| 35 | /* Geode GX clock control MSRs */ |
| 36 | |
| 37 | #define MSR_GLCP_SYS_RSTPLL 0x4c000014 |
| 38 | # define MSR_GLCP_SYS_RSTPLL_DOTPREDIV2 (0x0000000000000002ull) |
| 39 | # define MSR_GLCP_SYS_RSTPLL_DOTPREMULT2 (0x0000000000000004ull) |
| 40 | # define MSR_GLCP_SYS_RSTPLL_DOTPOSTDIV3 (0x0000000000000008ull) |
| 41 | |
| 42 | #define MSR_GLCP_DOTPLL 0x4c000015 |
| 43 | # define MSR_GLCP_DOTPLL_DOTRESET (0x0000000000000001ull) |
| 44 | # define MSR_GLCP_DOTPLL_BYPASS (0x0000000000008000ull) |
| 45 | # define MSR_GLCP_DOTPLL_LOCK (0x0000000002000000ull) |
| 46 | |
| 47 | #endif /* !__VIDEO_GX_H__ */ |