| Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2003 ARM Limited |
| 3 | * Copyright (c) u-boot contributors |
| 4 | * Copyright (c) 2012 Pavel Machek <pavel@denx.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | #include <linux/linkage.h> |
| 11 | #include <linux/init.h> |
| 12 | |
| Pavel Machek | ad208d0 | 2012-10-27 01:00:53 +0200 | [diff] [blame] | 13 | .arch armv7-a |
| Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 14 | |
| Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 15 | ENTRY(secondary_trampoline) |
| Dinh Nguyen | d6dd735 | 2013-02-11 17:30:33 -0600 | [diff] [blame] | 16 | movw r2, #:lower16:cpu1start_addr |
| 17 | movt r2, #:upper16:cpu1start_addr |
| Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 18 | |
| Dinh Nguyen | d6dd735 | 2013-02-11 17:30:33 -0600 | [diff] [blame] | 19 | /* The socfpga VT cannot handle a 0xC0000000 page offset when loading |
| 20 | the cpu1start_addr, we bit clear it. Tested on HW and VT. */ |
| 21 | bic r2, r2, #0x40000000 |
| 22 | |
| 23 | ldr r0, [r2] |
| Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 24 | ldr r1, [r0] |
| 25 | bx r1 |
| 26 | |
| 27 | ENTRY(secondary_trampoline_end) |
| Dinh Nguyen | d6dd735 | 2013-02-11 17:30:33 -0600 | [diff] [blame] | 28 | |
| 29 | ENTRY(socfpga_secondary_startup) |
| 30 | bl v7_invalidate_l1 |
| 31 | b secondary_startup |
| 32 | ENDPROC(socfpga_secondary_startup) |