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Mike Frysinger09e1f702008-08-06 17:15:27 +08001/*
2 * Common Blackfin startup code
3 *
4 * Copyright 2004-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/linkage.h>
12#include <linux/init.h>
13#include <asm/blackfin.h>
Mike Frysinger67618fd2008-08-06 17:18:31 +080014#include <asm/thread_info.h>
Mike Frysinger09e1f702008-08-06 17:15:27 +080015#include <asm/trace.h>
16
Mike Frysinger17e89bc2008-08-06 17:23:50 +080017__INIT
18
19#define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
20
21ENTRY(__start)
22 /* R0: argument of command line string, passed from uboot, save it */
23 R7 = R0;
24 /* Enable Cycle Counter and Nesting Of Interrupts */
25#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
26 R0 = SYSCFG_SNEN;
27#else
28 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
29#endif
30 SYSCFG = R0;
31 R0 = 0;
32
33 /* Clear Out All the data and pointer Registers */
34 R1 = R0;
35 R2 = R0;
36 R3 = R0;
37 R4 = R0;
38 R5 = R0;
39 R6 = R0;
40
41 P0 = R0;
42 P1 = R0;
43 P2 = R0;
44 P3 = R0;
45 P4 = R0;
46 P5 = R0;
47
48 LC0 = r0;
49 LC1 = r0;
50 L0 = r0;
51 L1 = r0;
52 L2 = r0;
53 L3 = r0;
54
55 /* Clear Out All the DAG Registers */
56 B0 = r0;
57 B1 = r0;
58 B2 = r0;
59 B3 = r0;
60
61 I0 = r0;
62 I1 = r0;
63 I2 = r0;
64 I3 = r0;
65
66 M0 = r0;
67 M1 = r0;
68 M2 = r0;
69 M3 = r0;
70
71 trace_buffer_init(p0,r0);
72 P0 = R1;
73 R0 = R1;
74
75 /* Turn off the icache */
76 p0.l = LO(IMEM_CONTROL);
77 p0.h = HI(IMEM_CONTROL);
78 R1 = [p0];
79 R0 = ~ENICPLB;
80 R0 = R0 & R1;
81 [p0] = R0;
82 SSYNC;
83
84 /* Turn off the dcache */
85 p0.l = LO(DMEM_CONTROL);
86 p0.h = HI(DMEM_CONTROL);
87 R1 = [p0];
88 R0 = ~ENDCPLB;
89 R0 = R0 & R1;
90 [p0] = R0;
91 SSYNC;
92
Robin Getzcd8fb8d2008-08-14 14:44:33 +080093 /* Save RETX, in case of doublefault */
94 p0.l = ___retx;
95 p0.h = ___retx;
96 R0 = RETX;
97 [P0] = R0;
98
Mike Frysinger17e89bc2008-08-06 17:23:50 +080099 /* Initialize stack pointer */
100 sp.l = lo(INITIAL_STACK);
101 sp.h = hi(INITIAL_STACK);
102 fp = sp;
103 usp = sp;
104
105#ifdef CONFIG_EARLY_PRINTK
106 call _init_early_exception_vectors;
107#endif
108
109 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
110 call _bf53x_relocate_l1_mem;
111#ifdef CONFIG_BFIN_KERNEL_CLOCK
112 call _start_dma_code;
113#endif
114
115 /* This section keeps the processor in supervisor mode
116 * during kernel boot. Switches to user mode at end of boot.
117 * See page 3-9 of Hardware Reference manual for documentation.
118 */
119
120 /* EVT15 = _real_start */
121
122 p0.l = lo(EVT15);
123 p0.h = hi(EVT15);
124 p1.l = _real_start;
125 p1.h = _real_start;
126 [p0] = p1;
127 csync;
128
129 p0.l = lo(IMASK);
130 p0.h = hi(IMASK);
131 p1.l = IMASK_IVG15;
132 p1.h = 0x0;
133 [p0] = p1;
134 csync;
135
136 raise 15;
137 p0.l = .LWAIT_HERE;
138 p0.h = .LWAIT_HERE;
139 reti = p0;
140#if ANOMALY_05000281
141 nop; nop; nop;
142#endif
143 rti;
144
145.LWAIT_HERE:
146 jump .LWAIT_HERE;
147ENDPROC(__start)
148
Mike Frysinger09e1f702008-08-06 17:15:27 +0800149/* A little BF561 glue ... */
150#ifndef WDOG_CTL
151# define WDOG_CTL WDOGA_CTL
152#endif
153
Mike Frysinger09e1f702008-08-06 17:15:27 +0800154ENTRY(_real_start)
155 /* Enable nested interrupts */
156 [--sp] = reti;
157
158 /* watchdog off for now */
159 p0.l = lo(WDOG_CTL);
160 p0.h = hi(WDOG_CTL);
161 r0 = 0xAD6(z);
162 w[p0] = r0;
163 ssync;
164
165 /* Zero out the bss region
166 * Note: this will fail if bss is 0 bytes ...
167 */
168 r0 = 0 (z);
169 r1.l = ___bss_start;
170 r1.h = ___bss_start;
171 r2.l = ___bss_stop;
172 r2.h = ___bss_stop;
173 r2 = r2 - r1;
174 r2 >>= 2;
175 p1 = r1;
176 p2 = r2;
177 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
178.L_clear_bss:
179 [p1++] = r0;
180
181 /* In case there is a NULL pointer reference,
182 * zero out region before stext
183 */
184 p1 = r0;
185 r2.l = __stext;
186 r2.h = __stext;
187 r2 >>= 2;
188 p2 = r2;
189 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
190.L_clear_zero:
191 [p1++] = r0;
192
193 /* Pass the u-boot arguments to the global value command line */
194 R0 = R7;
195 call _cmdline_init;
196
197 /* Load the current thread pointer and stack */
198 sp.l = _init_thread_union;
199 sp.h = _init_thread_union;
200 p1 = THREAD_SIZE (z);
201 sp = sp + p1;
202 usp = sp;
203 fp = sp;
204 jump.l _start_kernel;
205ENDPROC(_real_start)
206
207__FINIT