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Divy Le Ray4d22de32007-01-18 22:04:14 -05001/*
Divy Le Ray1d68e932007-01-30 19:44:35 -08002 * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
Divy Le Ray4d22de32007-01-18 22:04:14 -05003 *
Divy Le Ray1d68e932007-01-30 19:44:35 -08004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
Divy Le Ray4d22de32007-01-18 22:04:14 -05009 *
Divy Le Ray1d68e932007-01-30 19:44:35 -080010 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Divy Le Ray4d22de32007-01-18 22:04:14 -050031 */
32
33/* This file should not be included directly. Include common.h instead. */
34
35#ifndef __T3_ADAPTER_H__
36#define __T3_ADAPTER_H__
37
38#include <linux/pci.h>
39#include <linux/spinlock.h>
40#include <linux/interrupt.h>
41#include <linux/timer.h>
42#include <linux/cache.h>
Divy Le Raya13fbee2007-01-30 19:44:29 -080043#include <linux/mutex.h>
Jiri Slaby1977f032007-10-18 23:40:25 -070044#include <linux/bitops.h>
Divy Le Rayb47385b2008-05-21 18:56:26 -070045#include <linux/inet_lro.h>
Divy Le Ray4d22de32007-01-18 22:04:14 -050046#include "t3cdev.h"
Divy Le Ray4d22de32007-01-18 22:04:14 -050047#include <asm/io.h>
48
Divy Le Ray4d22de32007-01-18 22:04:14 -050049struct vlan_group;
Divy Le Ray5fbf8162007-08-29 19:15:47 -070050struct adapter;
Stephen Hemmingerbea33482007-10-03 16:41:36 -070051struct sge_qset;
52
Divy Le Ray4d22de32007-01-18 22:04:14 -050053struct port_info {
Divy Le Ray5fbf8162007-08-29 19:15:47 -070054 struct adapter *adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -050055 struct vlan_group *vlan_grp;
Stephen Hemmingerbea33482007-10-03 16:41:36 -070056 struct sge_qset *qs;
Divy Le Ray4d22de32007-01-18 22:04:14 -050057 const struct port_type_info *port_type;
58 u8 port_id;
59 u8 rx_csum_offload;
60 u8 nqsets;
61 u8 first_qset;
62 struct cphy phy;
63 struct cmac mac;
64 struct link_config link_config;
65 struct net_device_stats netstats;
66 int activity;
67};
68
69enum { /* adapter flags */
70 FULL_INIT_DONE = (1 << 0),
71 USING_MSI = (1 << 1),
72 USING_MSIX = (1 << 2),
Divy Le Ray14ab9892007-01-30 19:43:50 -080073 QUEUES_BOUND = (1 << 3),
Divy Le Rayb8819552007-12-17 18:47:31 -080074 TP_PARITY_INIT = (1 << 4),
Divy Le Ray48c4b6d2008-05-06 19:25:56 -070075 NAPI_INIT = (1 << 5),
Divy Le Ray4d22de32007-01-18 22:04:14 -050076};
77
Divy Le Raycf992af2007-05-30 21:10:47 -070078struct fl_pg_chunk {
79 struct page *page;
80 void *va;
81 unsigned int offset;
82};
83
Divy Le Ray4d22de32007-01-18 22:04:14 -050084struct rx_desc;
85struct rx_sw_desc;
86
Divy Le Raycf992af2007-05-30 21:10:47 -070087struct sge_fl { /* SGE per free-buffer list state */
88 unsigned int buf_size; /* size of each Rx buffer */
89 unsigned int credits; /* # of available Rx buffers */
90 unsigned int size; /* capacity of free list */
91 unsigned int cidx; /* consumer index */
92 unsigned int pidx; /* producer index */
93 unsigned int gen; /* free list generation */
94 struct fl_pg_chunk pg_chunk;/* page chunk cache */
95 unsigned int use_pages; /* whether FL uses pages or sk_buffs */
Divy Le Ray7385ecf2008-05-21 18:56:21 -070096 unsigned int order; /* order of page allocations */
Divy Le Raycf992af2007-05-30 21:10:47 -070097 struct rx_desc *desc; /* address of HW Rx descriptor ring */
98 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
99 dma_addr_t phys_addr; /* physical address of HW ring start */
100 unsigned int cntxt_id; /* SGE context id for the free list */
101 unsigned long empty; /* # of times queue ran out of buffers */
Divy Le Raye0994eb2007-02-24 16:44:17 -0800102 unsigned long alloc_failed; /* # of times buffer allocation failed */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500103};
104
105/*
106 * Bundle size for grouping offload RX packets for delivery to the stack.
107 * Don't make this too big as we do prefetch on each packet in a bundle.
108 */
109# define RX_BUNDLE_SIZE 8
110
111struct rsp_desc;
112
113struct sge_rspq { /* state for an SGE response queue */
114 unsigned int credits; /* # of pending response credits */
115 unsigned int size; /* capacity of response queue */
116 unsigned int cidx; /* consumer index */
117 unsigned int gen; /* current generation bit */
118 unsigned int polling; /* is the queue serviced through NAPI? */
119 unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */
120 unsigned int next_holdoff; /* holdoff time for next interrupt */
Divy Le Ray7385ecf2008-05-21 18:56:21 -0700121 unsigned int rx_recycle_buf; /* whether recycling occurred
122 within current sop-eop */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500123 struct rsp_desc *desc; /* address of HW response ring */
124 dma_addr_t phys_addr; /* physical address of the ring */
125 unsigned int cntxt_id; /* SGE context id for the response q */
126 spinlock_t lock; /* guards response processing */
David S. Miller147e70e2008-09-22 01:29:52 -0700127 struct sk_buff_head rx_queue; /* offload packet receive queue */
Divy Le Ray7385ecf2008-05-21 18:56:21 -0700128 struct sk_buff *pg_skb; /* used to build frag list in napi handler */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500129
130 unsigned long offload_pkts;
131 unsigned long offload_bundles;
132 unsigned long eth_pkts; /* # of ethernet packets */
133 unsigned long pure_rsps; /* # of pure (non-data) responses */
134 unsigned long imm_data; /* responses with immediate data */
135 unsigned long rx_drops; /* # of packets dropped due to no mem */
136 unsigned long async_notif; /* # of asynchronous notification events */
137 unsigned long empty; /* # of times queue ran out of credits */
138 unsigned long nomem; /* # of responses deferred due to no mem */
139 unsigned long unhandled_irqs; /* # of spurious intrs */
Divy Le Raybae73f42007-02-24 16:44:12 -0800140 unsigned long starved;
141 unsigned long restarted;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500142};
143
144struct tx_desc;
145struct tx_sw_desc;
146
147struct sge_txq { /* state for an SGE Tx queue */
148 unsigned long flags; /* HW DMA fetch status */
149 unsigned int in_use; /* # of in-use Tx descriptors */
150 unsigned int size; /* # of descriptors */
151 unsigned int processed; /* total # of descs HW has processed */
152 unsigned int cleaned; /* total # of descs SW has reclaimed */
153 unsigned int stop_thres; /* SW TX queue suspend threshold */
154 unsigned int cidx; /* consumer index */
155 unsigned int pidx; /* producer index */
156 unsigned int gen; /* current value of generation bit */
157 unsigned int unacked; /* Tx descriptors used since last COMPL */
158 struct tx_desc *desc; /* address of HW Tx descriptor ring */
159 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
160 spinlock_t lock; /* guards enqueueing of new packets */
161 unsigned int token; /* WR token */
162 dma_addr_t phys_addr; /* physical address of the ring */
163 struct sk_buff_head sendq; /* List of backpressured offload packets */
164 struct tasklet_struct qresume_tsk; /* restarts the queue */
165 unsigned int cntxt_id; /* SGE context id for the Tx q */
166 unsigned long stops; /* # of times q has been stopped */
167 unsigned long restarts; /* # of queue restarts */
168};
169
170enum { /* per port SGE statistics */
171 SGE_PSTAT_TSO, /* # of TSO requests */
172 SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
173 SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
174 SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
175 SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
Divy Le Rayb47385b2008-05-21 18:56:26 -0700176 SGE_PSTAT_LRO_AGGR, /* # of page chunks added to LRO sessions */
177 SGE_PSTAT_LRO_FLUSHED, /* # of flushed LRO sessions */
178 SGE_PSTAT_LRO_NO_DESC, /* # of overflown LRO sessions */
Divy Le Ray4d22de32007-01-18 22:04:14 -0500179
180 SGE_PSTAT_MAX /* must be last */
181};
182
Divy Le Rayb47385b2008-05-21 18:56:26 -0700183#define T3_MAX_LRO_SES 8
184#define T3_MAX_LRO_MAX_PKTS 64
185
Divy Le Ray4d22de32007-01-18 22:04:14 -0500186struct sge_qset { /* an SGE queue set */
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700187 struct adapter *adap;
188 struct napi_struct napi;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500189 struct sge_rspq rspq;
190 struct sge_fl fl[SGE_RXQ_PER_SET];
191 struct sge_txq txq[SGE_TXQ_PER_SET];
Divy Le Rayb47385b2008-05-21 18:56:26 -0700192 struct net_lro_mgr lro_mgr;
193 struct net_lro_desc lro_desc[T3_MAX_LRO_SES];
194 struct skb_frag_struct *lro_frag_tbl;
195 int lro_nfrags;
196 int lro_enabled;
197 int lro_frag_len;
198 void *lro_va;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700199 struct net_device *netdev;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500200 unsigned long txq_stopped; /* which Tx queues are stopped */
201 struct timer_list tx_reclaim_timer; /* reclaims TX buffers */
202 unsigned long port_stats[SGE_PSTAT_MAX];
203} ____cacheline_aligned;
204
205struct sge {
206 struct sge_qset qs[SGE_QSETS];
207 spinlock_t reg_lock; /* guards non-atomic SGE registers (eg context) */
208};
209
210struct adapter {
211 struct t3cdev tdev;
212 struct list_head adapter_list;
213 void __iomem *regs;
214 struct pci_dev *pdev;
215 unsigned long registered_device_map;
216 unsigned long open_device_map;
217 unsigned long flags;
218
219 const char *name;
220 int msg_enable;
221 unsigned int mmio_len;
222
223 struct adapter_params params;
224 unsigned int slow_intr_mask;
225 unsigned long irq_stats[IRQ_NUM_STATS];
226
227 struct {
228 unsigned short vec;
229 char desc[22];
230 } msix_info[SGE_QSETS + 1];
231
232 /* T3 modules */
233 struct sge sge;
234 struct mc7 pmrx;
235 struct mc7 pmtx;
236 struct mc7 cm;
237 struct mc5 mc5;
238
239 struct net_device *port[MAX_NPORTS];
240 unsigned int check_task_cnt;
241 struct delayed_work adap_check_task;
242 struct work_struct ext_intr_handler_task;
243
Divy Le Ray4d22de32007-01-18 22:04:14 -0500244 struct dentry *debugfs_root;
245
246 struct mutex mdio_lock;
247 spinlock_t stats_lock;
248 spinlock_t work_lock;
249};
250
251static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
252{
253 u32 val = readl(adapter->regs + reg_addr);
254
255 CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
256 return val;
257}
258
259static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
260{
261 CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
262 writel(val, adapter->regs + reg_addr);
263}
264
265static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
266{
267 return netdev_priv(adap->port[idx]);
268}
269
Divy Le Ray4d22de32007-01-18 22:04:14 -0500270#define OFFLOAD_DEVMAP_BIT 15
271
272#define tdev2adap(d) container_of(d, struct adapter, tdev)
273
274static inline int offload_running(struct adapter *adapter)
275{
276 return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
277}
278
279int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
280
281void t3_os_ext_intr_handler(struct adapter *adapter);
282void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
283 int speed, int duplex, int fc);
284
285void t3_sge_start(struct adapter *adap);
286void t3_sge_stop(struct adapter *adap);
Divy Le Ray0ca41c02008-09-25 14:05:28 +0000287void t3_stop_sge_timers(struct adapter *adap);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500288void t3_free_sge_resources(struct adapter *adap);
289void t3_sge_err_intr_handler(struct adapter *adapter);
Jeff Garzik7c239972007-10-19 03:12:20 -0400290irq_handler_t t3_intr_handler(struct adapter *adap, int polling);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500291int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
Divy Le Ray14ab9892007-01-30 19:43:50 -0800292int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500293void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
294int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
295 int irq_vec_idx, const struct qset_params *p,
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700296 int ntxq, struct net_device *dev);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500297int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
298 unsigned char *data);
299irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
300
301#endif /* __T3_ADAPTER_H__ */