blob: d305fb089767c1b1c51d05f33c1e84e064f728a7 [file] [log] [blame]
Dinh Nguyencfda5902012-07-11 15:13:16 -05001/*
2 * Copyright (C) 2012 Altera Corporation
3 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
4 *
5 * Modified from mach-picoxcell/time.c
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#include <linux/dw_apb_timer.h>
20#include <linux/of.h>
21#include <linux/of_address.h>
22#include <linux/of_irq.h>
Heiko Stuebnera8b447f2013-06-04 11:37:36 +020023#include <linux/clk.h>
Stephen Boyd38ff87f2013-06-01 23:39:40 -070024#include <linux/sched_clock.h>
Dinh Nguyencfda5902012-07-11 15:13:16 -050025
Uwe Kleine-König1cf02032013-10-01 10:38:12 +020026static void __init timer_get_base_and_rate(struct device_node *np,
Dinh Nguyencfda5902012-07-11 15:13:16 -050027 void __iomem **base, u32 *rate)
28{
Heiko Stuebnera8b447f2013-06-04 11:37:36 +020029 struct clk *timer_clk;
30 struct clk *pclk;
31
Dinh Nguyencfda5902012-07-11 15:13:16 -050032 *base = of_iomap(np, 0);
33
34 if (!*base)
35 panic("Unable to map regs for %s", np->name);
36
Heiko Stuebnera8b447f2013-06-04 11:37:36 +020037 /*
38 * Not all implementations use a periphal clock, so don't panic
39 * if it's not present
40 */
41 pclk = of_clk_get_by_name(np, "pclk");
42 if (!IS_ERR(pclk))
43 if (clk_prepare_enable(pclk))
44 pr_warn("pclk for %s is present, but could not be activated\n",
45 np->name);
46
47 timer_clk = of_clk_get_by_name(np, "timer");
48 if (IS_ERR(timer_clk))
49 goto try_clock_freq;
50
51 if (!clk_prepare_enable(timer_clk)) {
52 *rate = clk_get_rate(timer_clk);
53 return;
54 }
55
56try_clock_freq:
Dinh Nguyencfda5902012-07-11 15:13:16 -050057 if (of_property_read_u32(np, "clock-freq", rate) &&
Uwe Kleine-König1cf02032013-10-01 10:38:12 +020058 of_property_read_u32(np, "clock-frequency", rate))
Heiko Stuebnera8b447f2013-06-04 11:37:36 +020059 panic("No clock nor clock-frequency property for %s", np->name);
Dinh Nguyencfda5902012-07-11 15:13:16 -050060}
61
Uwe Kleine-König1cf02032013-10-01 10:38:12 +020062static void __init add_clockevent(struct device_node *event_timer)
Dinh Nguyencfda5902012-07-11 15:13:16 -050063{
64 void __iomem *iobase;
65 struct dw_apb_clock_event_device *ced;
66 u32 irq, rate;
67
68 irq = irq_of_parse_and_map(event_timer, 0);
Baruch Siach1a33bd22013-05-29 10:11:17 +020069 if (irq == 0)
Dinh Nguyencfda5902012-07-11 15:13:16 -050070 panic("No IRQ for clock event timer");
71
72 timer_get_base_and_rate(event_timer, &iobase, &rate);
73
74 ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
75 rate);
76 if (!ced)
77 panic("Unable to initialise clockevent device");
78
79 dw_apb_clockevent_register(ced);
80}
81
Heiko Stuebnera1198f82013-06-04 11:37:02 +020082static void __iomem *sched_io_base;
83static u32 sched_rate;
84
Uwe Kleine-König1cf02032013-10-01 10:38:12 +020085static void __init add_clocksource(struct device_node *source_timer)
Dinh Nguyencfda5902012-07-11 15:13:16 -050086{
87 void __iomem *iobase;
88 struct dw_apb_clocksource *cs;
89 u32 rate;
90
91 timer_get_base_and_rate(source_timer, &iobase, &rate);
92
93 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
94 if (!cs)
95 panic("Unable to initialise clocksource device");
96
97 dw_apb_clocksource_start(cs);
98 dw_apb_clocksource_register(cs);
Dinh Nguyencfda5902012-07-11 15:13:16 -050099
Heiko Stuebnera1198f82013-06-04 11:37:02 +0200100 /*
101 * Fallback to use the clocksource as sched_clock if no separate
102 * timer is found. sched_io_base then points to the current_value
103 * register of the clocksource timer.
104 */
105 sched_io_base = iobase + 0x04;
106 sched_rate = rate;
107}
Dinh Nguyencfda5902012-07-11 15:13:16 -0500108
Yang Wei0d24d1f2014-05-13 11:10:08 +0800109static u64 notrace read_sched_clock(void)
Dinh Nguyencfda5902012-07-11 15:13:16 -0500110{
Dinh Nguyen85dc6ee2013-12-10 19:49:18 +0100111 return ~__raw_readl(sched_io_base);
Dinh Nguyencfda5902012-07-11 15:13:16 -0500112}
113
114static const struct of_device_id sptimer_ids[] __initconst = {
115 { .compatible = "picochip,pc3x2-rtc" },
Dinh Nguyencfda5902012-07-11 15:13:16 -0500116 { /* Sentinel */ },
117};
118
Uwe Kleine-König1cf02032013-10-01 10:38:12 +0200119static void __init init_sched_clock(void)
Dinh Nguyencfda5902012-07-11 15:13:16 -0500120{
121 struct device_node *sched_timer;
Dinh Nguyencfda5902012-07-11 15:13:16 -0500122
123 sched_timer = of_find_matching_node(NULL, sptimer_ids);
Heiko Stuebnera1198f82013-06-04 11:37:02 +0200124 if (sched_timer) {
125 timer_get_base_and_rate(sched_timer, &sched_io_base,
126 &sched_rate);
127 of_node_put(sched_timer);
128 }
Dinh Nguyencfda5902012-07-11 15:13:16 -0500129
Stephen Boydfa8296a2013-07-18 16:21:22 -0700130 sched_clock_register(read_sched_clock, 32, sched_rate);
Dinh Nguyencfda5902012-07-11 15:13:16 -0500131}
132
Heiko Stuebner10021482013-06-04 11:38:42 +0200133static int num_called;
134static void __init dw_apb_timer_init(struct device_node *timer)
Dinh Nguyencfda5902012-07-11 15:13:16 -0500135{
Heiko Stuebner10021482013-06-04 11:38:42 +0200136 switch (num_called) {
137 case 0:
138 pr_debug("%s: found clockevent timer\n", __func__);
139 add_clockevent(timer);
Heiko Stuebner10021482013-06-04 11:38:42 +0200140 break;
141 case 1:
142 pr_debug("%s: found clocksource timer\n", __func__);
143 add_clocksource(timer);
Heiko Stuebner10021482013-06-04 11:38:42 +0200144 init_sched_clock();
145 break;
146 default:
147 break;
148 }
Dinh Nguyencfda5902012-07-11 15:13:16 -0500149
Heiko Stuebner10021482013-06-04 11:38:42 +0200150 num_called++;
Dinh Nguyencfda5902012-07-11 15:13:16 -0500151}
Heiko Stuebner10021482013-06-04 11:38:42 +0200152CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
Dinh Nguyen9ab47272013-12-10 19:49:18 +0100153CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
154CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
155CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);