blob: f2cc26633cb2442bc67e1d46bb52ab044be02598 [file] [log] [blame]
Anton Vorontsov20b1597b2010-08-10 18:01:49 -07001/*
2 * SDHCI support for CNS3xxx SoC
3 *
4 * Copyright 2008 Cavium Networks
5 * Copyright 2010 MontaVista Software, LLC.
6 *
7 * Authors: Scott Shu
8 * Anton Vorontsov <avorontsov@mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/mmc/host.h>
Chris Ball7833c662011-11-11 19:54:53 -050018#include <linux/module.h>
Anton Vorontsov20b1597b2010-08-10 18:01:49 -070019#include "sdhci-pltfm.h"
20
21static unsigned int sdhci_cns3xxx_get_max_clk(struct sdhci_host *host)
22{
23 return 150000000;
24}
25
26static void sdhci_cns3xxx_set_clock(struct sdhci_host *host, unsigned int clock)
27{
28 struct device *dev = mmc_dev(host->mmc);
29 int div = 1;
30 u16 clk;
31 unsigned long timeout;
32
33 if (clock == host->clock)
34 return;
35
36 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
37
38 if (clock == 0)
39 goto out;
40
41 while (host->max_clk / div > clock) {
42 /*
43 * On CNS3xxx divider grows linearly up to 4, and then
44 * exponentially up to 256.
45 */
46 if (div < 4)
47 div += 1;
48 else if (div < 256)
49 div *= 2;
50 else
51 break;
52 }
53
54 dev_dbg(dev, "desired SD clock: %d, actual: %d\n",
55 clock, host->max_clk / div);
56
57 /* Divide by 3 is special. */
58 if (div != 3)
59 div >>= 1;
60
61 clk = div << SDHCI_DIVIDER_SHIFT;
62 clk |= SDHCI_CLOCK_INT_EN;
63 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
64
65 timeout = 20;
66 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
67 & SDHCI_CLOCK_INT_STABLE)) {
68 if (timeout == 0) {
69 dev_warn(dev, "clock is unstable");
70 break;
71 }
72 timeout--;
73 mdelay(1);
74 }
75
76 clk |= SDHCI_CLOCK_CARD_EN;
77 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
78out:
79 host->clock = clock;
80}
81
Lars-Peter Clausenc9155682013-03-13 19:26:05 +010082static const struct sdhci_ops sdhci_cns3xxx_ops = {
Anton Vorontsov20b1597b2010-08-10 18:01:49 -070083 .get_max_clock = sdhci_cns3xxx_get_max_clk,
84 .set_clock = sdhci_cns3xxx_set_clock,
85};
86
Lars-Peter Clausen1db5eeb2013-03-13 19:26:03 +010087static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
Anton Vorontsov20b1597b2010-08-10 18:01:49 -070088 .ops = &sdhci_cns3xxx_ops,
89 .quirks = SDHCI_QUIRK_BROKEN_DMA |
90 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
91 SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
92 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
93 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
94 SDHCI_QUIRK_NONSTANDARD_CLOCK,
95};
Shawn Guo85d65092011-05-27 23:48:12 +080096
Bill Pembertonc3be1ef2012-11-19 13:23:06 -050097static int sdhci_cns3xxx_probe(struct platform_device *pdev)
Shawn Guo85d65092011-05-27 23:48:12 +080098{
Christian Daudt0e748232013-05-29 13:50:05 -070099 return sdhci_pltfm_register(pdev, &sdhci_cns3xxx_pdata, 0);
Shawn Guo85d65092011-05-27 23:48:12 +0800100}
101
Bill Pemberton6e0ee712012-11-19 13:26:03 -0500102static int sdhci_cns3xxx_remove(struct platform_device *pdev)
Shawn Guo85d65092011-05-27 23:48:12 +0800103{
104 return sdhci_pltfm_unregister(pdev);
105}
106
107static struct platform_driver sdhci_cns3xxx_driver = {
108 .driver = {
109 .name = "sdhci-cns3xxx",
110 .owner = THIS_MODULE,
Manuel Lauss29495aa2011-11-03 11:09:45 +0100111 .pm = SDHCI_PLTFM_PMOPS,
Shawn Guo85d65092011-05-27 23:48:12 +0800112 },
113 .probe = sdhci_cns3xxx_probe,
Bill Pemberton0433c142012-11-19 13:20:26 -0500114 .remove = sdhci_cns3xxx_remove,
Shawn Guo85d65092011-05-27 23:48:12 +0800115};
116
Axel Lind1f81a62011-11-26 12:55:43 +0800117module_platform_driver(sdhci_cns3xxx_driver);
Shawn Guo85d65092011-05-27 23:48:12 +0800118
119MODULE_DESCRIPTION("SDHCI driver for CNS3xxx");
120MODULE_AUTHOR("Scott Shu, "
121 "Anton Vorontsov <avorontsov@mvista.com>");
122MODULE_LICENSE("GPL v2");