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Naveen Krishna Ch8a73cd42013-10-16 11:00:42 +05301* Samsung's High Speed I2C controller
2
3The Samsung's High Speed I2C controller is used to interface with I2C devices
4at various speeds ranging from 100khz to 3.4Mhz.
5
6Required properties:
7 - compatible: value should be.
Naveen Krishna Ch218e1492014-04-28 14:29:58 +05308 -> "samsung,exynos5-hsi2c", (DEPRECATED)
9 for i2c compatible with HSI2C available
10 on Exynos5250 and Exynos5420 SoCs.
11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
12 on Exynos5250 and Exynos5420 SoCs.
13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
14 on Exynos5260 SoCs.
Naveen Krishna Ch2374a532014-09-16 15:03:17 +053015 -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
16 on Exynos7 SoCs.
Naveen Krishna Ch218e1492014-04-28 14:29:58 +053017
Naveen Krishna Ch8a73cd42013-10-16 11:00:42 +053018 - reg: physical base address of the controller and length of memory mapped
19 region.
20 - interrupts: interrupt number to the cpu.
21 - #address-cells: always 1 (for i2c addresses)
22 - #size-cells: always 0
23
24 - Pinctrl:
25 - pinctrl-0: Pin control group to be used for this controller.
26 - pinctrl-names: Should contain only one value - "default".
27
28Optional properties:
29 - clock-frequency: Desired operating frequency in Hz of the bus.
30 -> If not specified, the bus operates in fast-speed mode at
31 at 100khz.
32 -> If specified, the bus operates in high-speed mode only if the
33 clock-frequency is >= 1Mhz.
34
35Example:
36
37hsi2c@12ca0000 {
Naveen Krishna Ch218e1492014-04-28 14:29:58 +053038 compatible = "samsung,exynos5250-hsi2c";
Naveen Krishna Ch8a73cd42013-10-16 11:00:42 +053039 reg = <0x12ca0000 0x100>;
40 interrupts = <56>;
41 clock-frequency = <100000>;
42
43 pinctrl-0 = <&i2c4_bus>;
44 pinctrl-names = "default";
45
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 s2mps11_pmic@66 {
50 compatible = "samsung,s2mps11-pmic";
51 reg = <0x66>;
52 };
53};