blob: 62e660a79387e92fbaabd7edd8d84b508ee841db [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
4 *
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
6 *
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
9 *
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * Additional credits:
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
44 * endian systems.
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
49 * driver init path.
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
51 */
52
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <linux/module.h>
54#include <linux/moduleparam.h>
55#include <linux/version.h>
56#include <linux/types.h>
57#include <linux/errno.h>
58#include <linux/ioport.h>
59#include <linux/pci.h>
Domen Puncer1e7f0bd2005-06-26 18:22:14 -040060#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#include <linux/kernel.h>
62#include <linux/netdevice.h>
63#include <linux/etherdevice.h>
64#include <linux/skbuff.h>
65#include <linux/init.h>
66#include <linux/delay.h>
67#include <linux/mm.h>
68#include <linux/highmem.h>
69#include <linux/sockios.h>
70
71#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
72#include <linux/if_vlan.h>
73#endif
74
75#ifdef SIOCETHTOOL
76#include <linux/ethtool.h>
77#endif
78
79#include <net/sock.h>
80#include <net/ip.h>
81
82#include <asm/system.h>
83#include <asm/io.h>
84#include <asm/irq.h>
85#include <asm/byteorder.h>
86#include <asm/uaccess.h>
87
88
89#define DRV_NAME "acenic"
90
91#undef INDEX_DEBUG
92
93#ifdef CONFIG_ACENIC_OMIT_TIGON_I
94#define ACE_IS_TIGON_I(ap) 0
95#define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
96#else
97#define ACE_IS_TIGON_I(ap) (ap->version == 1)
98#define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
99#endif
100
101#ifndef PCI_VENDOR_ID_ALTEON
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400102#define PCI_VENDOR_ID_ALTEON 0x12ae
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103#endif
104#ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
105#define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
106#define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
107#endif
108#ifndef PCI_DEVICE_ID_3COM_3C985
109#define PCI_DEVICE_ID_3COM_3C985 0x0001
110#endif
111#ifndef PCI_VENDOR_ID_NETGEAR
112#define PCI_VENDOR_ID_NETGEAR 0x1385
113#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
114#endif
115#ifndef PCI_DEVICE_ID_NETGEAR_GA620T
116#define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
117#endif
118
119
120/*
121 * Farallon used the DEC vendor ID by mistake and they seem not
122 * to care - stinky!
123 */
124#ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
125#define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
126#endif
127#ifndef PCI_DEVICE_ID_FARALLON_PN9100T
128#define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
129#endif
130#ifndef PCI_VENDOR_ID_SGI
131#define PCI_VENDOR_ID_SGI 0x10a9
132#endif
133#ifndef PCI_DEVICE_ID_SGI_ACENIC
134#define PCI_DEVICE_ID_SGI_ACENIC 0x0009
135#endif
136
137static struct pci_device_id acenic_pci_tbl[] = {
138 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
143 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
145 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
146 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
147 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
148 /*
149 * Farallon used the DEC vendor ID on their cards incorrectly,
150 * then later Alteon's ID.
151 */
152 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
153 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
154 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
155 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
156 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
157 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
158 { }
159};
160MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
161
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162#define ace_sync_irq(irq) synchronize_irq(irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163
164#ifndef offset_in_page
165#define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
166#endif
167
168#define ACE_MAX_MOD_PARMS 8
169#define BOARD_IDX_STATIC 0
170#define BOARD_IDX_OVERFLOW -1
171
172#if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
173 defined(NETIF_F_HW_VLAN_RX)
174#define ACENIC_DO_VLAN 1
175#define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
176#else
177#define ACENIC_DO_VLAN 0
178#define ACE_RCB_VLAN_FLAG 0
179#endif
180
181#include "acenic.h"
182
183/*
184 * These must be defined before the firmware is included.
185 */
186#define MAX_TEXT_LEN 96*1024
187#define MAX_RODATA_LEN 8*1024
188#define MAX_DATA_LEN 2*1024
189
190#include "acenic_firmware.h"
191
192#ifndef tigon2FwReleaseLocal
193#define tigon2FwReleaseLocal 0
194#endif
195
196/*
197 * This driver currently supports Tigon I and Tigon II based cards
198 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
199 * GA620. The driver should also work on the SGI, DEC and Farallon
200 * versions of the card, however I have not been able to test that
201 * myself.
202 *
203 * This card is really neat, it supports receive hardware checksumming
204 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
205 * firmware. Also the programming interface is quite neat, except for
206 * the parts dealing with the i2c eeprom on the card ;-)
207 *
208 * Using jumbo frames:
209 *
210 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
211 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
212 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
213 * interface number and <MTU> being the MTU value.
214 *
215 * Module parameters:
216 *
217 * When compiled as a loadable module, the driver allows for a number
218 * of module parameters to be specified. The driver supports the
219 * following module parameters:
220 *
221 * trace=<val> - Firmware trace level. This requires special traced
222 * firmware to replace the firmware supplied with
223 * the driver - for debugging purposes only.
224 *
225 * link=<val> - Link state. Normally you want to use the default link
226 * parameters set by the driver. This can be used to
227 * override these in case your switch doesn't negotiate
228 * the link properly. Valid values are:
229 * 0x0001 - Force half duplex link.
230 * 0x0002 - Do not negotiate line speed with the other end.
231 * 0x0010 - 10Mbit/sec link.
232 * 0x0020 - 100Mbit/sec link.
233 * 0x0040 - 1000Mbit/sec link.
234 * 0x0100 - Do not negotiate flow control.
235 * 0x0200 - Enable RX flow control Y
236 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
237 * Default value is 0x0270, ie. enable link+flow
238 * control negotiation. Negotiating the highest
239 * possible link speed with RX flow control enabled.
240 *
241 * When disabling link speed negotiation, only one link
242 * speed is allowed to be specified!
243 *
244 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
245 * to wait for more packets to arive before
246 * interrupting the host, from the time the first
247 * packet arrives.
248 *
249 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
250 * to wait for more packets to arive in the transmit ring,
251 * before interrupting the host, after transmitting the
252 * first packet in the ring.
253 *
254 * max_tx_desc=<val> - maximum number of transmit descriptors
255 * (packets) transmitted before interrupting the host.
256 *
257 * max_rx_desc=<val> - maximum number of receive descriptors
258 * (packets) received before interrupting the host.
259 *
260 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
261 * increments of the NIC's on board memory to be used for
262 * transmit and receive buffers. For the 1MB NIC app. 800KB
263 * is available, on the 1/2MB NIC app. 300KB is available.
264 * 68KB will always be available as a minimum for both
265 * directions. The default value is a 50/50 split.
266 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
267 * operations, default (1) is to always disable this as
268 * that is what Alteon does on NT. I have not been able
269 * to measure any real performance differences with
270 * this on my systems. Set <val>=0 if you want to
271 * enable these operations.
272 *
273 * If you use more than one NIC, specify the parameters for the
274 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
275 * run tracing on NIC #2 but not on NIC #1 and #3.
276 *
277 * TODO:
278 *
279 * - Proper multicast support.
280 * - NIC dump support.
281 * - More tuning parameters.
282 *
283 * The mini ring is not used under Linux and I am not sure it makes sense
284 * to actually use it.
285 *
286 * New interrupt handler strategy:
287 *
288 * The old interrupt handler worked using the traditional method of
289 * replacing an skbuff with a new one when a packet arrives. However
290 * the rx rings do not need to contain a static number of buffer
291 * descriptors, thus it makes sense to move the memory allocation out
292 * of the main interrupt handler and do it in a bottom half handler
293 * and only allocate new buffers when the number of buffers in the
294 * ring is below a certain threshold. In order to avoid starving the
295 * NIC under heavy load it is however necessary to force allocation
296 * when hitting a minimum threshold. The strategy for alloction is as
297 * follows:
298 *
299 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
300 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
301 * the buffers in the interrupt handler
302 * RX_RING_THRES - maximum number of buffers in the rx ring
303 * RX_MINI_THRES - maximum number of buffers in the mini ring
304 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
305 *
306 * One advantagous side effect of this allocation approach is that the
307 * entire rx processing can be done without holding any spin lock
308 * since the rx rings and registers are totally independent of the tx
309 * ring and its registers. This of course includes the kmalloc's of
310 * new skb's. Thus start_xmit can run in parallel with rx processing
311 * and the memory allocation on SMP systems.
312 *
313 * Note that running the skb reallocation in a bottom half opens up
314 * another can of races which needs to be handled properly. In
315 * particular it can happen that the interrupt handler tries to run
316 * the reallocation while the bottom half is either running on another
317 * CPU or was interrupted on the same CPU. To get around this the
318 * driver uses bitops to prevent the reallocation routines from being
319 * reentered.
320 *
321 * TX handling can also be done without holding any spin lock, wheee
322 * this is fun! since tx_ret_csm is only written to by the interrupt
323 * handler. The case to be aware of is when shutting down the device
324 * and cleaning up where it is necessary to make sure that
325 * start_xmit() is not running while this is happening. Well DaveM
326 * informs me that this case is already protected against ... bye bye
327 * Mr. Spin Lock, it was nice to know you.
328 *
329 * TX interrupts are now partly disabled so the NIC will only generate
330 * TX interrupts for the number of coal ticks, not for the number of
331 * TX packets in the queue. This should reduce the number of TX only,
332 * ie. when no RX processing is done, interrupts seen.
333 */
334
335/*
336 * Threshold values for RX buffer allocation - the low water marks for
337 * when to start refilling the rings are set to 75% of the ring
338 * sizes. It seems to make sense to refill the rings entirely from the
339 * intrrupt handler once it gets below the panic threshold, that way
340 * we don't risk that the refilling is moved to another CPU when the
341 * one running the interrupt handler just got the slab code hot in its
342 * cache.
343 */
344#define RX_RING_SIZE 72
345#define RX_MINI_SIZE 64
346#define RX_JUMBO_SIZE 48
347
348#define RX_PANIC_STD_THRES 16
349#define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
350#define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
351#define RX_PANIC_MINI_THRES 12
352#define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
353#define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
354#define RX_PANIC_JUMBO_THRES 6
355#define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
356#define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
357
358
359/*
360 * Size of the mini ring entries, basically these just should be big
361 * enough to take TCP ACKs
362 */
363#define ACE_MINI_SIZE 100
364
365#define ACE_MINI_BUFSIZE ACE_MINI_SIZE
366#define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
367#define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
368
369/*
370 * There seems to be a magic difference in the effect between 995 and 996
371 * but little difference between 900 and 995 ... no idea why.
372 *
373 * There is now a default set of tuning parameters which is set, depending
374 * on whether or not the user enables Jumbo frames. It's assumed that if
375 * Jumbo frames are enabled, the user wants optimal tuning for that case.
376 */
377#define DEF_TX_COAL 400 /* 996 */
378#define DEF_TX_MAX_DESC 60 /* was 40 */
379#define DEF_RX_COAL 120 /* 1000 */
380#define DEF_RX_MAX_DESC 25
381#define DEF_TX_RATIO 21 /* 24 */
382
383#define DEF_JUMBO_TX_COAL 20
384#define DEF_JUMBO_TX_MAX_DESC 60
385#define DEF_JUMBO_RX_COAL 30
386#define DEF_JUMBO_RX_MAX_DESC 6
387#define DEF_JUMBO_TX_RATIO 21
388
389#if tigon2FwReleaseLocal < 20001118
390/*
391 * Standard firmware and early modifications duplicate
392 * IRQ load without this flag (coal timer is never reset).
393 * Note that with this flag tx_coal should be less than
394 * time to xmit full tx ring.
395 * 400usec is not so bad for tx ring size of 128.
396 */
397#define TX_COAL_INTS_ONLY 1 /* worth it */
398#else
399/*
400 * With modified firmware, this is not necessary, but still useful.
401 */
402#define TX_COAL_INTS_ONLY 1
403#endif
404
405#define DEF_TRACE 0
406#define DEF_STAT (2 * TICKS_PER_SEC)
407
408
409static int link[ACE_MAX_MOD_PARMS];
410static int trace[ACE_MAX_MOD_PARMS];
411static int tx_coal_tick[ACE_MAX_MOD_PARMS];
412static int rx_coal_tick[ACE_MAX_MOD_PARMS];
413static int max_tx_desc[ACE_MAX_MOD_PARMS];
414static int max_rx_desc[ACE_MAX_MOD_PARMS];
415static int tx_ratio[ACE_MAX_MOD_PARMS];
416static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
417
418MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
419MODULE_LICENSE("GPL");
420MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
421
422module_param_array(link, int, NULL, 0);
423module_param_array(trace, int, NULL, 0);
424module_param_array(tx_coal_tick, int, NULL, 0);
425module_param_array(max_tx_desc, int, NULL, 0);
426module_param_array(rx_coal_tick, int, NULL, 0);
427module_param_array(max_rx_desc, int, NULL, 0);
428module_param_array(tx_ratio, int, NULL, 0);
429MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
430MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
431MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
432MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
433MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
434MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
435MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
436
437
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400438static char version[] __devinitdata =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
440 " http://home.cern.ch/~jes/gige/acenic.html\n";
441
442static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
443static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
444static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
445
Jeff Garzik7282d492006-09-13 14:30:00 -0400446static const struct ethtool_ops ace_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 .get_settings = ace_get_settings,
448 .set_settings = ace_set_settings,
449 .get_drvinfo = ace_get_drvinfo,
450};
451
452static void ace_watchdog(struct net_device *dev);
453
454static int __devinit acenic_probe_one(struct pci_dev *pdev,
455 const struct pci_device_id *id)
456{
457 struct net_device *dev;
458 struct ace_private *ap;
459 static int boards_found;
460
461 dev = alloc_etherdev(sizeof(struct ace_private));
462 if (dev == NULL) {
463 printk(KERN_ERR "acenic: Unable to allocate "
464 "net_device structure!\n");
465 return -ENOMEM;
466 }
467
468 SET_MODULE_OWNER(dev);
469 SET_NETDEV_DEV(dev, &pdev->dev);
470
471 ap = dev->priv;
472 ap->pdev = pdev;
473 ap->name = pci_name(pdev);
474
475 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
476#if ACENIC_DO_VLAN
477 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
478 dev->vlan_rx_register = ace_vlan_rx_register;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479#endif
Stephen Hemminger25805dc2007-06-01 09:44:01 -0700480
481 dev->tx_timeout = &ace_watchdog;
482 dev->watchdog_timeo = 5*HZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483
484 dev->open = &ace_open;
485 dev->stop = &ace_close;
486 dev->hard_start_xmit = &ace_start_xmit;
487 dev->get_stats = &ace_get_stats;
488 dev->set_multicast_list = &ace_set_multicast_list;
489 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
490 dev->set_mac_address = &ace_set_mac_addr;
491 dev->change_mtu = &ace_change_mtu;
492
493 /* we only display this string ONCE */
494 if (!boards_found)
495 printk(version);
496
497 if (pci_enable_device(pdev))
498 goto fail_free_netdev;
499
500 /*
501 * Enable master mode before we start playing with the
502 * pci_command word since pci_set_master() will modify
503 * it.
504 */
505 pci_set_master(pdev);
506
507 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
508
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400509 /* OpenFirmware on Mac's does not set this - DOH.. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
511 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
512 "access - was not enabled by BIOS/Firmware\n",
513 ap->name);
514 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
515 pci_write_config_word(ap->pdev, PCI_COMMAND,
516 ap->pci_command);
517 wmb();
518 }
519
520 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
521 if (ap->pci_latency <= 0x40) {
522 ap->pci_latency = 0x40;
523 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
524 }
525
526 /*
527 * Remap the regs into kernel space - this is abuse of
528 * dev->base_addr since it was means for I/O port
529 * addresses but who gives a damn.
530 */
531 dev->base_addr = pci_resource_start(pdev, 0);
532 ap->regs = ioremap(dev->base_addr, 0x4000);
533 if (!ap->regs) {
534 printk(KERN_ERR "%s: Unable to map I/O register, "
535 "AceNIC %i will be disabled.\n",
536 ap->name, boards_found);
537 goto fail_free_netdev;
538 }
539
540 switch(pdev->vendor) {
541 case PCI_VENDOR_ID_ALTEON:
542 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
543 printk(KERN_INFO "%s: Farallon PN9100-T ",
544 ap->name);
545 } else {
546 printk(KERN_INFO "%s: Alteon AceNIC ",
547 ap->name);
548 }
549 break;
550 case PCI_VENDOR_ID_3COM:
551 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
552 break;
553 case PCI_VENDOR_ID_NETGEAR:
554 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
555 break;
556 case PCI_VENDOR_ID_DEC:
557 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
558 printk(KERN_INFO "%s: Farallon PN9000-SX ",
559 ap->name);
560 break;
561 }
562 case PCI_VENDOR_ID_SGI:
563 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
564 break;
565 default:
566 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
567 break;
568 }
569
570 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
David S. Millerc6387a42006-06-20 01:21:29 -0700571 printk("irq %d\n", pdev->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
573#ifdef CONFIG_ACENIC_OMIT_TIGON_I
574 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
575 printk(KERN_ERR "%s: Driver compiled without Tigon I"
576 " support - NIC disabled\n", dev->name);
577 goto fail_uninit;
578 }
579#endif
580
581 if (ace_allocate_descriptors(dev))
582 goto fail_free_netdev;
583
584#ifdef MODULE
585 if (boards_found >= ACE_MAX_MOD_PARMS)
586 ap->board_idx = BOARD_IDX_OVERFLOW;
587 else
588 ap->board_idx = boards_found;
589#else
590 ap->board_idx = BOARD_IDX_STATIC;
591#endif
592
593 if (ace_init(dev))
594 goto fail_free_netdev;
595
596 if (register_netdev(dev)) {
597 printk(KERN_ERR "acenic: device registration failed\n");
598 goto fail_uninit;
599 }
600 ap->name = dev->name;
601
602 if (ap->pci_using_dac)
603 dev->features |= NETIF_F_HIGHDMA;
604
605 pci_set_drvdata(pdev, dev);
606
607 boards_found++;
608 return 0;
609
610 fail_uninit:
611 ace_init_cleanup(dev);
612 fail_free_netdev:
613 free_netdev(dev);
614 return -ENODEV;
615}
616
617static void __devexit acenic_remove_one(struct pci_dev *pdev)
618{
619 struct net_device *dev = pci_get_drvdata(pdev);
620 struct ace_private *ap = netdev_priv(dev);
621 struct ace_regs __iomem *regs = ap->regs;
622 short i;
623
624 unregister_netdev(dev);
625
626 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
627 if (ap->version >= 2)
628 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400629
Linus Torvalds1da177e2005-04-16 15:20:36 -0700630 /*
631 * This clears any pending interrupts
632 */
633 writel(1, &regs->Mb0Lo);
634 readl(&regs->CpuCtrl); /* flush */
635
636 /*
637 * Make sure no other CPUs are processing interrupts
638 * on the card before the buffers are being released.
639 * Otherwise one might experience some `interesting'
640 * effects.
641 *
642 * Then release the RX buffers - jumbo buffers were
643 * already released in ace_close().
644 */
645 ace_sync_irq(dev->irq);
646
647 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
648 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
649
650 if (skb) {
651 struct ring_info *ringp;
652 dma_addr_t mapping;
653
654 ringp = &ap->skb->rx_std_skbuff[i];
655 mapping = pci_unmap_addr(ringp, mapping);
656 pci_unmap_page(ap->pdev, mapping,
657 ACE_STD_BUFSIZE,
658 PCI_DMA_FROMDEVICE);
659
660 ap->rx_std_ring[i].size = 0;
661 ap->skb->rx_std_skbuff[i].skb = NULL;
662 dev_kfree_skb(skb);
663 }
664 }
665
666 if (ap->version >= 2) {
667 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
668 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
669
670 if (skb) {
671 struct ring_info *ringp;
672 dma_addr_t mapping;
673
674 ringp = &ap->skb->rx_mini_skbuff[i];
675 mapping = pci_unmap_addr(ringp,mapping);
676 pci_unmap_page(ap->pdev, mapping,
677 ACE_MINI_BUFSIZE,
678 PCI_DMA_FROMDEVICE);
679
680 ap->rx_mini_ring[i].size = 0;
681 ap->skb->rx_mini_skbuff[i].skb = NULL;
682 dev_kfree_skb(skb);
683 }
684 }
685 }
686
687 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
688 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
689 if (skb) {
690 struct ring_info *ringp;
691 dma_addr_t mapping;
692
693 ringp = &ap->skb->rx_jumbo_skbuff[i];
694 mapping = pci_unmap_addr(ringp, mapping);
695 pci_unmap_page(ap->pdev, mapping,
696 ACE_JUMBO_BUFSIZE,
697 PCI_DMA_FROMDEVICE);
698
699 ap->rx_jumbo_ring[i].size = 0;
700 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
701 dev_kfree_skb(skb);
702 }
703 }
704
705 ace_init_cleanup(dev);
706 free_netdev(dev);
707}
708
709static struct pci_driver acenic_pci_driver = {
710 .name = "acenic",
711 .id_table = acenic_pci_tbl,
712 .probe = acenic_probe_one,
713 .remove = __devexit_p(acenic_remove_one),
714};
715
716static int __init acenic_init(void)
717{
Jeff Garzik29917622006-08-19 17:48:59 -0400718 return pci_register_driver(&acenic_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719}
720
721static void __exit acenic_exit(void)
722{
723 pci_unregister_driver(&acenic_pci_driver);
724}
725
726module_init(acenic_init);
727module_exit(acenic_exit);
728
729static void ace_free_descriptors(struct net_device *dev)
730{
731 struct ace_private *ap = netdev_priv(dev);
732 int size;
733
734 if (ap->rx_std_ring != NULL) {
735 size = (sizeof(struct rx_desc) *
736 (RX_STD_RING_ENTRIES +
737 RX_JUMBO_RING_ENTRIES +
738 RX_MINI_RING_ENTRIES +
739 RX_RETURN_RING_ENTRIES));
740 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
741 ap->rx_ring_base_dma);
742 ap->rx_std_ring = NULL;
743 ap->rx_jumbo_ring = NULL;
744 ap->rx_mini_ring = NULL;
745 ap->rx_return_ring = NULL;
746 }
747 if (ap->evt_ring != NULL) {
748 size = (sizeof(struct event) * EVT_RING_ENTRIES);
749 pci_free_consistent(ap->pdev, size, ap->evt_ring,
750 ap->evt_ring_dma);
751 ap->evt_ring = NULL;
752 }
753 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
754 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
755 pci_free_consistent(ap->pdev, size, ap->tx_ring,
756 ap->tx_ring_dma);
757 }
758 ap->tx_ring = NULL;
759
760 if (ap->evt_prd != NULL) {
761 pci_free_consistent(ap->pdev, sizeof(u32),
762 (void *)ap->evt_prd, ap->evt_prd_dma);
763 ap->evt_prd = NULL;
764 }
765 if (ap->rx_ret_prd != NULL) {
766 pci_free_consistent(ap->pdev, sizeof(u32),
767 (void *)ap->rx_ret_prd,
768 ap->rx_ret_prd_dma);
769 ap->rx_ret_prd = NULL;
770 }
771 if (ap->tx_csm != NULL) {
772 pci_free_consistent(ap->pdev, sizeof(u32),
773 (void *)ap->tx_csm, ap->tx_csm_dma);
774 ap->tx_csm = NULL;
775 }
776}
777
778
779static int ace_allocate_descriptors(struct net_device *dev)
780{
781 struct ace_private *ap = netdev_priv(dev);
782 int size;
783
784 size = (sizeof(struct rx_desc) *
785 (RX_STD_RING_ENTRIES +
786 RX_JUMBO_RING_ENTRIES +
787 RX_MINI_RING_ENTRIES +
788 RX_RETURN_RING_ENTRIES));
789
790 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
791 &ap->rx_ring_base_dma);
792 if (ap->rx_std_ring == NULL)
793 goto fail;
794
795 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
796 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
797 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
798
799 size = (sizeof(struct event) * EVT_RING_ENTRIES);
800
801 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
802
803 if (ap->evt_ring == NULL)
804 goto fail;
805
806 /*
807 * Only allocate a host TX ring for the Tigon II, the Tigon I
808 * has to use PCI registers for this ;-(
809 */
810 if (!ACE_IS_TIGON_I(ap)) {
811 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
812
813 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
814 &ap->tx_ring_dma);
815
816 if (ap->tx_ring == NULL)
817 goto fail;
818 }
819
820 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
821 &ap->evt_prd_dma);
822 if (ap->evt_prd == NULL)
823 goto fail;
824
825 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
826 &ap->rx_ret_prd_dma);
827 if (ap->rx_ret_prd == NULL)
828 goto fail;
829
830 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
831 &ap->tx_csm_dma);
832 if (ap->tx_csm == NULL)
833 goto fail;
834
835 return 0;
836
837fail:
838 /* Clean up. */
839 ace_init_cleanup(dev);
840 return 1;
841}
842
843
844/*
845 * Generic cleanup handling data allocated during init. Used when the
846 * module is unloaded or if an error occurs during initialization
847 */
848static void ace_init_cleanup(struct net_device *dev)
849{
850 struct ace_private *ap;
851
852 ap = netdev_priv(dev);
853
854 ace_free_descriptors(dev);
855
856 if (ap->info)
857 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
858 ap->info, ap->info_dma);
Jesper Juhlb4558ea2005-10-28 16:53:13 -0400859 kfree(ap->skb);
860 kfree(ap->trace_buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861
862 if (dev->irq)
863 free_irq(dev->irq, dev);
864
865 iounmap(ap->regs);
866}
867
868
869/*
870 * Commands are considered to be slow.
871 */
872static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
873{
874 u32 idx;
875
876 idx = readl(&regs->CmdPrd);
877
878 writel(*(u32 *)(cmd), &regs->CmdRng[idx]);
879 idx = (idx + 1) % CMD_RING_ENTRIES;
880
881 writel(idx, &regs->CmdPrd);
882}
883
884
885static int __devinit ace_init(struct net_device *dev)
886{
887 struct ace_private *ap;
888 struct ace_regs __iomem *regs;
889 struct ace_info *info = NULL;
890 struct pci_dev *pdev;
891 unsigned long myjif;
892 u64 tmp_ptr;
893 u32 tig_ver, mac1, mac2, tmp, pci_state;
894 int board_idx, ecode = 0;
895 short i;
896 unsigned char cache_size;
897
898 ap = netdev_priv(dev);
899 regs = ap->regs;
900
901 board_idx = ap->board_idx;
902
903 /*
904 * aman@sgi.com - its useful to do a NIC reset here to
905 * address the `Firmware not running' problem subsequent
906 * to any crashes involving the NIC
907 */
908 writel(HW_RESET | (HW_RESET << 24), &regs->HostCtrl);
909 readl(&regs->HostCtrl); /* PCI write posting */
910 udelay(5);
911
912 /*
913 * Don't access any other registers before this point!
914 */
915#ifdef __BIG_ENDIAN
916 /*
917 * This will most likely need BYTE_SWAP once we switch
918 * to using __raw_writel()
919 */
920 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
921 &regs->HostCtrl);
922#else
923 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
924 &regs->HostCtrl);
925#endif
926 readl(&regs->HostCtrl); /* PCI write posting */
927
928 /*
929 * Stop the NIC CPU and clear pending interrupts
930 */
931 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
932 readl(&regs->CpuCtrl); /* PCI write posting */
933 writel(0, &regs->Mb0Lo);
934
935 tig_ver = readl(&regs->HostCtrl) >> 28;
936
937 switch(tig_ver){
938#ifndef CONFIG_ACENIC_OMIT_TIGON_I
939 case 4:
940 case 5:
941 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
942 tig_ver, tigonFwReleaseMajor, tigonFwReleaseMinor,
943 tigonFwReleaseFix);
944 writel(0, &regs->LocalCtrl);
945 ap->version = 1;
946 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
947 break;
948#endif
949 case 6:
950 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
951 tig_ver, tigon2FwReleaseMajor, tigon2FwReleaseMinor,
952 tigon2FwReleaseFix);
953 writel(readl(&regs->CpuBCtrl) | CPU_HALT, &regs->CpuBCtrl);
954 readl(&regs->CpuBCtrl); /* PCI write posting */
955 /*
956 * The SRAM bank size does _not_ indicate the amount
957 * of memory on the card, it controls the _bank_ size!
958 * Ie. a 1MB AceNIC will have two banks of 512KB.
959 */
960 writel(SRAM_BANK_512K, &regs->LocalCtrl);
961 writel(SYNC_SRAM_TIMING, &regs->MiscCfg);
962 ap->version = 2;
963 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
964 break;
965 default:
966 printk(KERN_WARNING " Unsupported Tigon version detected "
967 "(%i)\n", tig_ver);
968 ecode = -ENODEV;
969 goto init_error;
970 }
971
972 /*
973 * ModeStat _must_ be set after the SRAM settings as this change
974 * seems to corrupt the ModeStat and possible other registers.
975 * The SRAM settings survive resets and setting it to the same
976 * value a second time works as well. This is what caused the
977 * `Firmware not running' problem on the Tigon II.
978 */
979#ifdef __BIG_ENDIAN
980 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
981 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
982#else
983 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
984 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, &regs->ModeStat);
985#endif
986 readl(&regs->ModeStat); /* PCI write posting */
987
988 mac1 = 0;
989 for(i = 0; i < 4; i++) {
Eric Sesterhenn6f9d4722006-01-20 23:32:56 +0300990 int tmp;
991
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 mac1 = mac1 << 8;
993 tmp = read_eeprom_byte(dev, 0x8c+i);
994 if (tmp < 0) {
995 ecode = -EIO;
996 goto init_error;
997 } else
998 mac1 |= (tmp & 0xff);
999 }
1000 mac2 = 0;
1001 for(i = 4; i < 8; i++) {
Eric Sesterhenn6f9d4722006-01-20 23:32:56 +03001002 int tmp;
1003
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 mac2 = mac2 << 8;
1005 tmp = read_eeprom_byte(dev, 0x8c+i);
1006 if (tmp < 0) {
1007 ecode = -EIO;
1008 goto init_error;
1009 } else
1010 mac2 |= (tmp & 0xff);
1011 }
1012
1013 writel(mac1, &regs->MacAddrHi);
1014 writel(mac2, &regs->MacAddrLo);
1015
1016 printk("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
1017 (mac1 >> 8) & 0xff, mac1 & 0xff, (mac2 >> 24) &0xff,
1018 (mac2 >> 16) & 0xff, (mac2 >> 8) & 0xff, mac2 & 0xff);
1019
1020 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1021 dev->dev_addr[1] = mac1 & 0xff;
1022 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1023 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1024 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1025 dev->dev_addr[5] = mac2 & 0xff;
1026
1027 /*
1028 * Looks like this is necessary to deal with on all architectures,
1029 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1030 * Ie. having two NICs in the machine, one will have the cache
1031 * line set at boot time, the other will not.
1032 */
1033 pdev = ap->pdev;
1034 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1035 cache_size <<= 2;
1036 if (cache_size != SMP_CACHE_BYTES) {
1037 printk(KERN_INFO " PCI cache line size set incorrectly "
1038 "(%i bytes) by BIOS/FW, ", cache_size);
1039 if (cache_size > SMP_CACHE_BYTES)
1040 printk("expecting %i\n", SMP_CACHE_BYTES);
1041 else {
1042 printk("correcting to %i\n", SMP_CACHE_BYTES);
1043 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1044 SMP_CACHE_BYTES >> 2);
1045 }
1046 }
1047
1048 pci_state = readl(&regs->PciState);
1049 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1050 "latency: %i clks\n",
1051 (pci_state & PCI_32BIT) ? 32 : 64,
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001052 (pci_state & PCI_66MHZ) ? 66 : 33,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053 ap->pci_latency);
1054
1055 /*
1056 * Set the max DMA transfer size. Seems that for most systems
1057 * the performance is better when no MAX parameter is
1058 * set. However for systems enabling PCI write and invalidate,
1059 * DMA writes must be set to the L1 cache line size to get
1060 * optimal performance.
1061 *
1062 * The default is now to turn the PCI write and invalidate off
1063 * - that is what Alteon does for NT.
1064 */
1065 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1066 if (ap->version >= 2) {
1067 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1068 /*
1069 * Tuning parameters only supported for 8 cards
1070 */
1071 if (board_idx == BOARD_IDX_OVERFLOW ||
1072 dis_pci_mem_inval[board_idx]) {
1073 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1074 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1075 pci_write_config_word(pdev, PCI_COMMAND,
1076 ap->pci_command);
1077 printk(KERN_INFO " Disabling PCI memory "
1078 "write and invalidate\n");
1079 }
1080 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1081 printk(KERN_INFO " PCI memory write & invalidate "
1082 "enabled by BIOS, enabling counter measures\n");
1083
1084 switch(SMP_CACHE_BYTES) {
1085 case 16:
1086 tmp |= DMA_WRITE_MAX_16;
1087 break;
1088 case 32:
1089 tmp |= DMA_WRITE_MAX_32;
1090 break;
1091 case 64:
1092 tmp |= DMA_WRITE_MAX_64;
1093 break;
1094 case 128:
1095 tmp |= DMA_WRITE_MAX_128;
1096 break;
1097 default:
1098 printk(KERN_INFO " Cache line size %i not "
1099 "supported, PCI write and invalidate "
1100 "disabled\n", SMP_CACHE_BYTES);
1101 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1102 pci_write_config_word(pdev, PCI_COMMAND,
1103 ap->pci_command);
1104 }
1105 }
1106 }
1107
1108#ifdef __sparc__
1109 /*
1110 * On this platform, we know what the best dma settings
1111 * are. We use 64-byte maximum bursts, because if we
1112 * burst larger than the cache line size (or even cross
1113 * a 64byte boundary in a single burst) the UltraSparc
1114 * PCI controller will disconnect at 64-byte multiples.
1115 *
1116 * Read-multiple will be properly enabled above, and when
1117 * set will give the PCI controller proper hints about
1118 * prefetching.
1119 */
1120 tmp &= ~DMA_READ_WRITE_MASK;
1121 tmp |= DMA_READ_MAX_64;
1122 tmp |= DMA_WRITE_MAX_64;
1123#endif
1124#ifdef __alpha__
1125 tmp &= ~DMA_READ_WRITE_MASK;
1126 tmp |= DMA_READ_MAX_128;
1127 /*
1128 * All the docs say MUST NOT. Well, I did.
1129 * Nothing terrible happens, if we load wrong size.
1130 * Bit w&i still works better!
1131 */
1132 tmp |= DMA_WRITE_MAX_128;
1133#endif
1134 writel(tmp, &regs->PciState);
1135
1136#if 0
1137 /*
1138 * The Host PCI bus controller driver has to set FBB.
1139 * If all devices on that PCI bus support FBB, then the controller
1140 * can enable FBB support in the Host PCI Bus controller (or on
1141 * the PCI-PCI bridge if that applies).
1142 * -ggg
1143 */
1144 /*
1145 * I have received reports from people having problems when this
1146 * bit is enabled.
1147 */
1148 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1149 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1150 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1151 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1152 }
1153#endif
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001154
Linus Torvalds1da177e2005-04-16 15:20:36 -07001155 /*
1156 * Configure DMA attributes.
1157 */
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04001158 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159 ap->pci_using_dac = 1;
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04001160 } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161 ap->pci_using_dac = 0;
1162 } else {
1163 ecode = -ENODEV;
1164 goto init_error;
1165 }
1166
1167 /*
1168 * Initialize the generic info block and the command+event rings
1169 * and the control blocks for the transmit and receive rings
1170 * as they need to be setup once and for all.
1171 */
1172 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1173 &ap->info_dma))) {
1174 ecode = -EAGAIN;
1175 goto init_error;
1176 }
1177 ap->info = info;
1178
1179 /*
1180 * Get the memory for the skb rings.
1181 */
1182 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1183 ecode = -EAGAIN;
1184 goto init_error;
1185 }
1186
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001187 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188 DRV_NAME, dev);
1189 if (ecode) {
1190 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1191 DRV_NAME, pdev->irq);
1192 goto init_error;
1193 } else
1194 dev->irq = pdev->irq;
1195
1196#ifdef INDEX_DEBUG
1197 spin_lock_init(&ap->debug_lock);
1198 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1199 ap->last_std_rx = 0;
1200 ap->last_mini_rx = 0;
1201#endif
1202
1203 memset(ap->info, 0, sizeof(struct ace_info));
1204 memset(ap->skb, 0, sizeof(struct ace_skb));
1205
1206 ace_load_firmware(dev);
1207 ap->fw_running = 0;
1208
1209 tmp_ptr = ap->info_dma;
1210 writel(tmp_ptr >> 32, &regs->InfoPtrHi);
1211 writel(tmp_ptr & 0xffffffff, &regs->InfoPtrLo);
1212
1213 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1214
1215 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1216 info->evt_ctrl.flags = 0;
1217
1218 *(ap->evt_prd) = 0;
1219 wmb();
1220 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1221 writel(0, &regs->EvtCsm);
1222
1223 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1224 info->cmd_ctrl.flags = 0;
1225 info->cmd_ctrl.max_len = 0;
1226
1227 for (i = 0; i < CMD_RING_ENTRIES; i++)
1228 writel(0, &regs->CmdRng[i]);
1229
1230 writel(0, &regs->CmdPrd);
1231 writel(0, &regs->CmdCsm);
1232
1233 tmp_ptr = ap->info_dma;
1234 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1235 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1236
1237 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1238 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1239 info->rx_std_ctrl.flags =
1240 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1241
1242 memset(ap->rx_std_ring, 0,
1243 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1244
1245 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1246 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1247
1248 ap->rx_std_skbprd = 0;
1249 atomic_set(&ap->cur_rx_bufs, 0);
1250
1251 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1252 (ap->rx_ring_base_dma +
1253 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1254 info->rx_jumbo_ctrl.max_len = 0;
1255 info->rx_jumbo_ctrl.flags =
1256 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1257
1258 memset(ap->rx_jumbo_ring, 0,
1259 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1260
1261 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1262 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1263
1264 ap->rx_jumbo_skbprd = 0;
1265 atomic_set(&ap->cur_jumbo_bufs, 0);
1266
1267 memset(ap->rx_mini_ring, 0,
1268 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1269
1270 if (ap->version >= 2) {
1271 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1272 (ap->rx_ring_base_dma +
1273 (sizeof(struct rx_desc) *
1274 (RX_STD_RING_ENTRIES +
1275 RX_JUMBO_RING_ENTRIES))));
1276 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001277 info->rx_mini_ctrl.flags =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001278 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1279
1280 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1281 ap->rx_mini_ring[i].flags =
1282 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1283 } else {
1284 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1285 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1286 info->rx_mini_ctrl.max_len = 0;
1287 }
1288
1289 ap->rx_mini_skbprd = 0;
1290 atomic_set(&ap->cur_mini_bufs, 0);
1291
1292 set_aceaddr(&info->rx_return_ctrl.rngptr,
1293 (ap->rx_ring_base_dma +
1294 (sizeof(struct rx_desc) *
1295 (RX_STD_RING_ENTRIES +
1296 RX_JUMBO_RING_ENTRIES +
1297 RX_MINI_RING_ENTRIES))));
1298 info->rx_return_ctrl.flags = 0;
1299 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1300
1301 memset(ap->rx_return_ring, 0,
1302 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1303
1304 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1305 *(ap->rx_ret_prd) = 0;
1306
1307 writel(TX_RING_BASE, &regs->WinBase);
1308
1309 if (ACE_IS_TIGON_I(ap)) {
1310 ap->tx_ring = (struct tx_desc *) regs->Window;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001311 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
Linus Torvalds1da177e2005-04-16 15:20:36 -07001312 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1313 writel(0, (void __iomem *)ap->tx_ring + i * 4);
1314
1315 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1316 } else {
1317 memset(ap->tx_ring, 0,
1318 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1319
1320 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1321 }
1322
1323 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1324 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1325
1326 /*
1327 * The Tigon I does not like having the TX ring in host memory ;-(
1328 */
1329 if (!ACE_IS_TIGON_I(ap))
1330 tmp |= RCB_FLG_TX_HOST_RING;
1331#if TX_COAL_INTS_ONLY
1332 tmp |= RCB_FLG_COAL_INT_ONLY;
1333#endif
1334 info->tx_ctrl.flags = tmp;
1335
1336 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1337
1338 /*
1339 * Potential item for tuning parameter
1340 */
1341#if 0 /* NO */
1342 writel(DMA_THRESH_16W, &regs->DmaReadCfg);
1343 writel(DMA_THRESH_16W, &regs->DmaWriteCfg);
1344#else
1345 writel(DMA_THRESH_8W, &regs->DmaReadCfg);
1346 writel(DMA_THRESH_8W, &regs->DmaWriteCfg);
1347#endif
1348
1349 writel(0, &regs->MaskInt);
1350 writel(1, &regs->IfIdx);
1351#if 0
1352 /*
1353 * McKinley boxes do not like us fiddling with AssistState
1354 * this early
1355 */
1356 writel(1, &regs->AssistState);
1357#endif
1358
1359 writel(DEF_STAT, &regs->TuneStatTicks);
1360 writel(DEF_TRACE, &regs->TuneTrace);
1361
1362 ace_set_rxtx_parms(dev, 0);
1363
1364 if (board_idx == BOARD_IDX_OVERFLOW) {
1365 printk(KERN_WARNING "%s: more than %i NICs detected, "
1366 "ignoring module parameters!\n",
1367 ap->name, ACE_MAX_MOD_PARMS);
1368 } else if (board_idx >= 0) {
1369 if (tx_coal_tick[board_idx])
1370 writel(tx_coal_tick[board_idx],
1371 &regs->TuneTxCoalTicks);
1372 if (max_tx_desc[board_idx])
1373 writel(max_tx_desc[board_idx], &regs->TuneMaxTxDesc);
1374
1375 if (rx_coal_tick[board_idx])
1376 writel(rx_coal_tick[board_idx],
1377 &regs->TuneRxCoalTicks);
1378 if (max_rx_desc[board_idx])
1379 writel(max_rx_desc[board_idx], &regs->TuneMaxRxDesc);
1380
1381 if (trace[board_idx])
1382 writel(trace[board_idx], &regs->TuneTrace);
1383
1384 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1385 writel(tx_ratio[board_idx], &regs->TxBufRat);
1386 }
1387
1388 /*
1389 * Default link parameters
1390 */
1391 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1392 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1393 if(ap->version >= 2)
1394 tmp |= LNK_TX_FLOW_CTL_Y;
1395
1396 /*
1397 * Override link default parameters
1398 */
1399 if ((board_idx >= 0) && link[board_idx]) {
1400 int option = link[board_idx];
1401
1402 tmp = LNK_ENABLE;
1403
1404 if (option & 0x01) {
1405 printk(KERN_INFO "%s: Setting half duplex link\n",
1406 ap->name);
1407 tmp &= ~LNK_FULL_DUPLEX;
1408 }
1409 if (option & 0x02)
1410 tmp &= ~LNK_NEGOTIATE;
1411 if (option & 0x10)
1412 tmp |= LNK_10MB;
1413 if (option & 0x20)
1414 tmp |= LNK_100MB;
1415 if (option & 0x40)
1416 tmp |= LNK_1000MB;
1417 if ((option & 0x70) == 0) {
1418 printk(KERN_WARNING "%s: No media speed specified, "
1419 "forcing auto negotiation\n", ap->name);
1420 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1421 LNK_100MB | LNK_10MB;
1422 }
1423 if ((option & 0x100) == 0)
1424 tmp |= LNK_NEG_FCTL;
1425 else
1426 printk(KERN_INFO "%s: Disabling flow control "
1427 "negotiation\n", ap->name);
1428 if (option & 0x200)
1429 tmp |= LNK_RX_FLOW_CTL_Y;
1430 if ((option & 0x400) && (ap->version >= 2)) {
1431 printk(KERN_INFO "%s: Enabling TX flow control\n",
1432 ap->name);
1433 tmp |= LNK_TX_FLOW_CTL_Y;
1434 }
1435 }
1436
1437 ap->link = tmp;
1438 writel(tmp, &regs->TuneLink);
1439 if (ap->version >= 2)
1440 writel(tmp, &regs->TuneFastLink);
1441
1442 if (ACE_IS_TIGON_I(ap))
1443 writel(tigonFwStartAddr, &regs->Pc);
1444 if (ap->version == 2)
1445 writel(tigon2FwStartAddr, &regs->Pc);
1446
1447 writel(0, &regs->Mb0Lo);
1448
1449 /*
1450 * Set tx_csm before we start receiving interrupts, otherwise
1451 * the interrupt handler might think it is supposed to process
1452 * tx ints before we are up and running, which may cause a null
1453 * pointer access in the int handler.
1454 */
1455 ap->cur_rx = 0;
1456 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1457
1458 wmb();
1459 ace_set_txprd(regs, ap, 0);
1460 writel(0, &regs->RxRetCsm);
1461
1462 /*
1463 * Zero the stats before starting the interface
1464 */
1465 memset(&ap->stats, 0, sizeof(ap->stats));
1466
1467 /*
1468 * Enable DMA engine now.
1469 * If we do this sooner, Mckinley box pukes.
1470 * I assume it's because Tigon II DMA engine wants to check
1471 * *something* even before the CPU is started.
1472 */
1473 writel(1, &regs->AssistState); /* enable DMA */
1474
1475 /*
1476 * Start the NIC CPU
1477 */
1478 writel(readl(&regs->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), &regs->CpuCtrl);
1479 readl(&regs->CpuCtrl);
1480
1481 /*
1482 * Wait for the firmware to spin up - max 3 seconds.
1483 */
1484 myjif = jiffies + 3 * HZ;
1485 while (time_before(jiffies, myjif) && !ap->fw_running)
1486 cpu_relax();
1487
1488 if (!ap->fw_running) {
1489 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1490
1491 ace_dump_trace(ap);
1492 writel(readl(&regs->CpuCtrl) | CPU_HALT, &regs->CpuCtrl);
1493 readl(&regs->CpuCtrl);
1494
1495 /* aman@sgi.com - account for badly behaving firmware/NIC:
1496 * - have observed that the NIC may continue to generate
1497 * interrupts for some reason; attempt to stop it - halt
1498 * second CPU for Tigon II cards, and also clear Mb0
1499 * - if we're a module, we'll fail to load if this was
1500 * the only GbE card in the system => if the kernel does
1501 * see an interrupt from the NIC, code to handle it is
1502 * gone and OOps! - so free_irq also
1503 */
1504 if (ap->version >= 2)
1505 writel(readl(&regs->CpuBCtrl) | CPU_HALT,
1506 &regs->CpuBCtrl);
1507 writel(0, &regs->Mb0Lo);
1508 readl(&regs->Mb0Lo);
1509
1510 ecode = -EBUSY;
1511 goto init_error;
1512 }
1513
1514 /*
1515 * We load the ring here as there seem to be no way to tell the
1516 * firmware to wipe the ring without re-initializing it.
1517 */
1518 if (!test_and_set_bit(0, &ap->std_refill_busy))
1519 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1520 else
1521 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1522 ap->name);
1523 if (ap->version >= 2) {
1524 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1525 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1526 else
1527 printk(KERN_ERR "%s: Someone is busy refilling "
1528 "the RX mini ring\n", ap->name);
1529 }
1530 return 0;
1531
1532 init_error:
1533 ace_init_cleanup(dev);
1534 return ecode;
1535}
1536
1537
1538static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1539{
1540 struct ace_private *ap = netdev_priv(dev);
1541 struct ace_regs __iomem *regs = ap->regs;
1542 int board_idx = ap->board_idx;
1543
1544 if (board_idx >= 0) {
1545 if (!jumbo) {
1546 if (!tx_coal_tick[board_idx])
1547 writel(DEF_TX_COAL, &regs->TuneTxCoalTicks);
1548 if (!max_tx_desc[board_idx])
1549 writel(DEF_TX_MAX_DESC, &regs->TuneMaxTxDesc);
1550 if (!rx_coal_tick[board_idx])
1551 writel(DEF_RX_COAL, &regs->TuneRxCoalTicks);
1552 if (!max_rx_desc[board_idx])
1553 writel(DEF_RX_MAX_DESC, &regs->TuneMaxRxDesc);
1554 if (!tx_ratio[board_idx])
1555 writel(DEF_TX_RATIO, &regs->TxBufRat);
1556 } else {
1557 if (!tx_coal_tick[board_idx])
1558 writel(DEF_JUMBO_TX_COAL,
1559 &regs->TuneTxCoalTicks);
1560 if (!max_tx_desc[board_idx])
1561 writel(DEF_JUMBO_TX_MAX_DESC,
1562 &regs->TuneMaxTxDesc);
1563 if (!rx_coal_tick[board_idx])
1564 writel(DEF_JUMBO_RX_COAL,
1565 &regs->TuneRxCoalTicks);
1566 if (!max_rx_desc[board_idx])
1567 writel(DEF_JUMBO_RX_MAX_DESC,
1568 &regs->TuneMaxRxDesc);
1569 if (!tx_ratio[board_idx])
1570 writel(DEF_JUMBO_TX_RATIO, &regs->TxBufRat);
1571 }
1572 }
1573}
1574
1575
1576static void ace_watchdog(struct net_device *data)
1577{
1578 struct net_device *dev = data;
1579 struct ace_private *ap = netdev_priv(dev);
1580 struct ace_regs __iomem *regs = ap->regs;
1581
1582 /*
1583 * We haven't received a stats update event for more than 2.5
1584 * seconds and there is data in the transmit queue, thus we
1585 * asume the card is stuck.
1586 */
1587 if (*ap->tx_csm != ap->tx_ret_csm) {
1588 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1589 dev->name, (unsigned int)readl(&regs->HostCtrl));
1590 /* This can happen due to ieee flow control. */
1591 } else {
1592 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1593 dev->name);
1594#if 0
1595 netif_wake_queue(dev);
1596#endif
1597 }
1598}
1599
1600
1601static void ace_tasklet(unsigned long dev)
1602{
1603 struct ace_private *ap = netdev_priv((struct net_device *)dev);
1604 int cur_size;
1605
1606 cur_size = atomic_read(&ap->cur_rx_bufs);
1607 if ((cur_size < RX_LOW_STD_THRES) &&
1608 !test_and_set_bit(0, &ap->std_refill_busy)) {
1609#ifdef DEBUG
1610 printk("refilling buffers (current %i)\n", cur_size);
1611#endif
1612 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1613 }
1614
1615 if (ap->version >= 2) {
1616 cur_size = atomic_read(&ap->cur_mini_bufs);
1617 if ((cur_size < RX_LOW_MINI_THRES) &&
1618 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1619#ifdef DEBUG
1620 printk("refilling mini buffers (current %i)\n",
1621 cur_size);
1622#endif
1623 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1624 }
1625 }
1626
1627 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1628 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1629 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1630#ifdef DEBUG
1631 printk("refilling jumbo buffers (current %i)\n", cur_size);
1632#endif
1633 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1634 }
1635 ap->tasklet_pending = 0;
1636}
1637
1638
1639/*
1640 * Copy the contents of the NIC's trace buffer to kernel memory.
1641 */
1642static void ace_dump_trace(struct ace_private *ap)
1643{
1644#if 0
1645 if (!ap->trace_buf)
1646 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1647 return;
1648#endif
1649}
1650
1651
1652/*
1653 * Load the standard rx ring.
1654 *
1655 * Loading rings is safe without holding the spin lock since this is
1656 * done only before the device is enabled, thus no interrupts are
1657 * generated and by the interrupt handler/tasklet handler.
1658 */
1659static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1660{
1661 struct ace_regs __iomem *regs = ap->regs;
1662 short i, idx;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001663
Linus Torvalds1da177e2005-04-16 15:20:36 -07001664
1665 prefetchw(&ap->cur_rx_bufs);
1666
1667 idx = ap->rx_std_skbprd;
1668
1669 for (i = 0; i < nr_bufs; i++) {
1670 struct sk_buff *skb;
1671 struct rx_desc *rd;
1672 dma_addr_t mapping;
1673
1674 skb = alloc_skb(ACE_STD_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1675 if (!skb)
1676 break;
1677
1678 skb_reserve(skb, NET_IP_ALIGN);
1679 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1680 offset_in_page(skb->data),
1681 ACE_STD_BUFSIZE,
1682 PCI_DMA_FROMDEVICE);
1683 ap->skb->rx_std_skbuff[idx].skb = skb;
1684 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1685 mapping, mapping);
1686
1687 rd = &ap->rx_std_ring[idx];
1688 set_aceaddr(&rd->addr, mapping);
1689 rd->size = ACE_STD_BUFSIZE;
1690 rd->idx = idx;
1691 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1692 }
1693
1694 if (!i)
1695 goto error_out;
1696
1697 atomic_add(i, &ap->cur_rx_bufs);
1698 ap->rx_std_skbprd = idx;
1699
1700 if (ACE_IS_TIGON_I(ap)) {
1701 struct cmd cmd;
1702 cmd.evt = C_SET_RX_PRD_IDX;
1703 cmd.code = 0;
1704 cmd.idx = ap->rx_std_skbprd;
1705 ace_issue_cmd(regs, &cmd);
1706 } else {
1707 writel(idx, &regs->RxStdPrd);
1708 wmb();
1709 }
1710
1711 out:
1712 clear_bit(0, &ap->std_refill_busy);
1713 return;
1714
1715 error_out:
1716 printk(KERN_INFO "Out of memory when allocating "
1717 "standard receive buffers\n");
1718 goto out;
1719}
1720
1721
1722static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1723{
1724 struct ace_regs __iomem *regs = ap->regs;
1725 short i, idx;
1726
1727 prefetchw(&ap->cur_mini_bufs);
1728
1729 idx = ap->rx_mini_skbprd;
1730 for (i = 0; i < nr_bufs; i++) {
1731 struct sk_buff *skb;
1732 struct rx_desc *rd;
1733 dma_addr_t mapping;
1734
1735 skb = alloc_skb(ACE_MINI_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1736 if (!skb)
1737 break;
1738
1739 skb_reserve(skb, NET_IP_ALIGN);
1740 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1741 offset_in_page(skb->data),
1742 ACE_MINI_BUFSIZE,
1743 PCI_DMA_FROMDEVICE);
1744 ap->skb->rx_mini_skbuff[idx].skb = skb;
1745 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1746 mapping, mapping);
1747
1748 rd = &ap->rx_mini_ring[idx];
1749 set_aceaddr(&rd->addr, mapping);
1750 rd->size = ACE_MINI_BUFSIZE;
1751 rd->idx = idx;
1752 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1753 }
1754
1755 if (!i)
1756 goto error_out;
1757
1758 atomic_add(i, &ap->cur_mini_bufs);
1759
1760 ap->rx_mini_skbprd = idx;
1761
1762 writel(idx, &regs->RxMiniPrd);
1763 wmb();
1764
1765 out:
1766 clear_bit(0, &ap->mini_refill_busy);
1767 return;
1768 error_out:
1769 printk(KERN_INFO "Out of memory when allocating "
1770 "mini receive buffers\n");
1771 goto out;
1772}
1773
1774
1775/*
1776 * Load the jumbo rx ring, this may happen at any time if the MTU
1777 * is changed to a value > 1500.
1778 */
1779static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1780{
1781 struct ace_regs __iomem *regs = ap->regs;
1782 short i, idx;
1783
1784 idx = ap->rx_jumbo_skbprd;
1785
1786 for (i = 0; i < nr_bufs; i++) {
1787 struct sk_buff *skb;
1788 struct rx_desc *rd;
1789 dma_addr_t mapping;
1790
1791 skb = alloc_skb(ACE_JUMBO_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1792 if (!skb)
1793 break;
1794
1795 skb_reserve(skb, NET_IP_ALIGN);
1796 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1797 offset_in_page(skb->data),
1798 ACE_JUMBO_BUFSIZE,
1799 PCI_DMA_FROMDEVICE);
1800 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1801 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1802 mapping, mapping);
1803
1804 rd = &ap->rx_jumbo_ring[idx];
1805 set_aceaddr(&rd->addr, mapping);
1806 rd->size = ACE_JUMBO_BUFSIZE;
1807 rd->idx = idx;
1808 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1809 }
1810
1811 if (!i)
1812 goto error_out;
1813
1814 atomic_add(i, &ap->cur_jumbo_bufs);
1815 ap->rx_jumbo_skbprd = idx;
1816
1817 if (ACE_IS_TIGON_I(ap)) {
1818 struct cmd cmd;
1819 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1820 cmd.code = 0;
1821 cmd.idx = ap->rx_jumbo_skbprd;
1822 ace_issue_cmd(regs, &cmd);
1823 } else {
1824 writel(idx, &regs->RxJumboPrd);
1825 wmb();
1826 }
1827
1828 out:
1829 clear_bit(0, &ap->jumbo_refill_busy);
1830 return;
1831 error_out:
1832 if (net_ratelimit())
1833 printk(KERN_INFO "Out of memory when allocating "
1834 "jumbo receive buffers\n");
1835 goto out;
1836}
1837
1838
1839/*
1840 * All events are considered to be slow (RX/TX ints do not generate
1841 * events) and are handled here, outside the main interrupt handler,
1842 * to reduce the size of the handler.
1843 */
1844static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1845{
1846 struct ace_private *ap;
1847
1848 ap = netdev_priv(dev);
1849
1850 while (evtcsm != evtprd) {
1851 switch (ap->evt_ring[evtcsm].evt) {
1852 case E_FW_RUNNING:
1853 printk(KERN_INFO "%s: Firmware up and running\n",
1854 ap->name);
1855 ap->fw_running = 1;
1856 wmb();
1857 break;
1858 case E_STATS_UPDATED:
1859 break;
1860 case E_LNK_STATE:
1861 {
1862 u16 code = ap->evt_ring[evtcsm].code;
1863 switch (code) {
1864 case E_C_LINK_UP:
1865 {
1866 u32 state = readl(&ap->regs->GigLnkState);
1867 printk(KERN_WARNING "%s: Optical link UP "
1868 "(%s Duplex, Flow Control: %s%s)\n",
1869 ap->name,
1870 state & LNK_FULL_DUPLEX ? "Full":"Half",
1871 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1872 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1873 break;
1874 }
1875 case E_C_LINK_DOWN:
1876 printk(KERN_WARNING "%s: Optical link DOWN\n",
1877 ap->name);
1878 break;
1879 case E_C_LINK_10_100:
1880 printk(KERN_WARNING "%s: 10/100BaseT link "
1881 "UP\n", ap->name);
1882 break;
1883 default:
1884 printk(KERN_ERR "%s: Unknown optical link "
1885 "state %02x\n", ap->name, code);
1886 }
1887 break;
1888 }
1889 case E_ERROR:
1890 switch(ap->evt_ring[evtcsm].code) {
1891 case E_C_ERR_INVAL_CMD:
1892 printk(KERN_ERR "%s: invalid command error\n",
1893 ap->name);
1894 break;
1895 case E_C_ERR_UNIMP_CMD:
1896 printk(KERN_ERR "%s: unimplemented command "
1897 "error\n", ap->name);
1898 break;
1899 case E_C_ERR_BAD_CFG:
1900 printk(KERN_ERR "%s: bad config error\n",
1901 ap->name);
1902 break;
1903 default:
1904 printk(KERN_ERR "%s: unknown error %02x\n",
1905 ap->name, ap->evt_ring[evtcsm].code);
1906 }
1907 break;
1908 case E_RESET_JUMBO_RNG:
1909 {
1910 int i;
1911 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1912 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1913 ap->rx_jumbo_ring[i].size = 0;
1914 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1915 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1916 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1917 }
1918 }
1919
1920 if (ACE_IS_TIGON_I(ap)) {
1921 struct cmd cmd;
1922 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1923 cmd.code = 0;
1924 cmd.idx = 0;
1925 ace_issue_cmd(ap->regs, &cmd);
1926 } else {
1927 writel(0, &((ap->regs)->RxJumboPrd));
1928 wmb();
1929 }
1930
1931 ap->jumbo = 0;
1932 ap->rx_jumbo_skbprd = 0;
1933 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1934 ap->name);
1935 clear_bit(0, &ap->jumbo_refill_busy);
1936 break;
1937 }
1938 default:
1939 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1940 ap->name, ap->evt_ring[evtcsm].evt);
1941 }
1942 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1943 }
1944
1945 return evtcsm;
1946}
1947
1948
1949static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1950{
1951 struct ace_private *ap = netdev_priv(dev);
1952 u32 idx;
1953 int mini_count = 0, std_count = 0;
1954
1955 idx = rxretcsm;
1956
1957 prefetchw(&ap->cur_rx_bufs);
1958 prefetchw(&ap->cur_mini_bufs);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001959
Linus Torvalds1da177e2005-04-16 15:20:36 -07001960 while (idx != rxretprd) {
1961 struct ring_info *rip;
1962 struct sk_buff *skb;
1963 struct rx_desc *rxdesc, *retdesc;
1964 u32 skbidx;
1965 int bd_flags, desc_type, mapsize;
1966 u16 csum;
1967
1968
1969 /* make sure the rx descriptor isn't read before rxretprd */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001970 if (idx == rxretcsm)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001971 rmb();
1972
1973 retdesc = &ap->rx_return_ring[idx];
1974 skbidx = retdesc->idx;
1975 bd_flags = retdesc->flags;
1976 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1977
1978 switch(desc_type) {
1979 /*
1980 * Normal frames do not have any flags set
1981 *
1982 * Mini and normal frames arrive frequently,
1983 * so use a local counter to avoid doing
1984 * atomic operations for each packet arriving.
1985 */
1986 case 0:
1987 rip = &ap->skb->rx_std_skbuff[skbidx];
1988 mapsize = ACE_STD_BUFSIZE;
1989 rxdesc = &ap->rx_std_ring[skbidx];
1990 std_count++;
1991 break;
1992 case BD_FLG_JUMBO:
1993 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1994 mapsize = ACE_JUMBO_BUFSIZE;
1995 rxdesc = &ap->rx_jumbo_ring[skbidx];
1996 atomic_dec(&ap->cur_jumbo_bufs);
1997 break;
1998 case BD_FLG_MINI:
1999 rip = &ap->skb->rx_mini_skbuff[skbidx];
2000 mapsize = ACE_MINI_BUFSIZE;
2001 rxdesc = &ap->rx_mini_ring[skbidx];
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002002 mini_count++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002003 break;
2004 default:
2005 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2006 "returned by NIC\n", dev->name,
2007 retdesc->flags);
2008 goto error;
2009 }
2010
2011 skb = rip->skb;
2012 rip->skb = NULL;
2013 pci_unmap_page(ap->pdev,
2014 pci_unmap_addr(rip, mapping),
2015 mapsize,
2016 PCI_DMA_FROMDEVICE);
2017 skb_put(skb, retdesc->size);
2018
2019 /*
2020 * Fly baby, fly!
2021 */
2022 csum = retdesc->tcp_udp_csum;
2023
Linus Torvalds1da177e2005-04-16 15:20:36 -07002024 skb->protocol = eth_type_trans(skb, dev);
2025
2026 /*
2027 * Instead of forcing the poor tigon mips cpu to calculate
2028 * pseudo hdr checksum, we do this ourselves.
2029 */
2030 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2031 skb->csum = htons(csum);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002032 skb->ip_summed = CHECKSUM_COMPLETE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002033 } else {
2034 skb->ip_summed = CHECKSUM_NONE;
2035 }
2036
2037 /* send it up */
2038#if ACENIC_DO_VLAN
2039 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2040 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2041 } else
2042#endif
2043 netif_rx(skb);
2044
2045 dev->last_rx = jiffies;
2046 ap->stats.rx_packets++;
2047 ap->stats.rx_bytes += retdesc->size;
2048
2049 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2050 }
2051
2052 atomic_sub(std_count, &ap->cur_rx_bufs);
2053 if (!ACE_IS_TIGON_I(ap))
2054 atomic_sub(mini_count, &ap->cur_mini_bufs);
2055
2056 out:
2057 /*
2058 * According to the documentation RxRetCsm is obsolete with
2059 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2060 */
2061 if (ACE_IS_TIGON_I(ap)) {
2062 writel(idx, &ap->regs->RxRetCsm);
2063 }
2064 ap->cur_rx = idx;
2065
2066 return;
2067 error:
2068 idx = rxretprd;
2069 goto out;
2070}
2071
2072
2073static inline void ace_tx_int(struct net_device *dev,
2074 u32 txcsm, u32 idx)
2075{
2076 struct ace_private *ap = netdev_priv(dev);
2077
2078 do {
2079 struct sk_buff *skb;
2080 dma_addr_t mapping;
2081 struct tx_ring_info *info;
2082
2083 info = ap->skb->tx_skbuff + idx;
2084 skb = info->skb;
2085 mapping = pci_unmap_addr(info, mapping);
2086
2087 if (mapping) {
2088 pci_unmap_page(ap->pdev, mapping,
2089 pci_unmap_len(info, maplen),
2090 PCI_DMA_TODEVICE);
2091 pci_unmap_addr_set(info, mapping, 0);
2092 }
2093
2094 if (skb) {
2095 ap->stats.tx_packets++;
2096 ap->stats.tx_bytes += skb->len;
2097 dev_kfree_skb_irq(skb);
2098 info->skb = NULL;
2099 }
2100
2101 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2102 } while (idx != txcsm);
2103
2104 if (netif_queue_stopped(dev))
2105 netif_wake_queue(dev);
2106
2107 wmb();
2108 ap->tx_ret_csm = txcsm;
2109
2110 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2111 *
2112 * We could try to make it before. In this case we would get
2113 * the following race condition: hard_start_xmit on other cpu
2114 * enters after we advanced tx_ret_csm and fills space,
2115 * which we have just freed, so that we make illegal device wakeup.
2116 * There is no good way to workaround this (at entry
2117 * to ace_start_xmit detects this condition and prevents
2118 * ring corruption, but it is not a good workaround.)
2119 *
2120 * When tx_ret_csm is advanced after, we wake up device _only_
2121 * if we really have some space in ring (though the core doing
2122 * hard_start_xmit can see full ring for some period and has to
2123 * synchronize.) Superb.
2124 * BUT! We get another subtle race condition. hard_start_xmit
2125 * may think that ring is full between wakeup and advancing
2126 * tx_ret_csm and will stop device instantly! It is not so bad.
2127 * We are guaranteed that there is something in ring, so that
2128 * the next irq will resume transmission. To speedup this we could
2129 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2130 * (see ace_start_xmit).
2131 *
2132 * Well, this dilemma exists in all lock-free devices.
2133 * We, following scheme used in drivers by Donald Becker,
2134 * select the least dangerous.
2135 * --ANK
2136 */
2137}
2138
2139
David Howells7d12e782006-10-05 14:55:46 +01002140static irqreturn_t ace_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002141{
2142 struct net_device *dev = (struct net_device *)dev_id;
2143 struct ace_private *ap = netdev_priv(dev);
2144 struct ace_regs __iomem *regs = ap->regs;
2145 u32 idx;
2146 u32 txcsm, rxretcsm, rxretprd;
2147 u32 evtcsm, evtprd;
2148
2149 /*
2150 * In case of PCI shared interrupts or spurious interrupts,
2151 * we want to make sure it is actually our interrupt before
2152 * spending any time in here.
2153 */
2154 if (!(readl(&regs->HostCtrl) & IN_INT))
2155 return IRQ_NONE;
2156
2157 /*
2158 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2159 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2160 * writel(0, &regs->Mb0Lo).
2161 *
2162 * "IRQ avoidance" recommended in docs applies to IRQs served
2163 * threads and it is wrong even for that case.
2164 */
2165 writel(0, &regs->Mb0Lo);
2166 readl(&regs->Mb0Lo);
2167
2168 /*
2169 * There is no conflict between transmit handling in
2170 * start_xmit and receive processing, thus there is no reason
2171 * to take a spin lock for RX handling. Wait until we start
2172 * working on the other stuff - hey we don't need a spin lock
2173 * anymore.
2174 */
2175 rxretprd = *ap->rx_ret_prd;
2176 rxretcsm = ap->cur_rx;
2177
2178 if (rxretprd != rxretcsm)
2179 ace_rx_int(dev, rxretprd, rxretcsm);
2180
2181 txcsm = *ap->tx_csm;
2182 idx = ap->tx_ret_csm;
2183
2184 if (txcsm != idx) {
2185 /*
2186 * If each skb takes only one descriptor this check degenerates
2187 * to identity, because new space has just been opened.
2188 * But if skbs are fragmented we must check that this index
2189 * update releases enough of space, otherwise we just
2190 * wait for device to make more work.
2191 */
2192 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2193 ace_tx_int(dev, txcsm, idx);
2194 }
2195
2196 evtcsm = readl(&regs->EvtCsm);
2197 evtprd = *ap->evt_prd;
2198
2199 if (evtcsm != evtprd) {
2200 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2201 writel(evtcsm, &regs->EvtCsm);
2202 }
2203
2204 /*
2205 * This has to go last in the interrupt handler and run with
2206 * the spin lock released ... what lock?
2207 */
2208 if (netif_running(dev)) {
2209 int cur_size;
2210 int run_tasklet = 0;
2211
2212 cur_size = atomic_read(&ap->cur_rx_bufs);
2213 if (cur_size < RX_LOW_STD_THRES) {
2214 if ((cur_size < RX_PANIC_STD_THRES) &&
2215 !test_and_set_bit(0, &ap->std_refill_busy)) {
2216#ifdef DEBUG
2217 printk("low on std buffers %i\n", cur_size);
2218#endif
2219 ace_load_std_rx_ring(ap,
2220 RX_RING_SIZE - cur_size);
2221 } else
2222 run_tasklet = 1;
2223 }
2224
2225 if (!ACE_IS_TIGON_I(ap)) {
2226 cur_size = atomic_read(&ap->cur_mini_bufs);
2227 if (cur_size < RX_LOW_MINI_THRES) {
2228 if ((cur_size < RX_PANIC_MINI_THRES) &&
2229 !test_and_set_bit(0,
2230 &ap->mini_refill_busy)) {
2231#ifdef DEBUG
2232 printk("low on mini buffers %i\n",
2233 cur_size);
2234#endif
2235 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2236 } else
2237 run_tasklet = 1;
2238 }
2239 }
2240
2241 if (ap->jumbo) {
2242 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2243 if (cur_size < RX_LOW_JUMBO_THRES) {
2244 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2245 !test_and_set_bit(0,
2246 &ap->jumbo_refill_busy)){
2247#ifdef DEBUG
2248 printk("low on jumbo buffers %i\n",
2249 cur_size);
2250#endif
2251 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2252 } else
2253 run_tasklet = 1;
2254 }
2255 }
2256 if (run_tasklet && !ap->tasklet_pending) {
2257 ap->tasklet_pending = 1;
2258 tasklet_schedule(&ap->ace_tasklet);
2259 }
2260 }
2261
2262 return IRQ_HANDLED;
2263}
2264
2265
2266#if ACENIC_DO_VLAN
2267static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2268{
2269 struct ace_private *ap = netdev_priv(dev);
2270 unsigned long flags;
2271
2272 local_irq_save(flags);
2273 ace_mask_irq(dev);
2274
2275 ap->vlgrp = grp;
2276
2277 ace_unmask_irq(dev);
2278 local_irq_restore(flags);
2279}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002280#endif /* ACENIC_DO_VLAN */
2281
2282
2283static int ace_open(struct net_device *dev)
2284{
2285 struct ace_private *ap = netdev_priv(dev);
2286 struct ace_regs __iomem *regs = ap->regs;
2287 struct cmd cmd;
2288
2289 if (!(ap->fw_running)) {
2290 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2291 return -EBUSY;
2292 }
2293
2294 writel(dev->mtu + ETH_HLEN + 4, &regs->IfMtu);
2295
2296 cmd.evt = C_CLEAR_STATS;
2297 cmd.code = 0;
2298 cmd.idx = 0;
2299 ace_issue_cmd(regs, &cmd);
2300
2301 cmd.evt = C_HOST_STATE;
2302 cmd.code = C_C_STACK_UP;
2303 cmd.idx = 0;
2304 ace_issue_cmd(regs, &cmd);
2305
2306 if (ap->jumbo &&
2307 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2308 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2309
2310 if (dev->flags & IFF_PROMISC) {
2311 cmd.evt = C_SET_PROMISC_MODE;
2312 cmd.code = C_C_PROMISC_ENABLE;
2313 cmd.idx = 0;
2314 ace_issue_cmd(regs, &cmd);
2315
2316 ap->promisc = 1;
2317 }else
2318 ap->promisc = 0;
2319 ap->mcast_all = 0;
2320
2321#if 0
2322 cmd.evt = C_LNK_NEGOTIATION;
2323 cmd.code = 0;
2324 cmd.idx = 0;
2325 ace_issue_cmd(regs, &cmd);
2326#endif
2327
2328 netif_start_queue(dev);
2329
2330 /*
2331 * Setup the bottom half rx ring refill handler
2332 */
2333 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2334 return 0;
2335}
2336
2337
2338static int ace_close(struct net_device *dev)
2339{
2340 struct ace_private *ap = netdev_priv(dev);
2341 struct ace_regs __iomem *regs = ap->regs;
2342 struct cmd cmd;
2343 unsigned long flags;
2344 short i;
2345
2346 /*
2347 * Without (or before) releasing irq and stopping hardware, this
2348 * is an absolute non-sense, by the way. It will be reset instantly
2349 * by the first irq.
2350 */
2351 netif_stop_queue(dev);
2352
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002353
Linus Torvalds1da177e2005-04-16 15:20:36 -07002354 if (ap->promisc) {
2355 cmd.evt = C_SET_PROMISC_MODE;
2356 cmd.code = C_C_PROMISC_DISABLE;
2357 cmd.idx = 0;
2358 ace_issue_cmd(regs, &cmd);
2359 ap->promisc = 0;
2360 }
2361
2362 cmd.evt = C_HOST_STATE;
2363 cmd.code = C_C_STACK_DOWN;
2364 cmd.idx = 0;
2365 ace_issue_cmd(regs, &cmd);
2366
2367 tasklet_kill(&ap->ace_tasklet);
2368
2369 /*
2370 * Make sure one CPU is not processing packets while
2371 * buffers are being released by another.
2372 */
2373
2374 local_irq_save(flags);
2375 ace_mask_irq(dev);
2376
2377 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2378 struct sk_buff *skb;
2379 dma_addr_t mapping;
2380 struct tx_ring_info *info;
2381
2382 info = ap->skb->tx_skbuff + i;
2383 skb = info->skb;
2384 mapping = pci_unmap_addr(info, mapping);
2385
2386 if (mapping) {
2387 if (ACE_IS_TIGON_I(ap)) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002388 struct tx_desc __iomem *tx
Linus Torvalds1da177e2005-04-16 15:20:36 -07002389 = (struct tx_desc __iomem *) &ap->tx_ring[i];
2390 writel(0, &tx->addr.addrhi);
2391 writel(0, &tx->addr.addrlo);
2392 writel(0, &tx->flagsize);
2393 } else
2394 memset(ap->tx_ring + i, 0,
2395 sizeof(struct tx_desc));
2396 pci_unmap_page(ap->pdev, mapping,
2397 pci_unmap_len(info, maplen),
2398 PCI_DMA_TODEVICE);
2399 pci_unmap_addr_set(info, mapping, 0);
2400 }
2401 if (skb) {
2402 dev_kfree_skb(skb);
2403 info->skb = NULL;
2404 }
2405 }
2406
2407 if (ap->jumbo) {
2408 cmd.evt = C_RESET_JUMBO_RNG;
2409 cmd.code = 0;
2410 cmd.idx = 0;
2411 ace_issue_cmd(regs, &cmd);
2412 }
2413
2414 ace_unmask_irq(dev);
2415 local_irq_restore(flags);
2416
2417 return 0;
2418}
2419
2420
2421static inline dma_addr_t
2422ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2423 struct sk_buff *tail, u32 idx)
2424{
2425 dma_addr_t mapping;
2426 struct tx_ring_info *info;
2427
2428 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2429 offset_in_page(skb->data),
2430 skb->len, PCI_DMA_TODEVICE);
2431
2432 info = ap->skb->tx_skbuff + idx;
2433 info->skb = tail;
2434 pci_unmap_addr_set(info, mapping, mapping);
2435 pci_unmap_len_set(info, maplen, skb->len);
2436 return mapping;
2437}
2438
2439
2440static inline void
2441ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2442 u32 flagsize, u32 vlan_tag)
2443{
2444#if !USE_TX_COAL_NOW
2445 flagsize &= ~BD_FLG_COAL_NOW;
2446#endif
2447
2448 if (ACE_IS_TIGON_I(ap)) {
2449 struct tx_desc __iomem *io = (struct tx_desc __iomem *) desc;
2450 writel(addr >> 32, &io->addr.addrhi);
2451 writel(addr & 0xffffffff, &io->addr.addrlo);
2452 writel(flagsize, &io->flagsize);
2453#if ACENIC_DO_VLAN
2454 writel(vlan_tag, &io->vlanres);
2455#endif
2456 } else {
2457 desc->addr.addrhi = addr >> 32;
2458 desc->addr.addrlo = addr;
2459 desc->flagsize = flagsize;
2460#if ACENIC_DO_VLAN
2461 desc->vlanres = vlan_tag;
2462#endif
2463 }
2464}
2465
2466
2467static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2468{
2469 struct ace_private *ap = netdev_priv(dev);
2470 struct ace_regs __iomem *regs = ap->regs;
2471 struct tx_desc *desc;
2472 u32 idx, flagsize;
2473 unsigned long maxjiff = jiffies + 3*HZ;
2474
2475restart:
2476 idx = ap->tx_prd;
2477
2478 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2479 goto overflow;
2480
2481 if (!skb_shinfo(skb)->nr_frags) {
2482 dma_addr_t mapping;
2483 u32 vlan_tag = 0;
2484
2485 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2486 flagsize = (skb->len << 16) | (BD_FLG_END);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002487 if (skb->ip_summed == CHECKSUM_PARTIAL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002488 flagsize |= BD_FLG_TCP_UDP_SUM;
2489#if ACENIC_DO_VLAN
2490 if (vlan_tx_tag_present(skb)) {
2491 flagsize |= BD_FLG_VLAN_TAG;
2492 vlan_tag = vlan_tx_tag_get(skb);
2493 }
2494#endif
2495 desc = ap->tx_ring + idx;
2496 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2497
2498 /* Look at ace_tx_int for explanations. */
2499 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2500 flagsize |= BD_FLG_COAL_NOW;
2501
2502 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2503 } else {
2504 dma_addr_t mapping;
2505 u32 vlan_tag = 0;
2506 int i, len = 0;
2507
2508 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2509 flagsize = (skb_headlen(skb) << 16);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002510 if (skb->ip_summed == CHECKSUM_PARTIAL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002511 flagsize |= BD_FLG_TCP_UDP_SUM;
2512#if ACENIC_DO_VLAN
2513 if (vlan_tx_tag_present(skb)) {
2514 flagsize |= BD_FLG_VLAN_TAG;
2515 vlan_tag = vlan_tx_tag_get(skb);
2516 }
2517#endif
2518
2519 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2520
2521 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2522
2523 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2524 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2525 struct tx_ring_info *info;
2526
2527 len += frag->size;
2528 info = ap->skb->tx_skbuff + idx;
2529 desc = ap->tx_ring + idx;
2530
2531 mapping = pci_map_page(ap->pdev, frag->page,
2532 frag->page_offset, frag->size,
2533 PCI_DMA_TODEVICE);
2534
2535 flagsize = (frag->size << 16);
Patrick McHardy84fa7932006-08-29 16:44:56 -07002536 if (skb->ip_summed == CHECKSUM_PARTIAL)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002537 flagsize |= BD_FLG_TCP_UDP_SUM;
2538 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2539
2540 if (i == skb_shinfo(skb)->nr_frags - 1) {
2541 flagsize |= BD_FLG_END;
2542 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2543 flagsize |= BD_FLG_COAL_NOW;
2544
2545 /*
2546 * Only the last fragment frees
2547 * the skb!
2548 */
2549 info->skb = skb;
2550 } else {
2551 info->skb = NULL;
2552 }
2553 pci_unmap_addr_set(info, mapping, mapping);
2554 pci_unmap_len_set(info, maplen, frag->size);
2555 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2556 }
2557 }
2558
2559 wmb();
2560 ap->tx_prd = idx;
2561 ace_set_txprd(regs, ap, idx);
2562
2563 if (flagsize & BD_FLG_COAL_NOW) {
2564 netif_stop_queue(dev);
2565
2566 /*
2567 * A TX-descriptor producer (an IRQ) might have gotten
2568 * inbetween, making the ring free again. Since xmit is
2569 * serialized, this is the only situation we have to
2570 * re-test.
2571 */
2572 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2573 netif_wake_queue(dev);
2574 }
2575
2576 dev->trans_start = jiffies;
2577 return NETDEV_TX_OK;
2578
2579overflow:
2580 /*
2581 * This race condition is unavoidable with lock-free drivers.
2582 * We wake up the queue _before_ tx_prd is advanced, so that we can
2583 * enter hard_start_xmit too early, while tx ring still looks closed.
2584 * This happens ~1-4 times per 100000 packets, so that we can allow
2585 * to loop syncing to other CPU. Probably, we need an additional
2586 * wmb() in ace_tx_intr as well.
2587 *
2588 * Note that this race is relieved by reserving one more entry
2589 * in tx ring than it is necessary (see original non-SG driver).
2590 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2591 * is already overkill.
2592 *
2593 * Alternative is to return with 1 not throttling queue. In this
2594 * case loop becomes longer, no more useful effects.
2595 */
2596 if (time_before(jiffies, maxjiff)) {
2597 barrier();
2598 cpu_relax();
2599 goto restart;
2600 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002601
Linus Torvalds1da177e2005-04-16 15:20:36 -07002602 /* The ring is stuck full. */
2603 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2604 return NETDEV_TX_BUSY;
2605}
2606
2607
2608static int ace_change_mtu(struct net_device *dev, int new_mtu)
2609{
2610 struct ace_private *ap = netdev_priv(dev);
2611 struct ace_regs __iomem *regs = ap->regs;
2612
2613 if (new_mtu > ACE_JUMBO_MTU)
2614 return -EINVAL;
2615
2616 writel(new_mtu + ETH_HLEN + 4, &regs->IfMtu);
2617 dev->mtu = new_mtu;
2618
2619 if (new_mtu > ACE_STD_MTU) {
2620 if (!(ap->jumbo)) {
2621 printk(KERN_INFO "%s: Enabling Jumbo frame "
2622 "support\n", dev->name);
2623 ap->jumbo = 1;
2624 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2625 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2626 ace_set_rxtx_parms(dev, 1);
2627 }
2628 } else {
2629 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2630 ace_sync_irq(dev->irq);
2631 ace_set_rxtx_parms(dev, 0);
2632 if (ap->jumbo) {
2633 struct cmd cmd;
2634
2635 cmd.evt = C_RESET_JUMBO_RNG;
2636 cmd.code = 0;
2637 cmd.idx = 0;
2638 ace_issue_cmd(regs, &cmd);
2639 }
2640 }
2641
2642 return 0;
2643}
2644
2645static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2646{
2647 struct ace_private *ap = netdev_priv(dev);
2648 struct ace_regs __iomem *regs = ap->regs;
2649 u32 link;
2650
2651 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2652 ecmd->supported =
2653 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2654 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2655 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2656 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2657
2658 ecmd->port = PORT_FIBRE;
2659 ecmd->transceiver = XCVR_INTERNAL;
2660
2661 link = readl(&regs->GigLnkState);
2662 if (link & LNK_1000MB)
2663 ecmd->speed = SPEED_1000;
2664 else {
2665 link = readl(&regs->FastLnkState);
2666 if (link & LNK_100MB)
2667 ecmd->speed = SPEED_100;
2668 else if (link & LNK_10MB)
2669 ecmd->speed = SPEED_10;
2670 else
2671 ecmd->speed = 0;
2672 }
2673 if (link & LNK_FULL_DUPLEX)
2674 ecmd->duplex = DUPLEX_FULL;
2675 else
2676 ecmd->duplex = DUPLEX_HALF;
2677
2678 if (link & LNK_NEGOTIATE)
2679 ecmd->autoneg = AUTONEG_ENABLE;
2680 else
2681 ecmd->autoneg = AUTONEG_DISABLE;
2682
2683#if 0
2684 /*
2685 * Current struct ethtool_cmd is insufficient
2686 */
2687 ecmd->trace = readl(&regs->TuneTrace);
2688
2689 ecmd->txcoal = readl(&regs->TuneTxCoalTicks);
2690 ecmd->rxcoal = readl(&regs->TuneRxCoalTicks);
2691#endif
2692 ecmd->maxtxpkt = readl(&regs->TuneMaxTxDesc);
2693 ecmd->maxrxpkt = readl(&regs->TuneMaxRxDesc);
2694
2695 return 0;
2696}
2697
2698static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2699{
2700 struct ace_private *ap = netdev_priv(dev);
2701 struct ace_regs __iomem *regs = ap->regs;
2702 u32 link, speed;
2703
2704 link = readl(&regs->GigLnkState);
2705 if (link & LNK_1000MB)
2706 speed = SPEED_1000;
2707 else {
2708 link = readl(&regs->FastLnkState);
2709 if (link & LNK_100MB)
2710 speed = SPEED_100;
2711 else if (link & LNK_10MB)
2712 speed = SPEED_10;
2713 else
2714 speed = SPEED_100;
2715 }
2716
2717 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2718 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2719 if (!ACE_IS_TIGON_I(ap))
2720 link |= LNK_TX_FLOW_CTL_Y;
2721 if (ecmd->autoneg == AUTONEG_ENABLE)
2722 link |= LNK_NEGOTIATE;
2723 if (ecmd->speed != speed) {
2724 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2725 switch (speed) {
2726 case SPEED_1000:
2727 link |= LNK_1000MB;
2728 break;
2729 case SPEED_100:
2730 link |= LNK_100MB;
2731 break;
2732 case SPEED_10:
2733 link |= LNK_10MB;
2734 break;
2735 }
2736 }
2737
2738 if (ecmd->duplex == DUPLEX_FULL)
2739 link |= LNK_FULL_DUPLEX;
2740
2741 if (link != ap->link) {
2742 struct cmd cmd;
2743 printk(KERN_INFO "%s: Renegotiating link state\n",
2744 dev->name);
2745
2746 ap->link = link;
2747 writel(link, &regs->TuneLink);
2748 if (!ACE_IS_TIGON_I(ap))
2749 writel(link, &regs->TuneFastLink);
2750 wmb();
2751
2752 cmd.evt = C_LNK_NEGOTIATION;
2753 cmd.code = 0;
2754 cmd.idx = 0;
2755 ace_issue_cmd(regs, &cmd);
2756 }
2757 return 0;
2758}
2759
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002760static void ace_get_drvinfo(struct net_device *dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002761 struct ethtool_drvinfo *info)
2762{
2763 struct ace_private *ap = netdev_priv(dev);
2764
2765 strlcpy(info->driver, "acenic", sizeof(info->driver));
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002766 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
Linus Torvalds1da177e2005-04-16 15:20:36 -07002767 tigonFwReleaseMajor, tigonFwReleaseMinor,
2768 tigonFwReleaseFix);
2769
2770 if (ap->pdev)
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002771 strlcpy(info->bus_info, pci_name(ap->pdev),
Linus Torvalds1da177e2005-04-16 15:20:36 -07002772 sizeof(info->bus_info));
2773
2774}
2775
2776/*
2777 * Set the hardware MAC address.
2778 */
2779static int ace_set_mac_addr(struct net_device *dev, void *p)
2780{
2781 struct ace_private *ap = netdev_priv(dev);
2782 struct ace_regs __iomem *regs = ap->regs;
2783 struct sockaddr *addr=p;
2784 u8 *da;
2785 struct cmd cmd;
2786
2787 if(netif_running(dev))
2788 return -EBUSY;
2789
2790 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2791
2792 da = (u8 *)dev->dev_addr;
2793
2794 writel(da[0] << 8 | da[1], &regs->MacAddrHi);
2795 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2796 &regs->MacAddrLo);
2797
2798 cmd.evt = C_SET_MAC_ADDR;
2799 cmd.code = 0;
2800 cmd.idx = 0;
2801 ace_issue_cmd(regs, &cmd);
2802
2803 return 0;
2804}
2805
2806
2807static void ace_set_multicast_list(struct net_device *dev)
2808{
2809 struct ace_private *ap = netdev_priv(dev);
2810 struct ace_regs __iomem *regs = ap->regs;
2811 struct cmd cmd;
2812
2813 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2814 cmd.evt = C_SET_MULTICAST_MODE;
2815 cmd.code = C_C_MCAST_ENABLE;
2816 cmd.idx = 0;
2817 ace_issue_cmd(regs, &cmd);
2818 ap->mcast_all = 1;
2819 } else if (ap->mcast_all) {
2820 cmd.evt = C_SET_MULTICAST_MODE;
2821 cmd.code = C_C_MCAST_DISABLE;
2822 cmd.idx = 0;
2823 ace_issue_cmd(regs, &cmd);
2824 ap->mcast_all = 0;
2825 }
2826
2827 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2828 cmd.evt = C_SET_PROMISC_MODE;
2829 cmd.code = C_C_PROMISC_ENABLE;
2830 cmd.idx = 0;
2831 ace_issue_cmd(regs, &cmd);
2832 ap->promisc = 1;
2833 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2834 cmd.evt = C_SET_PROMISC_MODE;
2835 cmd.code = C_C_PROMISC_DISABLE;
2836 cmd.idx = 0;
2837 ace_issue_cmd(regs, &cmd);
2838 ap->promisc = 0;
2839 }
2840
2841 /*
2842 * For the time being multicast relies on the upper layers
2843 * filtering it properly. The Firmware does not allow one to
2844 * set the entire multicast list at a time and keeping track of
2845 * it here is going to be messy.
2846 */
2847 if ((dev->mc_count) && !(ap->mcast_all)) {
2848 cmd.evt = C_SET_MULTICAST_MODE;
2849 cmd.code = C_C_MCAST_ENABLE;
2850 cmd.idx = 0;
2851 ace_issue_cmd(regs, &cmd);
2852 }else if (!ap->mcast_all) {
2853 cmd.evt = C_SET_MULTICAST_MODE;
2854 cmd.code = C_C_MCAST_DISABLE;
2855 cmd.idx = 0;
2856 ace_issue_cmd(regs, &cmd);
2857 }
2858}
2859
2860
2861static struct net_device_stats *ace_get_stats(struct net_device *dev)
2862{
2863 struct ace_private *ap = netdev_priv(dev);
2864 struct ace_mac_stats __iomem *mac_stats =
2865 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2866
2867 ap->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2868 ap->stats.multicast = readl(&mac_stats->kept_mc);
2869 ap->stats.collisions = readl(&mac_stats->coll);
2870
2871 return &ap->stats;
2872}
2873
2874
2875static void __devinit ace_copy(struct ace_regs __iomem *regs, void *src,
2876 u32 dest, int size)
2877{
2878 void __iomem *tdest;
2879 u32 *wsrc;
2880 short tsize, i;
2881
2882 if (size <= 0)
2883 return;
2884
2885 while (size > 0) {
2886 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2887 min_t(u32, size, ACE_WINDOW_SIZE));
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002888 tdest = (void __iomem *) &regs->Window +
Linus Torvalds1da177e2005-04-16 15:20:36 -07002889 (dest & (ACE_WINDOW_SIZE - 1));
2890 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2891 /*
2892 * This requires byte swapping on big endian, however
2893 * writel does that for us
2894 */
2895 wsrc = src;
2896 for (i = 0; i < (tsize / 4); i++) {
2897 writel(wsrc[i], tdest + i*4);
2898 }
2899 dest += tsize;
2900 src += tsize;
2901 size -= tsize;
2902 }
2903
2904 return;
2905}
2906
2907
2908static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2909{
2910 void __iomem *tdest;
2911 short tsize = 0, i;
2912
2913 if (size <= 0)
2914 return;
2915
2916 while (size > 0) {
2917 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2918 min_t(u32, size, ACE_WINDOW_SIZE));
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002919 tdest = (void __iomem *) &regs->Window +
Linus Torvalds1da177e2005-04-16 15:20:36 -07002920 (dest & (ACE_WINDOW_SIZE - 1));
2921 writel(dest & ~(ACE_WINDOW_SIZE - 1), &regs->WinBase);
2922
2923 for (i = 0; i < (tsize / 4); i++) {
2924 writel(0, tdest + i*4);
2925 }
2926
2927 dest += tsize;
2928 size -= tsize;
2929 }
2930
2931 return;
2932}
2933
2934
2935/*
2936 * Download the firmware into the SRAM on the NIC
2937 *
2938 * This operation requires the NIC to be halted and is performed with
2939 * interrupts disabled and with the spinlock hold.
2940 */
2941int __devinit ace_load_firmware(struct net_device *dev)
2942{
2943 struct ace_private *ap = netdev_priv(dev);
2944 struct ace_regs __iomem *regs = ap->regs;
2945
2946 if (!(readl(&regs->CpuCtrl) & CPU_HALTED)) {
2947 printk(KERN_ERR "%s: trying to download firmware while the "
2948 "CPU is running!\n", ap->name);
2949 return -EFAULT;
2950 }
2951
2952 /*
2953 * Do not try to clear more than 512KB or we end up seeing
2954 * funny things on NICs with only 512KB SRAM
2955 */
2956 ace_clear(regs, 0x2000, 0x80000-0x2000);
2957 if (ACE_IS_TIGON_I(ap)) {
2958 ace_copy(regs, tigonFwText, tigonFwTextAddr, tigonFwTextLen);
2959 ace_copy(regs, tigonFwData, tigonFwDataAddr, tigonFwDataLen);
2960 ace_copy(regs, tigonFwRodata, tigonFwRodataAddr,
2961 tigonFwRodataLen);
2962 ace_clear(regs, tigonFwBssAddr, tigonFwBssLen);
2963 ace_clear(regs, tigonFwSbssAddr, tigonFwSbssLen);
2964 }else if (ap->version == 2) {
2965 ace_clear(regs, tigon2FwBssAddr, tigon2FwBssLen);
2966 ace_clear(regs, tigon2FwSbssAddr, tigon2FwSbssLen);
2967 ace_copy(regs, tigon2FwText, tigon2FwTextAddr,tigon2FwTextLen);
2968 ace_copy(regs, tigon2FwRodata, tigon2FwRodataAddr,
2969 tigon2FwRodataLen);
2970 ace_copy(regs, tigon2FwData, tigon2FwDataAddr,tigon2FwDataLen);
2971 }
2972
2973 return 0;
2974}
2975
2976
2977/*
2978 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2979 *
2980 * Accessing the EEPROM is `interesting' to say the least - don't read
2981 * this code right after dinner.
2982 *
2983 * This is all about black magic and bit-banging the device .... I
2984 * wonder in what hospital they have put the guy who designed the i2c
2985 * specs.
2986 *
2987 * Oh yes, this is only the beginning!
2988 *
2989 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2990 * code i2c readout code by beta testing all my hacks.
2991 */
2992static void __devinit eeprom_start(struct ace_regs __iomem *regs)
2993{
2994 u32 local;
2995
2996 readl(&regs->LocalCtrl);
2997 udelay(ACE_SHORT_DELAY);
2998 local = readl(&regs->LocalCtrl);
2999 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3000 writel(local, &regs->LocalCtrl);
3001 readl(&regs->LocalCtrl);
3002 mb();
3003 udelay(ACE_SHORT_DELAY);
3004 local |= EEPROM_CLK_OUT;
3005 writel(local, &regs->LocalCtrl);
3006 readl(&regs->LocalCtrl);
3007 mb();
3008 udelay(ACE_SHORT_DELAY);
3009 local &= ~EEPROM_DATA_OUT;
3010 writel(local, &regs->LocalCtrl);
3011 readl(&regs->LocalCtrl);
3012 mb();
3013 udelay(ACE_SHORT_DELAY);
3014 local &= ~EEPROM_CLK_OUT;
3015 writel(local, &regs->LocalCtrl);
3016 readl(&regs->LocalCtrl);
3017 mb();
3018}
3019
3020
3021static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3022{
3023 short i;
3024 u32 local;
3025
3026 udelay(ACE_SHORT_DELAY);
3027 local = readl(&regs->LocalCtrl);
3028 local &= ~EEPROM_DATA_OUT;
3029 local |= EEPROM_WRITE_ENABLE;
3030 writel(local, &regs->LocalCtrl);
3031 readl(&regs->LocalCtrl);
3032 mb();
3033
3034 for (i = 0; i < 8; i++, magic <<= 1) {
3035 udelay(ACE_SHORT_DELAY);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04003036 if (magic & 0x80)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003037 local |= EEPROM_DATA_OUT;
3038 else
3039 local &= ~EEPROM_DATA_OUT;
3040 writel(local, &regs->LocalCtrl);
3041 readl(&regs->LocalCtrl);
3042 mb();
3043
3044 udelay(ACE_SHORT_DELAY);
3045 local |= EEPROM_CLK_OUT;
3046 writel(local, &regs->LocalCtrl);
3047 readl(&regs->LocalCtrl);
3048 mb();
3049 udelay(ACE_SHORT_DELAY);
3050 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3051 writel(local, &regs->LocalCtrl);
3052 readl(&regs->LocalCtrl);
3053 mb();
3054 }
3055}
3056
3057
3058static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3059{
3060 int state;
3061 u32 local;
3062
3063 local = readl(&regs->LocalCtrl);
3064 local &= ~EEPROM_WRITE_ENABLE;
3065 writel(local, &regs->LocalCtrl);
3066 readl(&regs->LocalCtrl);
3067 mb();
3068 udelay(ACE_LONG_DELAY);
3069 local |= EEPROM_CLK_OUT;
3070 writel(local, &regs->LocalCtrl);
3071 readl(&regs->LocalCtrl);
3072 mb();
3073 udelay(ACE_SHORT_DELAY);
3074 /* sample data in middle of high clk */
3075 state = (readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0;
3076 udelay(ACE_SHORT_DELAY);
3077 mb();
3078 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3079 readl(&regs->LocalCtrl);
3080 mb();
3081
3082 return state;
3083}
3084
3085
3086static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3087{
3088 u32 local;
3089
3090 udelay(ACE_SHORT_DELAY);
3091 local = readl(&regs->LocalCtrl);
3092 local |= EEPROM_WRITE_ENABLE;
3093 writel(local, &regs->LocalCtrl);
3094 readl(&regs->LocalCtrl);
3095 mb();
3096 udelay(ACE_SHORT_DELAY);
3097 local &= ~EEPROM_DATA_OUT;
3098 writel(local, &regs->LocalCtrl);
3099 readl(&regs->LocalCtrl);
3100 mb();
3101 udelay(ACE_SHORT_DELAY);
3102 local |= EEPROM_CLK_OUT;
3103 writel(local, &regs->LocalCtrl);
3104 readl(&regs->LocalCtrl);
3105 mb();
3106 udelay(ACE_SHORT_DELAY);
3107 local |= EEPROM_DATA_OUT;
3108 writel(local, &regs->LocalCtrl);
3109 readl(&regs->LocalCtrl);
3110 mb();
3111 udelay(ACE_LONG_DELAY);
3112 local &= ~EEPROM_CLK_OUT;
3113 writel(local, &regs->LocalCtrl);
3114 mb();
3115}
3116
3117
3118/*
3119 * Read a whole byte from the EEPROM.
3120 */
3121static int __devinit read_eeprom_byte(struct net_device *dev,
3122 unsigned long offset)
3123{
3124 struct ace_private *ap = netdev_priv(dev);
3125 struct ace_regs __iomem *regs = ap->regs;
3126 unsigned long flags;
3127 u32 local;
3128 int result = 0;
3129 short i;
3130
Linus Torvalds1da177e2005-04-16 15:20:36 -07003131 /*
3132 * Don't take interrupts on this CPU will bit banging
3133 * the %#%#@$ I2C device
3134 */
3135 local_irq_save(flags);
3136
3137 eeprom_start(regs);
3138
3139 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3140 if (eeprom_check_ack(regs)) {
3141 local_irq_restore(flags);
3142 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3143 result = -EIO;
3144 goto eeprom_read_error;
3145 }
3146
3147 eeprom_prep(regs, (offset >> 8) & 0xff);
3148 if (eeprom_check_ack(regs)) {
3149 local_irq_restore(flags);
3150 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3151 ap->name);
3152 result = -EIO;
3153 goto eeprom_read_error;
3154 }
3155
3156 eeprom_prep(regs, offset & 0xff);
3157 if (eeprom_check_ack(regs)) {
3158 local_irq_restore(flags);
3159 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3160 ap->name);
3161 result = -EIO;
3162 goto eeprom_read_error;
3163 }
3164
3165 eeprom_start(regs);
3166 eeprom_prep(regs, EEPROM_READ_SELECT);
3167 if (eeprom_check_ack(regs)) {
3168 local_irq_restore(flags);
3169 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3170 ap->name);
3171 result = -EIO;
3172 goto eeprom_read_error;
3173 }
3174
3175 for (i = 0; i < 8; i++) {
3176 local = readl(&regs->LocalCtrl);
3177 local &= ~EEPROM_WRITE_ENABLE;
3178 writel(local, &regs->LocalCtrl);
3179 readl(&regs->LocalCtrl);
3180 udelay(ACE_LONG_DELAY);
3181 mb();
3182 local |= EEPROM_CLK_OUT;
3183 writel(local, &regs->LocalCtrl);
3184 readl(&regs->LocalCtrl);
3185 mb();
3186 udelay(ACE_SHORT_DELAY);
3187 /* sample data mid high clk */
3188 result = (result << 1) |
3189 ((readl(&regs->LocalCtrl) & EEPROM_DATA_IN) != 0);
3190 udelay(ACE_SHORT_DELAY);
3191 mb();
3192 local = readl(&regs->LocalCtrl);
3193 local &= ~EEPROM_CLK_OUT;
3194 writel(local, &regs->LocalCtrl);
3195 readl(&regs->LocalCtrl);
3196 udelay(ACE_SHORT_DELAY);
3197 mb();
3198 if (i == 7) {
3199 local |= EEPROM_WRITE_ENABLE;
3200 writel(local, &regs->LocalCtrl);
3201 readl(&regs->LocalCtrl);
3202 mb();
3203 udelay(ACE_SHORT_DELAY);
3204 }
3205 }
3206
3207 local |= EEPROM_DATA_OUT;
3208 writel(local, &regs->LocalCtrl);
3209 readl(&regs->LocalCtrl);
3210 mb();
3211 udelay(ACE_SHORT_DELAY);
3212 writel(readl(&regs->LocalCtrl) | EEPROM_CLK_OUT, &regs->LocalCtrl);
3213 readl(&regs->LocalCtrl);
3214 udelay(ACE_LONG_DELAY);
3215 writel(readl(&regs->LocalCtrl) & ~EEPROM_CLK_OUT, &regs->LocalCtrl);
3216 readl(&regs->LocalCtrl);
3217 mb();
3218 udelay(ACE_SHORT_DELAY);
3219 eeprom_stop(regs);
3220
3221 local_irq_restore(flags);
3222 out:
3223 return result;
3224
3225 eeprom_read_error:
3226 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",
3227 ap->name, offset);
3228 goto out;
3229}
3230
3231
3232/*
3233 * Local variables:
3234 * compile-command: "gcc -D__SMP__ -D__KERNEL__ -DMODULE -I../../include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -DMODVERSIONS -include ../../include/linux/modversions.h -c -o acenic.o acenic.c"
3235 * End:
3236 */