Linus Walleij | bd5f12a | 2011-09-22 08:07:00 +0100 | [diff] [blame] | 1 | /* Include file for the EP93XX GPIO controller machine specifics */ |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 2 | |
Linus Walleij | bd5f12a | 2011-09-22 08:07:00 +0100 | [diff] [blame] | 3 | #ifndef __GPIO_EP93XX_H |
| 4 | #define __GPIO_EP93XX_H |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 5 | |
Ryan Mallon | 2ae18b4 | 2012-01-11 09:33:29 +1100 | [diff] [blame] | 6 | #include <mach/ep93xx-regs.h> |
| 7 | |
| 8 | #define EP93XX_GPIO_PHYS_BASE EP93XX_APB_PHYS(0x00040000) |
| 9 | #define EP93XX_GPIO_BASE EP93XX_APB_IOMEM(0x00040000) |
| 10 | #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) |
| 11 | #define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) |
| 12 | #define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) |
| 13 | #define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) |
| 14 | #define EP93XX_GPIO_EEDRIVE EP93XX_GPIO_REG(0xc8) |
| 15 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 16 | /* GPIO port A. */ |
| 17 | #define EP93XX_GPIO_LINE_A(x) ((x) + 0) |
| 18 | #define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0) |
| 19 | #define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1) |
| 20 | #define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2) |
| 21 | #define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3) |
| 22 | #define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4) |
| 23 | #define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5) |
| 24 | #define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6) |
| 25 | #define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7) |
| 26 | |
| 27 | /* GPIO port B. */ |
| 28 | #define EP93XX_GPIO_LINE_B(x) ((x) + 8) |
| 29 | #define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0) |
| 30 | #define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1) |
| 31 | #define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2) |
| 32 | #define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3) |
| 33 | #define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4) |
| 34 | #define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5) |
| 35 | #define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6) |
| 36 | #define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7) |
| 37 | |
| 38 | /* GPIO port C. */ |
| 39 | #define EP93XX_GPIO_LINE_C(x) ((x) + 40) |
| 40 | #define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0) |
| 41 | #define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1) |
| 42 | #define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2) |
| 43 | #define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3) |
| 44 | #define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4) |
| 45 | #define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5) |
| 46 | #define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6) |
| 47 | #define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7) |
| 48 | |
| 49 | /* GPIO port D. */ |
| 50 | #define EP93XX_GPIO_LINE_D(x) ((x) + 24) |
| 51 | #define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0) |
| 52 | #define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1) |
| 53 | #define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2) |
| 54 | #define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3) |
| 55 | #define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4) |
| 56 | #define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5) |
| 57 | #define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6) |
| 58 | #define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7) |
| 59 | |
| 60 | /* GPIO port E. */ |
| 61 | #define EP93XX_GPIO_LINE_E(x) ((x) + 32) |
| 62 | #define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0) |
| 63 | #define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1) |
| 64 | #define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2) |
| 65 | #define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3) |
| 66 | #define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4) |
| 67 | #define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5) |
| 68 | #define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6) |
| 69 | #define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7) |
| 70 | |
| 71 | /* GPIO port F. */ |
| 72 | #define EP93XX_GPIO_LINE_F(x) ((x) + 16) |
| 73 | #define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0) |
| 74 | #define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1) |
| 75 | #define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2) |
| 76 | #define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3) |
| 77 | #define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4) |
| 78 | #define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5) |
| 79 | #define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6) |
| 80 | #define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7) |
| 81 | |
| 82 | /* GPIO port G. */ |
| 83 | #define EP93XX_GPIO_LINE_G(x) ((x) + 48) |
| 84 | #define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0) |
| 85 | #define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1) |
| 86 | #define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2) |
| 87 | #define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3) |
| 88 | #define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4) |
| 89 | #define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5) |
| 90 | #define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6) |
| 91 | #define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7) |
| 92 | |
| 93 | /* GPIO port H. */ |
| 94 | #define EP93XX_GPIO_LINE_H(x) ((x) + 56) |
| 95 | #define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0) |
| 96 | #define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1) |
| 97 | #define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2) |
| 98 | #define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3) |
| 99 | #define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4) |
| 100 | #define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5) |
| 101 | #define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6) |
| 102 | #define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7) |
| 103 | |
| 104 | /* maximum value for gpio line identifiers */ |
| 105 | #define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7) |
| 106 | |
| 107 | /* maximum value for irq capable line identifiers */ |
| 108 | #define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) |
| 109 | |
Linus Walleij | bd5f12a | 2011-09-22 08:07:00 +0100 | [diff] [blame] | 110 | #endif /* __GPIO_EP93XX_H */ |