blob: 3b34a64195ea04457e990fcfd1342a1f445cc12c [file] [log] [blame]
Adrian Hunter90e457f2015-07-17 19:33:41 +03001/*
2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 */
15
16#include <stdio.h>
17#include <stdbool.h>
18#include <errno.h>
19#include <linux/kernel.h>
20#include <linux/types.h>
21
22#include "../perf.h"
23#include "session.h"
24#include "machine.h"
25#include "tool.h"
26#include "event.h"
27#include "evlist.h"
28#include "evsel.h"
29#include "map.h"
30#include "color.h"
31#include "util.h"
32#include "thread.h"
33#include "thread-stack.h"
34#include "symbol.h"
35#include "callchain.h"
36#include "dso.h"
37#include "debug.h"
38#include "auxtrace.h"
39#include "tsc.h"
40#include "intel-pt.h"
41
42#include "intel-pt-decoder/intel-pt-log.h"
43#include "intel-pt-decoder/intel-pt-decoder.h"
44#include "intel-pt-decoder/intel-pt-insn-decoder.h"
45#include "intel-pt-decoder/intel-pt-pkt-decoder.h"
46
47#define MAX_TIMESTAMP (~0ULL)
48
49struct intel_pt {
50 struct auxtrace auxtrace;
51 struct auxtrace_queues queues;
52 struct auxtrace_heap heap;
53 u32 auxtrace_type;
54 struct perf_session *session;
55 struct machine *machine;
56 struct perf_evsel *switch_evsel;
57 struct thread *unknown_thread;
58 bool timeless_decoding;
59 bool sampling_mode;
60 bool snapshot_mode;
61 bool per_cpu_mmaps;
62 bool have_tsc;
63 bool data_queued;
64 bool est_tsc;
65 bool sync_switch;
66 int have_sched_switch;
67 u32 pmu_type;
68 u64 kernel_start;
69 u64 switch_ip;
70 u64 ptss_ip;
71
72 struct perf_tsc_conversion tc;
73 bool cap_user_time_zero;
74
75 struct itrace_synth_opts synth_opts;
76
77 bool sample_instructions;
78 u64 instructions_sample_type;
79 u64 instructions_sample_period;
80 u64 instructions_id;
81
82 bool sample_branches;
83 u32 branches_filter;
84 u64 branches_sample_type;
85 u64 branches_id;
86
87 bool sample_transactions;
88 u64 transactions_sample_type;
89 u64 transactions_id;
90
91 bool synth_needs_swap;
92
93 u64 tsc_bit;
94 u64 noretcomp_bit;
95 unsigned max_non_turbo_ratio;
96};
97
98enum switch_state {
99 INTEL_PT_SS_NOT_TRACING,
100 INTEL_PT_SS_UNKNOWN,
101 INTEL_PT_SS_TRACING,
102 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
103 INTEL_PT_SS_EXPECTING_SWITCH_IP,
104};
105
106struct intel_pt_queue {
107 struct intel_pt *pt;
108 unsigned int queue_nr;
109 struct auxtrace_buffer *buffer;
110 void *decoder;
111 const struct intel_pt_state *state;
112 struct ip_callchain *chain;
113 union perf_event *event_buf;
114 bool on_heap;
115 bool stop;
116 bool step_through_buffers;
117 bool use_buffer_pid_tid;
118 pid_t pid, tid;
119 int cpu;
120 int switch_state;
121 pid_t next_tid;
122 struct thread *thread;
123 bool exclude_kernel;
124 bool have_sample;
125 u64 time;
126 u64 timestamp;
127 u32 flags;
128 u16 insn_len;
Adrian Hunter2a21d032015-07-17 19:33:48 +0300129 u64 last_insn_cnt;
Adrian Hunter90e457f2015-07-17 19:33:41 +0300130};
131
132static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
133 unsigned char *buf, size_t len)
134{
135 struct intel_pt_pkt packet;
136 size_t pos = 0;
137 int ret, pkt_len, i;
138 char desc[INTEL_PT_PKT_DESC_MAX];
139 const char *color = PERF_COLOR_BLUE;
140
141 color_fprintf(stdout, color,
142 ". ... Intel Processor Trace data: size %zu bytes\n",
143 len);
144
145 while (len) {
146 ret = intel_pt_get_packet(buf, len, &packet);
147 if (ret > 0)
148 pkt_len = ret;
149 else
150 pkt_len = 1;
151 printf(".");
152 color_fprintf(stdout, color, " %08x: ", pos);
153 for (i = 0; i < pkt_len; i++)
154 color_fprintf(stdout, color, " %02x", buf[i]);
155 for (; i < 16; i++)
156 color_fprintf(stdout, color, " ");
157 if (ret > 0) {
158 ret = intel_pt_pkt_desc(&packet, desc,
159 INTEL_PT_PKT_DESC_MAX);
160 if (ret > 0)
161 color_fprintf(stdout, color, " %s\n", desc);
162 } else {
163 color_fprintf(stdout, color, " Bad packet!\n");
164 }
165 pos += pkt_len;
166 buf += pkt_len;
167 len -= pkt_len;
168 }
169}
170
171static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
172 size_t len)
173{
174 printf(".\n");
175 intel_pt_dump(pt, buf, len);
176}
177
178static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
179 struct auxtrace_buffer *b)
180{
181 void *start;
182
183 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
184 pt->have_tsc);
185 if (!start)
186 return -EINVAL;
187 b->use_size = b->data + b->size - start;
188 b->use_data = start;
189 return 0;
190}
191
192static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
193 struct auxtrace_queue *queue,
194 struct auxtrace_buffer *buffer)
195{
196 if (queue->cpu == -1 && buffer->cpu != -1)
197 ptq->cpu = buffer->cpu;
198
199 ptq->pid = buffer->pid;
200 ptq->tid = buffer->tid;
201
202 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
203 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
204
205 thread__zput(ptq->thread);
206
207 if (ptq->tid != -1) {
208 if (ptq->pid != -1)
209 ptq->thread = machine__findnew_thread(ptq->pt->machine,
210 ptq->pid,
211 ptq->tid);
212 else
213 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
214 ptq->tid);
215 }
216}
217
218/* This function assumes data is processed sequentially only */
219static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
220{
221 struct intel_pt_queue *ptq = data;
222 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
223 struct auxtrace_queue *queue;
224
225 if (ptq->stop) {
226 b->len = 0;
227 return 0;
228 }
229
230 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
231
232 buffer = auxtrace_buffer__next(queue, buffer);
233 if (!buffer) {
234 if (old_buffer)
235 auxtrace_buffer__drop_data(old_buffer);
236 b->len = 0;
237 return 0;
238 }
239
240 ptq->buffer = buffer;
241
242 if (!buffer->data) {
243 int fd = perf_data_file__fd(ptq->pt->session->file);
244
245 buffer->data = auxtrace_buffer__get_data(buffer, fd);
246 if (!buffer->data)
247 return -ENOMEM;
248 }
249
250 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
251 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
252 return -ENOMEM;
253
254 if (old_buffer)
255 auxtrace_buffer__drop_data(old_buffer);
256
257 if (buffer->use_data) {
258 b->len = buffer->use_size;
259 b->buf = buffer->use_data;
260 } else {
261 b->len = buffer->size;
262 b->buf = buffer->data;
263 }
264 b->ref_timestamp = buffer->reference;
265
266 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
267 !buffer->consecutive)) {
268 b->consecutive = false;
269 b->trace_nr = buffer->buffer_nr + 1;
270 } else {
271 b->consecutive = true;
272 }
273
274 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
275 ptq->tid != buffer->tid))
276 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
277
278 if (ptq->step_through_buffers)
279 ptq->stop = true;
280
281 if (!b->len)
282 return intel_pt_get_trace(b, data);
283
284 return 0;
285}
286
287struct intel_pt_cache_entry {
288 struct auxtrace_cache_entry entry;
289 u64 insn_cnt;
290 u64 byte_cnt;
291 enum intel_pt_insn_op op;
292 enum intel_pt_insn_branch branch;
293 int length;
294 int32_t rel;
295};
296
297static int intel_pt_config_div(const char *var, const char *value, void *data)
298{
299 int *d = data;
300 long val;
301
302 if (!strcmp(var, "intel-pt.cache-divisor")) {
303 val = strtol(value, NULL, 0);
304 if (val > 0 && val <= INT_MAX)
305 *d = val;
306 }
307
308 return 0;
309}
310
311static int intel_pt_cache_divisor(void)
312{
313 static int d;
314
315 if (d)
316 return d;
317
318 perf_config(intel_pt_config_div, &d);
319
320 if (!d)
321 d = 64;
322
323 return d;
324}
325
326static unsigned int intel_pt_cache_size(struct dso *dso,
327 struct machine *machine)
328{
329 off_t size;
330
331 size = dso__data_size(dso, machine);
332 size /= intel_pt_cache_divisor();
333 if (size < 1000)
334 return 10;
335 if (size > (1 << 21))
336 return 21;
337 return 32 - __builtin_clz(size);
338}
339
340static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
341 struct machine *machine)
342{
343 struct auxtrace_cache *c;
344 unsigned int bits;
345
346 if (dso->auxtrace_cache)
347 return dso->auxtrace_cache;
348
349 bits = intel_pt_cache_size(dso, machine);
350
351 /* Ignoring cache creation failure */
352 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
353
354 dso->auxtrace_cache = c;
355
356 return c;
357}
358
359static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
360 u64 offset, u64 insn_cnt, u64 byte_cnt,
361 struct intel_pt_insn *intel_pt_insn)
362{
363 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
364 struct intel_pt_cache_entry *e;
365 int err;
366
367 if (!c)
368 return -ENOMEM;
369
370 e = auxtrace_cache__alloc_entry(c);
371 if (!e)
372 return -ENOMEM;
373
374 e->insn_cnt = insn_cnt;
375 e->byte_cnt = byte_cnt;
376 e->op = intel_pt_insn->op;
377 e->branch = intel_pt_insn->branch;
378 e->length = intel_pt_insn->length;
379 e->rel = intel_pt_insn->rel;
380
381 err = auxtrace_cache__add(c, offset, &e->entry);
382 if (err)
383 auxtrace_cache__free_entry(c, e);
384
385 return err;
386}
387
388static struct intel_pt_cache_entry *
389intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
390{
391 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
392
393 if (!c)
394 return NULL;
395
396 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
397}
398
399static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
400 uint64_t *insn_cnt_ptr, uint64_t *ip,
401 uint64_t to_ip, uint64_t max_insn_cnt,
402 void *data)
403{
404 struct intel_pt_queue *ptq = data;
405 struct machine *machine = ptq->pt->machine;
406 struct thread *thread;
407 struct addr_location al;
408 unsigned char buf[1024];
409 size_t bufsz;
410 ssize_t len;
411 int x86_64;
412 u8 cpumode;
413 u64 offset, start_offset, start_ip;
414 u64 insn_cnt = 0;
415 bool one_map = true;
416
417 if (to_ip && *ip == to_ip)
418 goto out_no_cache;
419
420 bufsz = intel_pt_insn_max_size();
421
422 if (*ip >= ptq->pt->kernel_start)
423 cpumode = PERF_RECORD_MISC_KERNEL;
424 else
425 cpumode = PERF_RECORD_MISC_USER;
426
427 thread = ptq->thread;
428 if (!thread) {
429 if (cpumode != PERF_RECORD_MISC_KERNEL)
430 return -EINVAL;
431 thread = ptq->pt->unknown_thread;
432 }
433
434 while (1) {
435 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
436 if (!al.map || !al.map->dso)
437 return -EINVAL;
438
439 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
440 dso__data_status_seen(al.map->dso,
441 DSO_DATA_STATUS_SEEN_ITRACE))
442 return -ENOENT;
443
444 offset = al.map->map_ip(al.map, *ip);
445
446 if (!to_ip && one_map) {
447 struct intel_pt_cache_entry *e;
448
449 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
450 if (e &&
451 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
452 *insn_cnt_ptr = e->insn_cnt;
453 *ip += e->byte_cnt;
454 intel_pt_insn->op = e->op;
455 intel_pt_insn->branch = e->branch;
456 intel_pt_insn->length = e->length;
457 intel_pt_insn->rel = e->rel;
458 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
459 return 0;
460 }
461 }
462
463 start_offset = offset;
464 start_ip = *ip;
465
466 /* Load maps to ensure dso->is_64_bit has been updated */
467 map__load(al.map, machine->symbol_filter);
468
469 x86_64 = al.map->dso->is_64_bit;
470
471 while (1) {
472 len = dso__data_read_offset(al.map->dso, machine,
473 offset, buf, bufsz);
474 if (len <= 0)
475 return -EINVAL;
476
477 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
478 return -EINVAL;
479
480 intel_pt_log_insn(intel_pt_insn, *ip);
481
482 insn_cnt += 1;
483
484 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
485 goto out;
486
487 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
488 goto out_no_cache;
489
490 *ip += intel_pt_insn->length;
491
492 if (to_ip && *ip == to_ip)
493 goto out_no_cache;
494
495 if (*ip >= al.map->end)
496 break;
497
498 offset += intel_pt_insn->length;
499 }
500 one_map = false;
501 }
502out:
503 *insn_cnt_ptr = insn_cnt;
504
505 if (!one_map)
506 goto out_no_cache;
507
508 /*
509 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
510 * entries.
511 */
512 if (to_ip) {
513 struct intel_pt_cache_entry *e;
514
515 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
516 if (e)
517 return 0;
518 }
519
520 /* Ignore cache errors */
521 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
522 *ip - start_ip, intel_pt_insn);
523
524 return 0;
525
526out_no_cache:
527 *insn_cnt_ptr = insn_cnt;
528 return 0;
529}
530
531static bool intel_pt_get_config(struct intel_pt *pt,
532 struct perf_event_attr *attr, u64 *config)
533{
534 if (attr->type == pt->pmu_type) {
535 if (config)
536 *config = attr->config;
537 return true;
538 }
539
540 return false;
541}
542
543static bool intel_pt_exclude_kernel(struct intel_pt *pt)
544{
545 struct perf_evsel *evsel;
546
547 evlist__for_each(pt->session->evlist, evsel) {
548 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
549 !evsel->attr.exclude_kernel)
550 return false;
551 }
552 return true;
553}
554
555static bool intel_pt_return_compression(struct intel_pt *pt)
556{
557 struct perf_evsel *evsel;
558 u64 config;
559
560 if (!pt->noretcomp_bit)
561 return true;
562
563 evlist__for_each(pt->session->evlist, evsel) {
564 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
565 (config & pt->noretcomp_bit))
566 return false;
567 }
568 return true;
569}
570
571static bool intel_pt_timeless_decoding(struct intel_pt *pt)
572{
573 struct perf_evsel *evsel;
574 bool timeless_decoding = true;
575 u64 config;
576
577 if (!pt->tsc_bit || !pt->cap_user_time_zero)
578 return true;
579
580 evlist__for_each(pt->session->evlist, evsel) {
581 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
582 return true;
583 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
584 if (config & pt->tsc_bit)
585 timeless_decoding = false;
586 else
587 return true;
588 }
589 }
590 return timeless_decoding;
591}
592
593static bool intel_pt_tracing_kernel(struct intel_pt *pt)
594{
595 struct perf_evsel *evsel;
596
597 evlist__for_each(pt->session->evlist, evsel) {
598 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
599 !evsel->attr.exclude_kernel)
600 return true;
601 }
602 return false;
603}
604
605static bool intel_pt_have_tsc(struct intel_pt *pt)
606{
607 struct perf_evsel *evsel;
608 bool have_tsc = false;
609 u64 config;
610
611 if (!pt->tsc_bit)
612 return false;
613
614 evlist__for_each(pt->session->evlist, evsel) {
615 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
616 if (config & pt->tsc_bit)
617 have_tsc = true;
618 else
619 return false;
620 }
621 }
622 return have_tsc;
623}
624
625static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
626{
627 u64 quot, rem;
628
629 quot = ns / pt->tc.time_mult;
630 rem = ns % pt->tc.time_mult;
631 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
632 pt->tc.time_mult;
633}
634
635static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
636 unsigned int queue_nr)
637{
638 struct intel_pt_params params = { .get_trace = 0, };
639 struct intel_pt_queue *ptq;
640
641 ptq = zalloc(sizeof(struct intel_pt_queue));
642 if (!ptq)
643 return NULL;
644
645 if (pt->synth_opts.callchain) {
646 size_t sz = sizeof(struct ip_callchain);
647
648 sz += pt->synth_opts.callchain_sz * sizeof(u64);
649 ptq->chain = zalloc(sz);
650 if (!ptq->chain)
651 goto out_free;
652 }
653
654 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
655 if (!ptq->event_buf)
656 goto out_free;
657
658 ptq->pt = pt;
659 ptq->queue_nr = queue_nr;
660 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
661 ptq->pid = -1;
662 ptq->tid = -1;
663 ptq->cpu = -1;
664 ptq->next_tid = -1;
665
666 params.get_trace = intel_pt_get_trace;
667 params.walk_insn = intel_pt_walk_next_insn;
668 params.data = ptq;
669 params.return_compression = intel_pt_return_compression(pt);
670 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
671
672 if (pt->synth_opts.instructions) {
673 if (pt->synth_opts.period) {
674 switch (pt->synth_opts.period_type) {
675 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
676 params.period_type =
677 INTEL_PT_PERIOD_INSTRUCTIONS;
678 params.period = pt->synth_opts.period;
679 break;
680 case PERF_ITRACE_PERIOD_TICKS:
681 params.period_type = INTEL_PT_PERIOD_TICKS;
682 params.period = pt->synth_opts.period;
683 break;
684 case PERF_ITRACE_PERIOD_NANOSECS:
685 params.period_type = INTEL_PT_PERIOD_TICKS;
686 params.period = intel_pt_ns_to_ticks(pt,
687 pt->synth_opts.period);
688 break;
689 default:
690 break;
691 }
692 }
693
694 if (!params.period) {
695 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
696 params.period = 1000;
697 }
698 }
699
700 ptq->decoder = intel_pt_decoder_new(&params);
701 if (!ptq->decoder)
702 goto out_free;
703
704 return ptq;
705
706out_free:
707 zfree(&ptq->event_buf);
708 zfree(&ptq->chain);
709 free(ptq);
710 return NULL;
711}
712
713static void intel_pt_free_queue(void *priv)
714{
715 struct intel_pt_queue *ptq = priv;
716
717 if (!ptq)
718 return;
719 thread__zput(ptq->thread);
720 intel_pt_decoder_free(ptq->decoder);
721 zfree(&ptq->event_buf);
722 zfree(&ptq->chain);
723 free(ptq);
724}
725
726static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
727 struct auxtrace_queue *queue)
728{
729 struct intel_pt_queue *ptq = queue->priv;
730
731 if (queue->tid == -1 || pt->have_sched_switch) {
732 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
733 thread__zput(ptq->thread);
734 }
735
736 if (!ptq->thread && ptq->tid != -1)
737 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
738
739 if (ptq->thread) {
740 ptq->pid = ptq->thread->pid_;
741 if (queue->cpu == -1)
742 ptq->cpu = ptq->thread->cpu;
743 }
744}
745
746static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
747{
748 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
749 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
750 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
751 if (ptq->state->to_ip)
752 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
753 PERF_IP_FLAG_ASYNC |
754 PERF_IP_FLAG_INTERRUPT;
755 else
756 ptq->flags = PERF_IP_FLAG_BRANCH |
757 PERF_IP_FLAG_TRACE_END;
758 ptq->insn_len = 0;
759 } else {
760 if (ptq->state->from_ip)
761 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
762 else
763 ptq->flags = PERF_IP_FLAG_BRANCH |
764 PERF_IP_FLAG_TRACE_BEGIN;
765 if (ptq->state->flags & INTEL_PT_IN_TX)
766 ptq->flags |= PERF_IP_FLAG_IN_TX;
767 ptq->insn_len = ptq->state->insn_len;
768 }
769}
770
771static int intel_pt_setup_queue(struct intel_pt *pt,
772 struct auxtrace_queue *queue,
773 unsigned int queue_nr)
774{
775 struct intel_pt_queue *ptq = queue->priv;
776
777 if (list_empty(&queue->head))
778 return 0;
779
780 if (!ptq) {
781 ptq = intel_pt_alloc_queue(pt, queue_nr);
782 if (!ptq)
783 return -ENOMEM;
784 queue->priv = ptq;
785
786 if (queue->cpu != -1)
787 ptq->cpu = queue->cpu;
788 ptq->tid = queue->tid;
789
790 if (pt->sampling_mode) {
791 if (pt->timeless_decoding)
792 ptq->step_through_buffers = true;
793 if (pt->timeless_decoding || !pt->have_sched_switch)
794 ptq->use_buffer_pid_tid = true;
795 }
796 }
797
798 if (!ptq->on_heap &&
799 (!pt->sync_switch ||
800 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
801 const struct intel_pt_state *state;
802 int ret;
803
804 if (pt->timeless_decoding)
805 return 0;
806
807 intel_pt_log("queue %u getting timestamp\n", queue_nr);
808 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
809 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
810 while (1) {
811 state = intel_pt_decode(ptq->decoder);
812 if (state->err) {
813 if (state->err == INTEL_PT_ERR_NODATA) {
814 intel_pt_log("queue %u has no timestamp\n",
815 queue_nr);
816 return 0;
817 }
818 continue;
819 }
820 if (state->timestamp)
821 break;
822 }
823
824 ptq->timestamp = state->timestamp;
825 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
826 queue_nr, ptq->timestamp);
827 ptq->state = state;
828 ptq->have_sample = true;
829 intel_pt_sample_flags(ptq);
830 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
831 if (ret)
832 return ret;
833 ptq->on_heap = true;
834 }
835
836 return 0;
837}
838
839static int intel_pt_setup_queues(struct intel_pt *pt)
840{
841 unsigned int i;
842 int ret;
843
844 for (i = 0; i < pt->queues.nr_queues; i++) {
845 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
846 if (ret)
847 return ret;
848 }
849 return 0;
850}
851
852static int intel_pt_inject_event(union perf_event *event,
853 struct perf_sample *sample, u64 type,
854 bool swapped)
855{
856 event->header.size = perf_event__sample_event_size(sample, type, 0);
857 return perf_event__synthesize_sample(event, type, 0, sample, swapped);
858}
859
860static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
861{
862 int ret;
863 struct intel_pt *pt = ptq->pt;
864 union perf_event *event = ptq->event_buf;
865 struct perf_sample sample = { .ip = 0, };
866
867 event->sample.header.type = PERF_RECORD_SAMPLE;
868 event->sample.header.misc = PERF_RECORD_MISC_USER;
869 event->sample.header.size = sizeof(struct perf_event_header);
870
871 if (!pt->timeless_decoding)
872 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
873
874 sample.ip = ptq->state->from_ip;
875 sample.pid = ptq->pid;
876 sample.tid = ptq->tid;
877 sample.addr = ptq->state->to_ip;
878 sample.id = ptq->pt->branches_id;
879 sample.stream_id = ptq->pt->branches_id;
880 sample.period = 1;
881 sample.cpu = ptq->cpu;
882 sample.flags = ptq->flags;
883 sample.insn_len = ptq->insn_len;
884
885 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
886 return 0;
887
888 if (pt->synth_opts.inject) {
889 ret = intel_pt_inject_event(event, &sample,
890 pt->branches_sample_type,
891 pt->synth_needs_swap);
892 if (ret)
893 return ret;
894 }
895
896 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
897 if (ret)
898 pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
899 ret);
900
901 return ret;
902}
903
904static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
905{
906 int ret;
907 struct intel_pt *pt = ptq->pt;
908 union perf_event *event = ptq->event_buf;
909 struct perf_sample sample = { .ip = 0, };
910
911 event->sample.header.type = PERF_RECORD_SAMPLE;
912 event->sample.header.misc = PERF_RECORD_MISC_USER;
913 event->sample.header.size = sizeof(struct perf_event_header);
914
915 if (!pt->timeless_decoding)
916 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
917
918 sample.ip = ptq->state->from_ip;
919 sample.pid = ptq->pid;
920 sample.tid = ptq->tid;
921 sample.addr = ptq->state->to_ip;
922 sample.id = ptq->pt->instructions_id;
923 sample.stream_id = ptq->pt->instructions_id;
Adrian Hunter2a21d032015-07-17 19:33:48 +0300924 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
Adrian Hunter90e457f2015-07-17 19:33:41 +0300925 sample.cpu = ptq->cpu;
926 sample.flags = ptq->flags;
927 sample.insn_len = ptq->insn_len;
928
Adrian Hunter2a21d032015-07-17 19:33:48 +0300929 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
930
Adrian Hunter90e457f2015-07-17 19:33:41 +0300931 if (pt->synth_opts.callchain) {
932 thread_stack__sample(ptq->thread, ptq->chain,
933 pt->synth_opts.callchain_sz, sample.ip);
934 sample.callchain = ptq->chain;
935 }
936
937 if (pt->synth_opts.inject) {
938 ret = intel_pt_inject_event(event, &sample,
939 pt->instructions_sample_type,
940 pt->synth_needs_swap);
941 if (ret)
942 return ret;
943 }
944
945 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
946 if (ret)
947 pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
948 ret);
949
950 return ret;
951}
952
953static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
954{
955 int ret;
956 struct intel_pt *pt = ptq->pt;
957 union perf_event *event = ptq->event_buf;
958 struct perf_sample sample = { .ip = 0, };
959
960 event->sample.header.type = PERF_RECORD_SAMPLE;
961 event->sample.header.misc = PERF_RECORD_MISC_USER;
962 event->sample.header.size = sizeof(struct perf_event_header);
963
964 if (!pt->timeless_decoding)
965 sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
966
967 sample.ip = ptq->state->from_ip;
968 sample.pid = ptq->pid;
969 sample.tid = ptq->tid;
970 sample.addr = ptq->state->to_ip;
971 sample.id = ptq->pt->transactions_id;
972 sample.stream_id = ptq->pt->transactions_id;
973 sample.period = 1;
974 sample.cpu = ptq->cpu;
975 sample.flags = ptq->flags;
976 sample.insn_len = ptq->insn_len;
977
978 if (pt->synth_opts.callchain) {
979 thread_stack__sample(ptq->thread, ptq->chain,
980 pt->synth_opts.callchain_sz, sample.ip);
981 sample.callchain = ptq->chain;
982 }
983
984 if (pt->synth_opts.inject) {
985 ret = intel_pt_inject_event(event, &sample,
986 pt->transactions_sample_type,
987 pt->synth_needs_swap);
988 if (ret)
989 return ret;
990 }
991
992 ret = perf_session__deliver_synth_event(pt->session, event, &sample);
993 if (ret)
994 pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
995 ret);
996
997 return ret;
998}
999
1000static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1001 pid_t pid, pid_t tid, u64 ip)
1002{
1003 union perf_event event;
1004 char msg[MAX_AUXTRACE_ERROR_MSG];
1005 int err;
1006
1007 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1008
1009 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1010 code, cpu, pid, tid, ip, msg);
1011
1012 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1013 if (err)
1014 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1015 err);
1016
1017 return err;
1018}
1019
1020static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1021{
1022 struct auxtrace_queue *queue;
1023 pid_t tid = ptq->next_tid;
1024 int err;
1025
1026 if (tid == -1)
1027 return 0;
1028
1029 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1030
1031 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1032
1033 queue = &pt->queues.queue_array[ptq->queue_nr];
1034 intel_pt_set_pid_tid_cpu(pt, queue);
1035
1036 ptq->next_tid = -1;
1037
1038 return err;
1039}
1040
1041static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1042{
1043 struct intel_pt *pt = ptq->pt;
1044
1045 return ip == pt->switch_ip &&
1046 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1047 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1048 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1049}
1050
1051static int intel_pt_sample(struct intel_pt_queue *ptq)
1052{
1053 const struct intel_pt_state *state = ptq->state;
1054 struct intel_pt *pt = ptq->pt;
1055 int err;
1056
1057 if (!ptq->have_sample)
1058 return 0;
1059
1060 ptq->have_sample = false;
1061
1062 if (pt->sample_instructions &&
1063 (state->type & INTEL_PT_INSTRUCTION)) {
1064 err = intel_pt_synth_instruction_sample(ptq);
1065 if (err)
1066 return err;
1067 }
1068
1069 if (pt->sample_transactions &&
1070 (state->type & INTEL_PT_TRANSACTION)) {
1071 err = intel_pt_synth_transaction_sample(ptq);
1072 if (err)
1073 return err;
1074 }
1075
1076 if (!(state->type & INTEL_PT_BRANCH))
1077 return 0;
1078
1079 if (pt->synth_opts.callchain)
1080 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1081 state->to_ip, ptq->insn_len,
1082 state->trace_nr);
1083 else
1084 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1085
1086 if (pt->sample_branches) {
1087 err = intel_pt_synth_branch_sample(ptq);
1088 if (err)
1089 return err;
1090 }
1091
1092 if (!pt->sync_switch)
1093 return 0;
1094
1095 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1096 switch (ptq->switch_state) {
1097 case INTEL_PT_SS_UNKNOWN:
1098 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1099 err = intel_pt_next_tid(pt, ptq);
1100 if (err)
1101 return err;
1102 ptq->switch_state = INTEL_PT_SS_TRACING;
1103 break;
1104 default:
1105 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1106 return 1;
1107 }
1108 } else if (!state->to_ip) {
1109 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1110 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1111 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1112 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1113 state->to_ip == pt->ptss_ip &&
1114 (ptq->flags & PERF_IP_FLAG_CALL)) {
1115 ptq->switch_state = INTEL_PT_SS_TRACING;
1116 }
1117
1118 return 0;
1119}
1120
1121static u64 intel_pt_switch_ip(struct machine *machine, u64 *ptss_ip)
1122{
1123 struct map *map;
1124 struct symbol *sym, *start;
1125 u64 ip, switch_ip = 0;
1126
1127 if (ptss_ip)
1128 *ptss_ip = 0;
1129
1130 map = machine__kernel_map(machine, MAP__FUNCTION);
1131 if (!map)
1132 return 0;
1133
1134 if (map__load(map, machine->symbol_filter))
1135 return 0;
1136
1137 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1138
1139 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1140 if (sym->binding == STB_GLOBAL &&
1141 !strcmp(sym->name, "__switch_to")) {
1142 ip = map->unmap_ip(map, sym->start);
1143 if (ip >= map->start && ip < map->end) {
1144 switch_ip = ip;
1145 break;
1146 }
1147 }
1148 }
1149
1150 if (!switch_ip || !ptss_ip)
1151 return 0;
1152
1153 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1154 if (!strcmp(sym->name, "perf_trace_sched_switch")) {
1155 ip = map->unmap_ip(map, sym->start);
1156 if (ip >= map->start && ip < map->end) {
1157 *ptss_ip = ip;
1158 break;
1159 }
1160 }
1161 }
1162
1163 return switch_ip;
1164}
1165
1166static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1167{
1168 const struct intel_pt_state *state = ptq->state;
1169 struct intel_pt *pt = ptq->pt;
1170 int err;
1171
1172 if (!pt->kernel_start) {
1173 pt->kernel_start = machine__kernel_start(pt->machine);
1174 if (pt->per_cpu_mmaps && pt->have_sched_switch &&
1175 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1176 !pt->sampling_mode) {
1177 pt->switch_ip = intel_pt_switch_ip(pt->machine,
1178 &pt->ptss_ip);
1179 if (pt->switch_ip) {
1180 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1181 pt->switch_ip, pt->ptss_ip);
1182 pt->sync_switch = true;
1183 }
1184 }
1185 }
1186
1187 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1188 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1189 while (1) {
1190 err = intel_pt_sample(ptq);
1191 if (err)
1192 return err;
1193
1194 state = intel_pt_decode(ptq->decoder);
1195 if (state->err) {
1196 if (state->err == INTEL_PT_ERR_NODATA)
1197 return 1;
1198 if (pt->sync_switch &&
1199 state->from_ip >= pt->kernel_start) {
1200 pt->sync_switch = false;
1201 intel_pt_next_tid(pt, ptq);
1202 }
1203 if (pt->synth_opts.errors) {
1204 err = intel_pt_synth_error(pt, state->err,
1205 ptq->cpu, ptq->pid,
1206 ptq->tid,
1207 state->from_ip);
1208 if (err)
1209 return err;
1210 }
1211 continue;
1212 }
1213
1214 ptq->state = state;
1215 ptq->have_sample = true;
1216 intel_pt_sample_flags(ptq);
1217
1218 /* Use estimated TSC upon return to user space */
1219 if (pt->est_tsc &&
1220 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1221 state->to_ip && state->to_ip < pt->kernel_start) {
1222 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1223 state->timestamp, state->est_timestamp);
1224 ptq->timestamp = state->est_timestamp;
1225 /* Use estimated TSC in unknown switch state */
1226 } else if (pt->sync_switch &&
1227 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1228 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1229 ptq->next_tid == -1) {
1230 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1231 state->timestamp, state->est_timestamp);
1232 ptq->timestamp = state->est_timestamp;
1233 } else if (state->timestamp > ptq->timestamp) {
1234 ptq->timestamp = state->timestamp;
1235 }
1236
1237 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1238 *timestamp = ptq->timestamp;
1239 return 0;
1240 }
1241 }
1242 return 0;
1243}
1244
1245static inline int intel_pt_update_queues(struct intel_pt *pt)
1246{
1247 if (pt->queues.new_data) {
1248 pt->queues.new_data = false;
1249 return intel_pt_setup_queues(pt);
1250 }
1251 return 0;
1252}
1253
1254static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1255{
1256 unsigned int queue_nr;
1257 u64 ts;
1258 int ret;
1259
1260 while (1) {
1261 struct auxtrace_queue *queue;
1262 struct intel_pt_queue *ptq;
1263
1264 if (!pt->heap.heap_cnt)
1265 return 0;
1266
1267 if (pt->heap.heap_array[0].ordinal >= timestamp)
1268 return 0;
1269
1270 queue_nr = pt->heap.heap_array[0].queue_nr;
1271 queue = &pt->queues.queue_array[queue_nr];
1272 ptq = queue->priv;
1273
1274 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1275 queue_nr, pt->heap.heap_array[0].ordinal,
1276 timestamp);
1277
1278 auxtrace_heap__pop(&pt->heap);
1279
1280 if (pt->heap.heap_cnt) {
1281 ts = pt->heap.heap_array[0].ordinal + 1;
1282 if (ts > timestamp)
1283 ts = timestamp;
1284 } else {
1285 ts = timestamp;
1286 }
1287
1288 intel_pt_set_pid_tid_cpu(pt, queue);
1289
1290 ret = intel_pt_run_decoder(ptq, &ts);
1291
1292 if (ret < 0) {
1293 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1294 return ret;
1295 }
1296
1297 if (!ret) {
1298 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1299 if (ret < 0)
1300 return ret;
1301 } else {
1302 ptq->on_heap = false;
1303 }
1304 }
1305
1306 return 0;
1307}
1308
1309static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1310 u64 time_)
1311{
1312 struct auxtrace_queues *queues = &pt->queues;
1313 unsigned int i;
1314 u64 ts = 0;
1315
1316 for (i = 0; i < queues->nr_queues; i++) {
1317 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1318 struct intel_pt_queue *ptq = queue->priv;
1319
1320 if (ptq && (tid == -1 || ptq->tid == tid)) {
1321 ptq->time = time_;
1322 intel_pt_set_pid_tid_cpu(pt, queue);
1323 intel_pt_run_decoder(ptq, &ts);
1324 }
1325 }
1326 return 0;
1327}
1328
1329static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1330{
1331 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1332 sample->pid, sample->tid, 0);
1333}
1334
1335static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1336{
1337 unsigned i, j;
1338
1339 if (cpu < 0 || !pt->queues.nr_queues)
1340 return NULL;
1341
1342 if ((unsigned)cpu >= pt->queues.nr_queues)
1343 i = pt->queues.nr_queues - 1;
1344 else
1345 i = cpu;
1346
1347 if (pt->queues.queue_array[i].cpu == cpu)
1348 return pt->queues.queue_array[i].priv;
1349
1350 for (j = 0; i > 0; j++) {
1351 if (pt->queues.queue_array[--i].cpu == cpu)
1352 return pt->queues.queue_array[i].priv;
1353 }
1354
1355 for (; j < pt->queues.nr_queues; j++) {
1356 if (pt->queues.queue_array[j].cpu == cpu)
1357 return pt->queues.queue_array[j].priv;
1358 }
1359
1360 return NULL;
1361}
1362
1363static int intel_pt_process_switch(struct intel_pt *pt,
1364 struct perf_sample *sample)
1365{
1366 struct intel_pt_queue *ptq;
1367 struct perf_evsel *evsel;
1368 pid_t tid;
1369 int cpu, err;
1370
1371 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1372 if (evsel != pt->switch_evsel)
1373 return 0;
1374
1375 tid = perf_evsel__intval(evsel, sample, "next_pid");
1376 cpu = sample->cpu;
1377
1378 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1379 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1380 &pt->tc));
1381
1382 if (!pt->sync_switch)
1383 goto out;
1384
1385 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1386 if (!ptq)
1387 goto out;
1388
1389 switch (ptq->switch_state) {
1390 case INTEL_PT_SS_NOT_TRACING:
1391 ptq->next_tid = -1;
1392 break;
1393 case INTEL_PT_SS_UNKNOWN:
1394 case INTEL_PT_SS_TRACING:
1395 ptq->next_tid = tid;
1396 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1397 return 0;
1398 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1399 if (!ptq->on_heap) {
1400 ptq->timestamp = perf_time_to_tsc(sample->time,
1401 &pt->tc);
1402 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1403 ptq->timestamp);
1404 if (err)
1405 return err;
1406 ptq->on_heap = true;
1407 }
1408 ptq->switch_state = INTEL_PT_SS_TRACING;
1409 break;
1410 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1411 ptq->next_tid = tid;
1412 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1413 break;
1414 default:
1415 break;
1416 }
1417out:
1418 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1419}
1420
1421static int intel_pt_process_itrace_start(struct intel_pt *pt,
1422 union perf_event *event,
1423 struct perf_sample *sample)
1424{
1425 if (!pt->per_cpu_mmaps)
1426 return 0;
1427
1428 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1429 sample->cpu, event->itrace_start.pid,
1430 event->itrace_start.tid, sample->time,
1431 perf_time_to_tsc(sample->time, &pt->tc));
1432
1433 return machine__set_current_tid(pt->machine, sample->cpu,
1434 event->itrace_start.pid,
1435 event->itrace_start.tid);
1436}
1437
1438static int intel_pt_process_event(struct perf_session *session,
1439 union perf_event *event,
1440 struct perf_sample *sample,
1441 struct perf_tool *tool)
1442{
1443 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1444 auxtrace);
1445 u64 timestamp;
1446 int err = 0;
1447
1448 if (dump_trace)
1449 return 0;
1450
1451 if (!tool->ordered_events) {
1452 pr_err("Intel Processor Trace requires ordered events\n");
1453 return -EINVAL;
1454 }
1455
Adrian Hunter81cd60c2015-08-20 11:51:32 +03001456 if (sample->time && sample->time != (u64)-1)
Adrian Hunter90e457f2015-07-17 19:33:41 +03001457 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1458 else
1459 timestamp = 0;
1460
1461 if (timestamp || pt->timeless_decoding) {
1462 err = intel_pt_update_queues(pt);
1463 if (err)
1464 return err;
1465 }
1466
1467 if (pt->timeless_decoding) {
1468 if (event->header.type == PERF_RECORD_EXIT) {
1469 err = intel_pt_process_timeless_queues(pt,
1470 event->comm.tid,
1471 sample->time);
1472 }
1473 } else if (timestamp) {
1474 err = intel_pt_process_queues(pt, timestamp);
1475 }
1476 if (err)
1477 return err;
1478
1479 if (event->header.type == PERF_RECORD_AUX &&
1480 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
1481 pt->synth_opts.errors) {
1482 err = intel_pt_lost(pt, sample);
1483 if (err)
1484 return err;
1485 }
1486
1487 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
1488 err = intel_pt_process_switch(pt, sample);
1489 else if (event->header.type == PERF_RECORD_ITRACE_START)
1490 err = intel_pt_process_itrace_start(pt, event, sample);
1491
1492 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
1493 perf_event__name(event->header.type), event->header.type,
1494 sample->cpu, sample->time, timestamp);
1495
1496 return err;
1497}
1498
1499static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
1500{
1501 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1502 auxtrace);
1503 int ret;
1504
1505 if (dump_trace)
1506 return 0;
1507
1508 if (!tool->ordered_events)
1509 return -EINVAL;
1510
1511 ret = intel_pt_update_queues(pt);
1512 if (ret < 0)
1513 return ret;
1514
1515 if (pt->timeless_decoding)
1516 return intel_pt_process_timeless_queues(pt, -1,
1517 MAX_TIMESTAMP - 1);
1518
1519 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
1520}
1521
1522static void intel_pt_free_events(struct perf_session *session)
1523{
1524 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1525 auxtrace);
1526 struct auxtrace_queues *queues = &pt->queues;
1527 unsigned int i;
1528
1529 for (i = 0; i < queues->nr_queues; i++) {
1530 intel_pt_free_queue(queues->queue_array[i].priv);
1531 queues->queue_array[i].priv = NULL;
1532 }
1533 intel_pt_log_disable();
1534 auxtrace_queues__free(queues);
1535}
1536
1537static void intel_pt_free(struct perf_session *session)
1538{
1539 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1540 auxtrace);
1541
1542 auxtrace_heap__free(&pt->heap);
1543 intel_pt_free_events(session);
1544 session->auxtrace = NULL;
1545 thread__delete(pt->unknown_thread);
1546 free(pt);
1547}
1548
1549static int intel_pt_process_auxtrace_event(struct perf_session *session,
1550 union perf_event *event,
1551 struct perf_tool *tool __maybe_unused)
1552{
1553 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1554 auxtrace);
1555
1556 if (pt->sampling_mode)
1557 return 0;
1558
1559 if (!pt->data_queued) {
1560 struct auxtrace_buffer *buffer;
1561 off_t data_offset;
1562 int fd = perf_data_file__fd(session->file);
1563 int err;
1564
1565 if (perf_data_file__is_pipe(session->file)) {
1566 data_offset = 0;
1567 } else {
1568 data_offset = lseek(fd, 0, SEEK_CUR);
1569 if (data_offset == -1)
1570 return -errno;
1571 }
1572
1573 err = auxtrace_queues__add_event(&pt->queues, session, event,
1574 data_offset, &buffer);
1575 if (err)
1576 return err;
1577
1578 /* Dump here now we have copied a piped trace out of the pipe */
1579 if (dump_trace) {
1580 if (auxtrace_buffer__get_data(buffer, fd)) {
1581 intel_pt_dump_event(pt, buffer->data,
1582 buffer->size);
1583 auxtrace_buffer__put_data(buffer);
1584 }
1585 }
1586 }
1587
1588 return 0;
1589}
1590
1591struct intel_pt_synth {
1592 struct perf_tool dummy_tool;
1593 struct perf_session *session;
1594};
1595
1596static int intel_pt_event_synth(struct perf_tool *tool,
1597 union perf_event *event,
1598 struct perf_sample *sample __maybe_unused,
1599 struct machine *machine __maybe_unused)
1600{
1601 struct intel_pt_synth *intel_pt_synth =
1602 container_of(tool, struct intel_pt_synth, dummy_tool);
1603
1604 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
1605 NULL);
1606}
1607
1608static int intel_pt_synth_event(struct perf_session *session,
1609 struct perf_event_attr *attr, u64 id)
1610{
1611 struct intel_pt_synth intel_pt_synth;
1612
1613 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
1614 intel_pt_synth.session = session;
1615
1616 return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
1617 &id, intel_pt_event_synth);
1618}
1619
1620static int intel_pt_synth_events(struct intel_pt *pt,
1621 struct perf_session *session)
1622{
1623 struct perf_evlist *evlist = session->evlist;
1624 struct perf_evsel *evsel;
1625 struct perf_event_attr attr;
1626 bool found = false;
1627 u64 id;
1628 int err;
1629
1630 evlist__for_each(evlist, evsel) {
1631 if (evsel->attr.type == pt->pmu_type && evsel->ids) {
1632 found = true;
1633 break;
1634 }
1635 }
1636
1637 if (!found) {
1638 pr_debug("There are no selected events with Intel Processor Trace data\n");
1639 return 0;
1640 }
1641
1642 memset(&attr, 0, sizeof(struct perf_event_attr));
1643 attr.size = sizeof(struct perf_event_attr);
1644 attr.type = PERF_TYPE_HARDWARE;
1645 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
1646 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
1647 PERF_SAMPLE_PERIOD;
1648 if (pt->timeless_decoding)
1649 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
1650 else
1651 attr.sample_type |= PERF_SAMPLE_TIME;
1652 if (!pt->per_cpu_mmaps)
1653 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
1654 attr.exclude_user = evsel->attr.exclude_user;
1655 attr.exclude_kernel = evsel->attr.exclude_kernel;
1656 attr.exclude_hv = evsel->attr.exclude_hv;
1657 attr.exclude_host = evsel->attr.exclude_host;
1658 attr.exclude_guest = evsel->attr.exclude_guest;
1659 attr.sample_id_all = evsel->attr.sample_id_all;
1660 attr.read_format = evsel->attr.read_format;
1661
1662 id = evsel->id[0] + 1000000000;
1663 if (!id)
1664 id = 1;
1665
1666 if (pt->synth_opts.instructions) {
1667 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1668 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
1669 attr.sample_period =
1670 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
1671 else
1672 attr.sample_period = pt->synth_opts.period;
1673 pt->instructions_sample_period = attr.sample_period;
1674 if (pt->synth_opts.callchain)
1675 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
1676 pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1677 id, (u64)attr.sample_type);
1678 err = intel_pt_synth_event(session, &attr, id);
1679 if (err) {
1680 pr_err("%s: failed to synthesize 'instructions' event type\n",
1681 __func__);
1682 return err;
1683 }
1684 pt->sample_instructions = true;
1685 pt->instructions_sample_type = attr.sample_type;
1686 pt->instructions_id = id;
1687 id += 1;
1688 }
1689
1690 if (pt->synth_opts.transactions) {
1691 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
1692 attr.sample_period = 1;
1693 if (pt->synth_opts.callchain)
1694 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
1695 pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1696 id, (u64)attr.sample_type);
1697 err = intel_pt_synth_event(session, &attr, id);
1698 if (err) {
1699 pr_err("%s: failed to synthesize 'transactions' event type\n",
1700 __func__);
1701 return err;
1702 }
1703 pt->sample_transactions = true;
1704 pt->transactions_id = id;
1705 id += 1;
1706 evlist__for_each(evlist, evsel) {
1707 if (evsel->id && evsel->id[0] == pt->transactions_id) {
1708 if (evsel->name)
1709 zfree(&evsel->name);
1710 evsel->name = strdup("transactions");
1711 break;
1712 }
1713 }
1714 }
1715
1716 if (pt->synth_opts.branches) {
1717 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
1718 attr.sample_period = 1;
1719 attr.sample_type |= PERF_SAMPLE_ADDR;
1720 attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
1721 pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
1722 id, (u64)attr.sample_type);
1723 err = intel_pt_synth_event(session, &attr, id);
1724 if (err) {
1725 pr_err("%s: failed to synthesize 'branches' event type\n",
1726 __func__);
1727 return err;
1728 }
1729 pt->sample_branches = true;
1730 pt->branches_sample_type = attr.sample_type;
1731 pt->branches_id = id;
1732 }
1733
1734 pt->synth_needs_swap = evsel->needs_swap;
1735
1736 return 0;
1737}
1738
1739static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
1740{
1741 struct perf_evsel *evsel;
1742
1743 evlist__for_each_reverse(evlist, evsel) {
1744 const char *name = perf_evsel__name(evsel);
1745
1746 if (!strcmp(name, "sched:sched_switch"))
1747 return evsel;
1748 }
1749
1750 return NULL;
1751}
1752
1753static const char * const intel_pt_info_fmts[] = {
1754 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
1755 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
1756 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
1757 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
1758 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
1759 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
1760 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
1761 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
1762 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
1763 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
1764};
1765
1766static void intel_pt_print_info(u64 *arr, int start, int finish)
1767{
1768 int i;
1769
1770 if (!dump_trace)
1771 return;
1772
1773 for (i = start; i <= finish; i++)
1774 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
1775}
1776
1777int intel_pt_process_auxtrace_info(union perf_event *event,
1778 struct perf_session *session)
1779{
1780 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
1781 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
1782 struct intel_pt *pt;
1783 int err;
1784
1785 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
1786 min_sz)
1787 return -EINVAL;
1788
1789 pt = zalloc(sizeof(struct intel_pt));
1790 if (!pt)
1791 return -ENOMEM;
1792
1793 err = auxtrace_queues__init(&pt->queues);
1794 if (err)
1795 goto err_free;
1796
1797 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
1798
1799 pt->session = session;
1800 pt->machine = &session->machines.host; /* No kvm support */
1801 pt->auxtrace_type = auxtrace_info->type;
1802 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
1803 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
1804 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
1805 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
1806 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
1807 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
1808 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
1809 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
1810 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
1811 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
1812 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
1813 INTEL_PT_PER_CPU_MMAPS);
1814
1815 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
1816 pt->have_tsc = intel_pt_have_tsc(pt);
1817 pt->sampling_mode = false;
1818 pt->est_tsc = !pt->timeless_decoding;
1819
1820 pt->unknown_thread = thread__new(999999999, 999999999);
1821 if (!pt->unknown_thread) {
1822 err = -ENOMEM;
1823 goto err_free_queues;
1824 }
1825 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
1826 if (err)
1827 goto err_delete_thread;
1828 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
1829 err = -ENOMEM;
1830 goto err_delete_thread;
1831 }
1832
1833 pt->auxtrace.process_event = intel_pt_process_event;
1834 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
1835 pt->auxtrace.flush_events = intel_pt_flush;
1836 pt->auxtrace.free_events = intel_pt_free_events;
1837 pt->auxtrace.free = intel_pt_free;
1838 session->auxtrace = &pt->auxtrace;
1839
1840 if (dump_trace)
1841 return 0;
1842
1843 if (pt->have_sched_switch == 1) {
1844 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
1845 if (!pt->switch_evsel) {
1846 pr_err("%s: missing sched_switch event\n", __func__);
1847 goto err_delete_thread;
1848 }
1849 }
1850
1851 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
1852 pt->synth_opts = *session->itrace_synth_opts;
1853 } else {
1854 itrace_synth_opts__set_default(&pt->synth_opts);
1855 if (use_browser != -1) {
1856 pt->synth_opts.branches = false;
1857 pt->synth_opts.callchain = true;
1858 }
1859 }
1860
1861 if (pt->synth_opts.log)
1862 intel_pt_log_enable();
1863
1864 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
1865 if (pt->tc.time_mult) {
1866 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
1867
1868 pt->max_non_turbo_ratio = (tsc_freq + 50000000) / 100000000;
1869 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
1870 intel_pt_log("Maximum non-turbo ratio %u\n",
1871 pt->max_non_turbo_ratio);
1872 }
1873
1874 if (pt->synth_opts.calls)
1875 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
1876 PERF_IP_FLAG_TRACE_END;
1877 if (pt->synth_opts.returns)
1878 pt->branches_filter |= PERF_IP_FLAG_RETURN |
1879 PERF_IP_FLAG_TRACE_BEGIN;
1880
1881 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
1882 symbol_conf.use_callchain = true;
1883 if (callchain_register_param(&callchain_param) < 0) {
1884 symbol_conf.use_callchain = false;
1885 pt->synth_opts.callchain = false;
1886 }
1887 }
1888
1889 err = intel_pt_synth_events(pt, session);
1890 if (err)
1891 goto err_delete_thread;
1892
1893 err = auxtrace_queues__process_index(&pt->queues, session);
1894 if (err)
1895 goto err_delete_thread;
1896
1897 if (pt->queues.populated)
1898 pt->data_queued = true;
1899
1900 if (pt->timeless_decoding)
1901 pr_debug2("Intel PT decoding without timestamps\n");
1902
1903 return 0;
1904
1905err_delete_thread:
1906 thread__delete(pt->unknown_thread);
1907err_free_queues:
1908 intel_pt_log_disable();
1909 auxtrace_queues__free(&pt->queues);
1910 session->auxtrace = NULL;
1911err_free:
1912 free(pt);
1913 return err;
1914}