Satyajit Desai | cd8c36c | 2016-10-17 17:48:05 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012, 2016-2017, The Linux Foundation. All rights reserved. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef _LINUX_CORESIGHT_H |
| 14 | #define _LINUX_CORESIGHT_H |
| 15 | |
| 16 | #include <linux/device.h> |
Mathieu Poirier | 882d5e1 | 2016-02-17 17:51:57 -0700 | [diff] [blame] | 17 | #include <linux/perf_event.h> |
Mark Brown | ff63ec1 | 2015-07-31 09:37:30 -0600 | [diff] [blame] | 18 | #include <linux/sched.h> |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 19 | |
| 20 | /* Peripheral id registers (0xFD0-0xFEC) */ |
| 21 | #define CORESIGHT_PERIPHIDR4 0xfd0 |
| 22 | #define CORESIGHT_PERIPHIDR5 0xfd4 |
| 23 | #define CORESIGHT_PERIPHIDR6 0xfd8 |
| 24 | #define CORESIGHT_PERIPHIDR7 0xfdC |
| 25 | #define CORESIGHT_PERIPHIDR0 0xfe0 |
| 26 | #define CORESIGHT_PERIPHIDR1 0xfe4 |
| 27 | #define CORESIGHT_PERIPHIDR2 0xfe8 |
| 28 | #define CORESIGHT_PERIPHIDR3 0xfeC |
| 29 | /* Component id registers (0xFF0-0xFFC) */ |
| 30 | #define CORESIGHT_COMPIDR0 0xff0 |
| 31 | #define CORESIGHT_COMPIDR1 0xff4 |
| 32 | #define CORESIGHT_COMPIDR2 0xff8 |
| 33 | #define CORESIGHT_COMPIDR3 0xffC |
| 34 | |
| 35 | #define ETM_ARCH_V3_3 0x23 |
| 36 | #define ETM_ARCH_V3_5 0x25 |
| 37 | #define PFT_ARCH_V1_0 0x30 |
| 38 | #define PFT_ARCH_V1_1 0x31 |
| 39 | |
| 40 | #define CORESIGHT_UNLOCK 0xc5acce55 |
| 41 | |
| 42 | extern struct bus_type coresight_bustype; |
| 43 | |
Satyajit Desai | f151d68 | 2016-09-12 16:18:03 -0700 | [diff] [blame] | 44 | enum coresight_clk_rate { |
| 45 | CORESIGHT_CLK_RATE_OFF, |
| 46 | CORESIGHT_CLK_RATE_TRACE = 1000, |
| 47 | CORESIGHT_CLK_RATE_HSTRACE = 2000, |
| 48 | CORESIGHT_CLK_RATE_FIXED = 3000, |
| 49 | }; |
| 50 | |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 51 | enum coresight_dev_type { |
| 52 | CORESIGHT_DEV_TYPE_NONE, |
| 53 | CORESIGHT_DEV_TYPE_SINK, |
| 54 | CORESIGHT_DEV_TYPE_LINK, |
| 55 | CORESIGHT_DEV_TYPE_LINKSINK, |
| 56 | CORESIGHT_DEV_TYPE_SOURCE, |
| 57 | }; |
| 58 | |
| 59 | enum coresight_dev_subtype_sink { |
| 60 | CORESIGHT_DEV_SUBTYPE_SINK_NONE, |
| 61 | CORESIGHT_DEV_SUBTYPE_SINK_PORT, |
| 62 | CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, |
| 63 | }; |
| 64 | |
| 65 | enum coresight_dev_subtype_link { |
| 66 | CORESIGHT_DEV_SUBTYPE_LINK_NONE, |
| 67 | CORESIGHT_DEV_SUBTYPE_LINK_MERG, |
| 68 | CORESIGHT_DEV_SUBTYPE_LINK_SPLIT, |
| 69 | CORESIGHT_DEV_SUBTYPE_LINK_FIFO, |
| 70 | }; |
| 71 | |
| 72 | enum coresight_dev_subtype_source { |
| 73 | CORESIGHT_DEV_SUBTYPE_SOURCE_NONE, |
| 74 | CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, |
| 75 | CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, |
| 76 | CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, |
| 77 | }; |
| 78 | |
| 79 | /** |
| 80 | * struct coresight_dev_subtype - further characterisation of a type |
| 81 | * @sink_subtype: type of sink this component is, as defined |
| 82 | by @coresight_dev_subtype_sink. |
| 83 | * @link_subtype: type of link this component is, as defined |
| 84 | by @coresight_dev_subtype_link. |
| 85 | * @source_subtype: type of source this component is, as defined |
| 86 | by @coresight_dev_subtype_source. |
| 87 | */ |
| 88 | struct coresight_dev_subtype { |
| 89 | enum coresight_dev_subtype_sink sink_subtype; |
| 90 | enum coresight_dev_subtype_link link_subtype; |
| 91 | enum coresight_dev_subtype_source source_subtype; |
| 92 | }; |
| 93 | |
| 94 | /** |
| 95 | * struct coresight_platform_data - data harvested from the DT specification |
| 96 | * @cpu: the CPU a source belongs to. Only applicable for ETM/PTMs. |
| 97 | * @name: name of the component as shown under sysfs. |
| 98 | * @nr_inport: number of input ports for this component. |
Pankaj Dubey | 8ee885a | 2014-11-13 14:12:48 +0530 | [diff] [blame] | 99 | * @outports: list of remote endpoint port number. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 100 | * @child_names:name of all child components connected to this device. |
| 101 | * @child_ports:child component port number the current component is |
| 102 | connected to. |
| 103 | * @nr_outport: number of output ports for this component. |
| 104 | * @clk: The clock this component is associated to. |
| 105 | */ |
| 106 | struct coresight_platform_data { |
| 107 | int cpu; |
| 108 | const char *name; |
| 109 | int nr_inport; |
| 110 | int *outports; |
| 111 | const char **child_names; |
| 112 | int *child_ports; |
| 113 | int nr_outport; |
| 114 | struct clk *clk; |
| 115 | }; |
| 116 | |
| 117 | /** |
| 118 | * struct coresight_desc - description of a component required from drivers |
| 119 | * @type: as defined by @coresight_dev_type. |
| 120 | * @subtype: as defined by @coresight_dev_subtype. |
| 121 | * @ops: generic operations for this component, as defined |
| 122 | by @coresight_ops. |
| 123 | * @pdata: platform data collected from DT. |
| 124 | * @dev: The device entity associated to this component. |
Pankaj Dubey | 8ee885a | 2014-11-13 14:12:48 +0530 | [diff] [blame] | 125 | * @groups: operations specific to this component. These will end up |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 126 | in the component's sysfs sub-directory. |
| 127 | */ |
| 128 | struct coresight_desc { |
| 129 | enum coresight_dev_type type; |
| 130 | struct coresight_dev_subtype subtype; |
| 131 | const struct coresight_ops *ops; |
| 132 | struct coresight_platform_data *pdata; |
| 133 | struct device *dev; |
| 134 | const struct attribute_group **groups; |
| 135 | }; |
| 136 | |
| 137 | /** |
| 138 | * struct coresight_connection - representation of a single connection |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 139 | * @outport: a connection's output port number. |
| 140 | * @chid_name: remote component's name. |
| 141 | * @child_port: remote component's port number @output is connected to. |
| 142 | * @child_dev: a @coresight_device representation of the component |
| 143 | connected to @outport. |
| 144 | */ |
| 145 | struct coresight_connection { |
| 146 | int outport; |
| 147 | const char *child_name; |
| 148 | int child_port; |
| 149 | struct coresight_device *child_dev; |
| 150 | }; |
| 151 | |
| 152 | /** |
| 153 | * struct coresight_device - representation of a device as used by the framework |
Pankaj Dubey | 8ee885a | 2014-11-13 14:12:48 +0530 | [diff] [blame] | 154 | * @conns: array of coresight_connections associated to this component. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 155 | * @nr_inport: number of input port associated to this component. |
| 156 | * @nr_outport: number of output port associated to this component. |
| 157 | * @type: as defined by @coresight_dev_type. |
| 158 | * @subtype: as defined by @coresight_dev_subtype. |
| 159 | * @ops: generic operations for this component, as defined |
| 160 | by @coresight_ops. |
| 161 | * @dev: The device entity associated to this component. |
| 162 | * @refcnt: keep track of what is in use. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 163 | * @orphan: true if the component has connections that haven't been linked. |
| 164 | * @enable: 'true' if component is currently part of an active path. |
| 165 | * @activated: 'true' only if a _sink_ has been activated. A sink can be |
| 166 | activated but not yet enabled. Enabling for a _sink_ |
| 167 | happens when a source has been selected for that it. |
| 168 | */ |
| 169 | struct coresight_device { |
| 170 | struct coresight_connection *conns; |
| 171 | int nr_inport; |
| 172 | int nr_outport; |
| 173 | enum coresight_dev_type type; |
| 174 | struct coresight_dev_subtype subtype; |
| 175 | const struct coresight_ops *ops; |
| 176 | struct device dev; |
| 177 | atomic_t *refcnt; |
Satyajit Desai | cd8c36c | 2016-10-17 17:48:05 -0700 | [diff] [blame] | 178 | struct coresight_path *node; |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 179 | bool orphan; |
| 180 | bool enable; /* true only if configured as part of a path */ |
| 181 | bool activated; /* true only if a sink is part of a path */ |
| 182 | }; |
| 183 | |
| 184 | #define to_coresight_device(d) container_of(d, struct coresight_device, dev) |
| 185 | |
| 186 | #define source_ops(csdev) csdev->ops->source_ops |
| 187 | #define sink_ops(csdev) csdev->ops->sink_ops |
| 188 | #define link_ops(csdev) csdev->ops->link_ops |
| 189 | |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 190 | /** |
| 191 | * struct coresight_ops_sink - basic operations for a sink |
| 192 | * Operations available for sinks |
Mathieu Poirier | 2997aa4 | 2016-02-17 17:52:00 -0700 | [diff] [blame] | 193 | * @enable: enables the sink. |
| 194 | * @disable: disables the sink. |
| 195 | * @alloc_buffer: initialises perf's ring buffer for trace collection. |
| 196 | * @free_buffer: release memory allocated in @get_config. |
| 197 | * @set_buffer: initialises buffer mechanic before a trace session. |
| 198 | * @reset_buffer: finalises buffer mechanic after a trace session. |
| 199 | * @update_buffer: update buffer pointers after a trace session. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 200 | */ |
| 201 | struct coresight_ops_sink { |
Mathieu Poirier | e827d45 | 2016-02-17 17:51:59 -0700 | [diff] [blame] | 202 | int (*enable)(struct coresight_device *csdev, u32 mode); |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 203 | void (*disable)(struct coresight_device *csdev); |
Mathieu Poirier | 2997aa4 | 2016-02-17 17:52:00 -0700 | [diff] [blame] | 204 | void *(*alloc_buffer)(struct coresight_device *csdev, int cpu, |
| 205 | void **pages, int nr_pages, bool overwrite); |
| 206 | void (*free_buffer)(void *config); |
| 207 | int (*set_buffer)(struct coresight_device *csdev, |
| 208 | struct perf_output_handle *handle, |
| 209 | void *sink_config); |
| 210 | unsigned long (*reset_buffer)(struct coresight_device *csdev, |
| 211 | struct perf_output_handle *handle, |
| 212 | void *sink_config, bool *lost); |
| 213 | void (*update_buffer)(struct coresight_device *csdev, |
| 214 | struct perf_output_handle *handle, |
| 215 | void *sink_config); |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 216 | }; |
| 217 | |
| 218 | /** |
| 219 | * struct coresight_ops_link - basic operations for a link |
| 220 | * Operations available for links. |
| 221 | * @enable: enables flow between iport and oport. |
| 222 | * @disable: disables flow between iport and oport. |
| 223 | */ |
| 224 | struct coresight_ops_link { |
| 225 | int (*enable)(struct coresight_device *csdev, int iport, int oport); |
| 226 | void (*disable)(struct coresight_device *csdev, int iport, int oport); |
| 227 | }; |
| 228 | |
| 229 | /** |
| 230 | * struct coresight_ops_source - basic operations for a source |
| 231 | * Operations available for sources. |
Mathieu Poirier | 52210c8 | 2016-02-02 14:14:01 -0700 | [diff] [blame] | 232 | * @cpu_id: returns the value of the CPU number this component |
| 233 | * is associated to. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 234 | * @trace_id: returns the value of the component's trace ID as known |
Mathieu Poirier | 882d5e1 | 2016-02-17 17:51:57 -0700 | [diff] [blame] | 235 | * to the HW. |
Mathieu Poirier | 1d27ff5 | 2015-10-07 09:26:39 -0600 | [diff] [blame] | 236 | * @enable: enables tracing for a source. |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 237 | * @disable: disables tracing for a source. |
| 238 | */ |
| 239 | struct coresight_ops_source { |
Mathieu Poirier | 52210c8 | 2016-02-02 14:14:01 -0700 | [diff] [blame] | 240 | int (*cpu_id)(struct coresight_device *csdev); |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 241 | int (*trace_id)(struct coresight_device *csdev); |
Mathieu Poirier | 882d5e1 | 2016-02-17 17:51:57 -0700 | [diff] [blame] | 242 | int (*enable)(struct coresight_device *csdev, |
Mathieu Poirier | 68905d7 | 2016-08-25 15:19:10 -0600 | [diff] [blame] | 243 | struct perf_event *event, u32 mode); |
| 244 | void (*disable)(struct coresight_device *csdev, |
| 245 | struct perf_event *event); |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 246 | }; |
| 247 | |
| 248 | struct coresight_ops { |
| 249 | const struct coresight_ops_sink *sink_ops; |
| 250 | const struct coresight_ops_link *link_ops; |
| 251 | const struct coresight_ops_source *source_ops; |
| 252 | }; |
| 253 | |
| 254 | #ifdef CONFIG_CORESIGHT |
| 255 | extern struct coresight_device * |
| 256 | coresight_register(struct coresight_desc *desc); |
| 257 | extern void coresight_unregister(struct coresight_device *csdev); |
| 258 | extern int coresight_enable(struct coresight_device *csdev); |
| 259 | extern void coresight_disable(struct coresight_device *csdev); |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 260 | extern int coresight_timeout(void __iomem *addr, u32 offset, |
| 261 | int position, int value); |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 262 | #else |
| 263 | static inline struct coresight_device * |
| 264 | coresight_register(struct coresight_desc *desc) { return NULL; } |
| 265 | static inline void coresight_unregister(struct coresight_device *csdev) {} |
| 266 | static inline int |
| 267 | coresight_enable(struct coresight_device *csdev) { return -ENOSYS; } |
| 268 | static inline void coresight_disable(struct coresight_device *csdev) {} |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 269 | static inline int coresight_timeout(void __iomem *addr, u32 offset, |
| 270 | int position, int value) { return 1; } |
Mathieu Poirier | c61c4b5 | 2015-01-09 16:57:20 -0700 | [diff] [blame] | 271 | #endif |
| 272 | |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 273 | #ifdef CONFIG_OF |
Mathieu Poirier | c61c4b5 | 2015-01-09 16:57:20 -0700 | [diff] [blame] | 274 | extern struct coresight_platform_data *of_get_coresight_platform_data( |
| 275 | struct device *dev, struct device_node *node); |
| 276 | #else |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 277 | static inline struct coresight_platform_data *of_get_coresight_platform_data( |
| 278 | struct device *dev, struct device_node *node) { return NULL; } |
| 279 | #endif |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 280 | |
Chunyan Zhang | 7221022 | 2015-07-31 09:37:26 -0600 | [diff] [blame] | 281 | #ifdef CONFIG_PID_NS |
| 282 | static inline unsigned long |
| 283 | coresight_vpid_to_pid(unsigned long vpid) |
| 284 | { |
| 285 | struct task_struct *task = NULL; |
| 286 | unsigned long pid = 0; |
| 287 | |
| 288 | rcu_read_lock(); |
| 289 | task = find_task_by_vpid(vpid); |
| 290 | if (task) |
| 291 | pid = task_pid_nr(task); |
| 292 | rcu_read_unlock(); |
| 293 | |
| 294 | return pid; |
| 295 | } |
| 296 | #else |
| 297 | static inline unsigned long |
| 298 | coresight_vpid_to_pid(unsigned long vpid) { return vpid; } |
| 299 | #endif |
| 300 | |
Pratik Patel | a06ae86 | 2014-11-03 11:07:35 -0700 | [diff] [blame] | 301 | #endif |