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Paul Walmsleyecb24aa2008-08-19 11:08:43 +03001/*
Paul Walmsley98fa3d82010-01-26 20:13:13 -07002 * OMAP3 powerdomain definitions
Paul Walmsleyecb24aa2008-08-19 11:08:43 +03003 *
4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
Paul Walmsley4cb49fe2011-03-07 19:28:15 -07005 * Copyright (C) 2007-2011 Nokia Corporation
Paul Walmsleyecb24aa2008-08-19 11:08:43 +03006 *
Paul Walmsley6e014782010-12-21 20:01:20 -07007 * Paul Walmsley, Jouni Högander
Paul Walmsleyecb24aa2008-08-19 11:08:43 +03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
Paul Walmsley6e014782010-12-21 20:01:20 -070014#include <linux/kernel.h>
15#include <linux/init.h>
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030016
Paul Walmsley72e06d02010-12-21 21:05:16 -070017#include "powerdomain.h"
Paul Walmsley6e014782010-12-21 20:01:20 -070018#include "powerdomains2xxx_3xxx_data.h"
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030019
20#include "prcm-common.h"
Paul Walmsley59fb6592010-12-21 15:30:55 -070021#include "prm2xxx_3xxx.h"
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030022#include "prm-regbits-34xx.h"
Paul Walmsley59fb6592010-12-21 15:30:55 -070023#include "cm2xxx_3xxx.h"
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030024#include "cm-regbits-34xx.h"
25
26/*
27 * 34XX-specific powerdomains, dependencies
28 */
29
Paul Walmsley98fa3d82010-01-26 20:13:13 -070030#ifdef CONFIG_ARCH_OMAP3
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030031
32/*
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030033 * Powerdomains
34 */
35
36static struct powerdomain iva2_pwrdm = {
37 .name = "iva2_pwrdm",
38 .prcm_offs = OMAP3430_IVA2_MOD,
39 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030040 .pwrsts = PWRSTS_OFF_RET_ON,
41 .pwrsts_logic_ret = PWRSTS_OFF_RET,
42 .banks = 4,
43 .pwrsts_mem_ret = {
44 [0] = PWRSTS_OFF_RET,
45 [1] = PWRSTS_OFF_RET,
46 [2] = PWRSTS_OFF_RET,
47 [3] = PWRSTS_OFF_RET,
48 },
49 .pwrsts_mem_on = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -070050 [0] = PWRSTS_ON,
51 [1] = PWRSTS_ON,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030052 [2] = PWRSTS_OFF_ON,
Paul Walmsley4cb49fe2011-03-07 19:28:15 -070053 [3] = PWRSTS_ON,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030054 },
55};
56
Paul Walmsley98fa3d82010-01-26 20:13:13 -070057static struct powerdomain mpu_3xxx_pwrdm = {
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030058 .name = "mpu_pwrdm",
59 .prcm_offs = MPU_MOD,
60 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030061 .pwrsts = PWRSTS_OFF_RET_ON,
62 .pwrsts_logic_ret = PWRSTS_OFF_RET,
Thara Gopinath3863c742009-12-08 16:33:15 -070063 .flags = PWRDM_HAS_MPU_QUIRK,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030064 .banks = 1,
65 .pwrsts_mem_ret = {
66 [0] = PWRSTS_OFF_RET,
67 },
68 .pwrsts_mem_on = {
69 [0] = PWRSTS_OFF_ON,
70 },
71};
72
Anand Gadiyar58dcfb32010-07-14 13:38:49 +000073/*
74 * The USBTLL Save-and-Restore mechanism is broken on
Lucas De Marchi25985ed2011-03-30 22:57:33 -030075 * 3430s up to ES3.0 and 3630ES1.0. Hence this feature
Anand Gadiyar58dcfb32010-07-14 13:38:49 +000076 * needs to be disabled on these chips.
77 * Refer: 3430 errata ID i459 and 3630 errata ID i579
Jean Pihet447b8da2010-11-17 17:52:11 +000078 *
79 * Note: setting the SAR flag could help for errata ID i478
80 * which applies to 3430 <= ES3.1, but since the SAR feature
81 * is broken, do not use it.
Anand Gadiyar58dcfb32010-07-14 13:38:49 +000082 */
Paul Walmsley98fa3d82010-01-26 20:13:13 -070083static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030084 .name = "core_pwrdm",
85 .prcm_offs = CORE_MOD,
Paul Walmsley7eb1afc2009-02-05 20:45:28 -070086 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
87 CHIP_IS_OMAP3430ES2 |
Anand Gadiyar58dcfb32010-07-14 13:38:49 +000088 CHIP_IS_OMAP3430ES3_0 |
89 CHIP_IS_OMAP3630ES1),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030090 .pwrsts = PWRSTS_OFF_RET_ON,
Thara Gopinath4133a442010-02-24 12:05:50 -070091 .pwrsts_logic_ret = PWRSTS_OFF_RET,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +030092 .banks = 2,
93 .pwrsts_mem_ret = {
94 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
95 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
96 },
97 .pwrsts_mem_on = {
98 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
99 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
100 },
101};
102
Paul Walmsley98fa3d82010-01-26 20:13:13 -0700103static struct powerdomain core_3xxx_es3_1_pwrdm = {
Paul Walmsley7eb1afc2009-02-05 20:45:28 -0700104 .name = "core_pwrdm",
105 .prcm_offs = CORE_MOD,
Anand Gadiyar58dcfb32010-07-14 13:38:49 +0000106 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 |
107 CHIP_GE_OMAP3630ES1_1),
Paul Walmsley7eb1afc2009-02-05 20:45:28 -0700108 .pwrsts = PWRSTS_OFF_RET_ON,
Thara Gopinath4133a442010-02-24 12:05:50 -0700109 .pwrsts_logic_ret = PWRSTS_OFF_RET,
Jean Pihet447b8da2010-11-17 17:52:11 +0000110 /*
111 * Setting the SAR flag for errata ID i478 which applies
112 * to 3430 <= ES3.1
113 */
Paul Walmsley7eb1afc2009-02-05 20:45:28 -0700114 .flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */
115 .banks = 2,
116 .pwrsts_mem_ret = {
117 [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */
118 [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */
119 },
120 .pwrsts_mem_on = {
121 [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
122 [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
123 },
124};
125
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300126static struct powerdomain dss_pwrdm = {
127 .name = "dss_pwrdm",
128 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
129 .prcm_offs = OMAP3430_DSS_MOD,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300130 .pwrsts = PWRSTS_OFF_RET_ON,
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700131 .pwrsts_logic_ret = PWRSTS_RET,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300132 .banks = 1,
133 .pwrsts_mem_ret = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700134 [0] = PWRSTS_RET, /* MEMRETSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300135 },
136 .pwrsts_mem_on = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700137 [0] = PWRSTS_ON, /* MEMONSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300138 },
139};
140
Paul Walmsleybe48ea72009-01-27 19:44:28 -0700141/*
142 * Although the 34XX TRM Rev K Table 4-371 notes that retention is a
143 * possible SGX powerstate, the SGX device itself does not support
144 * retention.
145 */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300146static struct powerdomain sgx_pwrdm = {
147 .name = "sgx_pwrdm",
148 .prcm_offs = OMAP3430ES2_SGX_MOD,
Paul Walmsleyd41ad522009-02-05 20:45:25 -0700149 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300150 /* XXX This is accurate for 3430 SGX, but what about GFX? */
Paul Walmsleybe48ea72009-01-27 19:44:28 -0700151 .pwrsts = PWRSTS_OFF_ON,
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700152 .pwrsts_logic_ret = PWRSTS_RET,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300153 .banks = 1,
154 .pwrsts_mem_ret = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700155 [0] = PWRSTS_RET, /* MEMRETSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300156 },
157 .pwrsts_mem_on = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700158 [0] = PWRSTS_ON, /* MEMONSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300159 },
160};
161
162static struct powerdomain cam_pwrdm = {
163 .name = "cam_pwrdm",
164 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
165 .prcm_offs = OMAP3430_CAM_MOD,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300166 .pwrsts = PWRSTS_OFF_RET_ON,
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700167 .pwrsts_logic_ret = PWRSTS_RET,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300168 .banks = 1,
169 .pwrsts_mem_ret = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700170 [0] = PWRSTS_RET, /* MEMRETSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300171 },
172 .pwrsts_mem_on = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700173 [0] = PWRSTS_ON, /* MEMONSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300174 },
175};
176
177static struct powerdomain per_pwrdm = {
178 .name = "per_pwrdm",
179 .prcm_offs = OMAP3430_PER_MOD,
180 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300181 .pwrsts = PWRSTS_OFF_RET_ON,
182 .pwrsts_logic_ret = PWRSTS_OFF_RET,
183 .banks = 1,
184 .pwrsts_mem_ret = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700185 [0] = PWRSTS_RET, /* MEMRETSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300186 },
187 .pwrsts_mem_on = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700188 [0] = PWRSTS_ON, /* MEMONSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300189 },
190};
191
192static struct powerdomain emu_pwrdm = {
193 .name = "emu_pwrdm",
194 .prcm_offs = OMAP3430_EMU_MOD,
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
196};
197
198static struct powerdomain neon_pwrdm = {
199 .name = "neon_pwrdm",
200 .prcm_offs = OMAP3430_NEON_MOD,
201 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300202 .pwrsts = PWRSTS_OFF_RET_ON,
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700203 .pwrsts_logic_ret = PWRSTS_RET,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300204};
205
206static struct powerdomain usbhost_pwrdm = {
207 .name = "usbhost_pwrdm",
208 .prcm_offs = OMAP3430ES2_USBHOST_MOD,
Paul Walmsleyd41ad522009-02-05 20:45:25 -0700209 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300210 .pwrsts = PWRSTS_OFF_RET_ON,
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700211 .pwrsts_logic_ret = PWRSTS_RET,
Kalle Jokiniemi867d3202009-04-23 13:58:51 +0300212 /*
213 * REVISIT: Enabling usb host save and restore mechanism seems to
214 * leave the usb host domain permanently in ACTIVE mode after
215 * changing the usb host power domain state from OFF to active once.
216 * Disabling for now.
217 */
218 /*.flags = PWRDM_HAS_HDWR_SAR,*/ /* for USBHOST ctrlr only */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300219 .banks = 1,
220 .pwrsts_mem_ret = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700221 [0] = PWRSTS_RET, /* MEMRETSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300222 },
223 .pwrsts_mem_on = {
Paul Walmsley4cb49fe2011-03-07 19:28:15 -0700224 [0] = PWRSTS_ON, /* MEMONSTATE */
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300225 },
226};
227
Paul Walmsley46e0ccf2009-01-27 19:44:18 -0700228static struct powerdomain dpll1_pwrdm = {
229 .name = "dpll1_pwrdm",
230 .prcm_offs = MPU_MOD,
231 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
232};
233
234static struct powerdomain dpll2_pwrdm = {
235 .name = "dpll2_pwrdm",
236 .prcm_offs = OMAP3430_IVA2_MOD,
237 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
238};
239
240static struct powerdomain dpll3_pwrdm = {
241 .name = "dpll3_pwrdm",
242 .prcm_offs = PLL_MOD,
243 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
244};
245
246static struct powerdomain dpll4_pwrdm = {
247 .name = "dpll4_pwrdm",
248 .prcm_offs = PLL_MOD,
249 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
250};
251
252static struct powerdomain dpll5_pwrdm = {
253 .name = "dpll5_pwrdm",
254 .prcm_offs = PLL_MOD,
Paul Walmsleyd41ad522009-02-05 20:45:25 -0700255 .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
Paul Walmsley46e0ccf2009-01-27 19:44:18 -0700256};
257
Paul Walmsley6e014782010-12-21 20:01:20 -0700258/* As powerdomains are added or removed above, this list must also be changed */
259static struct powerdomain *powerdomains_omap3xxx[] __initdata = {
Paul Walmsley46e0ccf2009-01-27 19:44:18 -0700260
Paul Walmsley6e014782010-12-21 20:01:20 -0700261 &wkup_omap2_pwrdm,
262 &gfx_omap2_pwrdm,
263 &iva2_pwrdm,
264 &mpu_3xxx_pwrdm,
265 &neon_pwrdm,
266 &core_3xxx_pre_es3_1_pwrdm,
267 &core_3xxx_es3_1_pwrdm,
268 &cam_pwrdm,
269 &dss_pwrdm,
270 &per_pwrdm,
271 &emu_pwrdm,
272 &sgx_pwrdm,
273 &usbhost_pwrdm,
274 &dpll1_pwrdm,
275 &dpll2_pwrdm,
276 &dpll3_pwrdm,
277 &dpll4_pwrdm,
278 &dpll5_pwrdm,
Paul Walmsleyecb24aa2008-08-19 11:08:43 +0300279#endif
Paul Walmsley6e014782010-12-21 20:01:20 -0700280 NULL
281};
282
283
284void __init omap3xxx_powerdomains_init(void)
285{
Paul Walmsley129c65e2011-09-14 16:01:21 -0600286 pwrdm_register_platform_funcs(&omap3_pwrdm_operations);
287 pwrdm_register_pwrdms(powerdomains_omap3xxx);
288 pwrdm_complete_init();
Paul Walmsley6e014782010-12-21 20:01:20 -0700289}