Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP4 Power domains framework |
| 3 | * |
Benoit Cousson | 9a2a360 | 2011-07-09 20:42:11 -0600 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Texas Instruments, Inc. |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 5 | * Copyright (C) 2009-2011 Nokia Corporation |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 6 | * |
| 7 | * Abhijit Pagare (abhijitpagare@ti.com) |
| 8 | * Benoit Cousson (b-cousson@ti.com) |
Benoit Cousson | 7932870 | 2010-05-20 12:31:11 -0600 | [diff] [blame] | 9 | * Paul Walmsley (paul@pwsan.com) |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 10 | * |
| 11 | * This file is automatically generated from the OMAP hardware databases. |
| 12 | * We respectfully ask that any modifications to this file be coordinated |
| 13 | * with the public linux-omap@vger.kernel.org mailing list and the |
| 14 | * authors above to ensure that the autogeneration scripts are kept |
| 15 | * up-to-date with the file contents. |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or modify |
| 18 | * it under the terms of the GNU General Public License version 2 as |
| 19 | * published by the Free Software Foundation. |
| 20 | */ |
| 21 | |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/init.h> |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 24 | |
Paul Walmsley | 72e06d0 | 2010-12-21 21:05:16 -0700 | [diff] [blame] | 25 | #include "powerdomain.h" |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 26 | |
| 27 | #include "prcm-common.h" |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 28 | #include "prcm44xx.h" |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 29 | #include "prm-regbits-44xx.h" |
Paul Walmsley | d198b51 | 2010-12-21 15:30:54 -0700 | [diff] [blame] | 30 | #include "prm44xx.h" |
| 31 | #include "prcm_mpu44xx.h" |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 32 | |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 33 | /* core_44xx_pwrdm: CORE power domain */ |
| 34 | static struct powerdomain core_44xx_pwrdm = { |
| 35 | .name = "core_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 36 | .prcm_offs = OMAP4430_PRM_CORE_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 37 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 38 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 39 | .pwrsts = PWRSTS_RET_ON, |
| 40 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 41 | .banks = 5, |
| 42 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 43 | [0] = PWRSTS_OFF, /* core_nret_bank */ |
Benoit Cousson | 9a2a360 | 2011-07-09 20:42:11 -0600 | [diff] [blame] | 44 | [1] = PWRSTS_RET, /* core_ocmram */ |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 45 | [2] = PWRSTS_RET, /* core_other_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 46 | [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ |
| 47 | [4] = PWRSTS_OFF_RET, /* ducati_unicache */ |
| 48 | }, |
| 49 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 50 | [0] = PWRSTS_ON, /* core_nret_bank */ |
Benoit Cousson | 9a2a360 | 2011-07-09 20:42:11 -0600 | [diff] [blame] | 51 | [1] = PWRSTS_ON, /* core_ocmram */ |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 52 | [2] = PWRSTS_ON, /* core_other_bank */ |
| 53 | [3] = PWRSTS_ON, /* ducati_l2ram */ |
| 54 | [4] = PWRSTS_ON, /* ducati_unicache */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 55 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 56 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 57 | }; |
| 58 | |
| 59 | /* gfx_44xx_pwrdm: 3D accelerator power domain */ |
| 60 | static struct powerdomain gfx_44xx_pwrdm = { |
| 61 | .name = "gfx_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 62 | .prcm_offs = OMAP4430_PRM_GFX_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 63 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 64 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 65 | .pwrsts = PWRSTS_OFF_ON, |
| 66 | .banks = 1, |
| 67 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 68 | [0] = PWRSTS_OFF, /* gfx_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 69 | }, |
| 70 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 71 | [0] = PWRSTS_ON, /* gfx_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 72 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 73 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
| 76 | /* abe_44xx_pwrdm: Audio back end power domain */ |
| 77 | static struct powerdomain abe_44xx_pwrdm = { |
| 78 | .name = "abe_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 79 | .prcm_offs = OMAP4430_PRM_ABE_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 80 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 81 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 82 | .pwrsts = PWRSTS_OFF_RET_ON, |
Santosh Shilimkar | 3ed4566 | 2011-02-25 15:21:17 -0700 | [diff] [blame] | 83 | .pwrsts_logic_ret = PWRSTS_OFF, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 84 | .banks = 2, |
| 85 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 86 | [0] = PWRSTS_RET, /* aessmem */ |
| 87 | [1] = PWRSTS_OFF, /* periphmem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 88 | }, |
| 89 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 90 | [0] = PWRSTS_ON, /* aessmem */ |
| 91 | [1] = PWRSTS_ON, /* periphmem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 92 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 93 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 94 | }; |
| 95 | |
| 96 | /* dss_44xx_pwrdm: Display subsystem power domain */ |
| 97 | static struct powerdomain dss_44xx_pwrdm = { |
| 98 | .name = "dss_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 99 | .prcm_offs = OMAP4430_PRM_DSS_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 100 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 101 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 102 | .pwrsts = PWRSTS_OFF_RET_ON, |
Rajendra Nayak | bb722f3 | 2010-09-27 14:02:56 -0600 | [diff] [blame] | 103 | .pwrsts_logic_ret = PWRSTS_OFF, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 104 | .banks = 1, |
| 105 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 106 | [0] = PWRSTS_OFF, /* dss_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 107 | }, |
| 108 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 109 | [0] = PWRSTS_ON, /* dss_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 110 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 111 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 112 | }; |
| 113 | |
| 114 | /* tesla_44xx_pwrdm: Tesla processor power domain */ |
| 115 | static struct powerdomain tesla_44xx_pwrdm = { |
| 116 | .name = "tesla_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 117 | .prcm_offs = OMAP4430_PRM_TESLA_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 118 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 119 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 120 | .pwrsts = PWRSTS_OFF_RET_ON, |
| 121 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 122 | .banks = 3, |
| 123 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 124 | [0] = PWRSTS_RET, /* tesla_edma */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 125 | [1] = PWRSTS_OFF_RET, /* tesla_l1 */ |
| 126 | [2] = PWRSTS_OFF_RET, /* tesla_l2 */ |
| 127 | }, |
| 128 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 129 | [0] = PWRSTS_ON, /* tesla_edma */ |
| 130 | [1] = PWRSTS_ON, /* tesla_l1 */ |
| 131 | [2] = PWRSTS_ON, /* tesla_l2 */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 132 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 133 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 134 | }; |
| 135 | |
| 136 | /* wkup_44xx_pwrdm: Wake-up power domain */ |
| 137 | static struct powerdomain wkup_44xx_pwrdm = { |
| 138 | .name = "wkup_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 139 | .prcm_offs = OMAP4430_PRM_WKUP_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 140 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 141 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
Rajendra Nayak | d3353e1 | 2010-05-18 20:24:01 -0600 | [diff] [blame] | 142 | .pwrsts = PWRSTS_ON, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 143 | .banks = 1, |
| 144 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 145 | [0] = PWRSTS_OFF, /* wkup_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 146 | }, |
| 147 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 148 | [0] = PWRSTS_ON, /* wkup_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 149 | }, |
| 150 | }; |
| 151 | |
| 152 | /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ |
| 153 | static struct powerdomain cpu0_44xx_pwrdm = { |
| 154 | .name = "cpu0_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 155 | .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 156 | .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 157 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 158 | .pwrsts = PWRSTS_OFF_RET_ON, |
| 159 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 160 | .banks = 1, |
| 161 | .pwrsts_mem_ret = { |
| 162 | [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ |
| 163 | }, |
| 164 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 165 | [0] = PWRSTS_ON, /* cpu0_l1 */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 166 | }, |
| 167 | }; |
| 168 | |
| 169 | /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ |
| 170 | static struct powerdomain cpu1_44xx_pwrdm = { |
| 171 | .name = "cpu1_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 172 | .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 173 | .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 174 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 175 | .pwrsts = PWRSTS_OFF_RET_ON, |
| 176 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 177 | .banks = 1, |
| 178 | .pwrsts_mem_ret = { |
| 179 | [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ |
| 180 | }, |
| 181 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 182 | [0] = PWRSTS_ON, /* cpu1_l1 */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 183 | }, |
| 184 | }; |
| 185 | |
| 186 | /* emu_44xx_pwrdm: Emulation power domain */ |
| 187 | static struct powerdomain emu_44xx_pwrdm = { |
| 188 | .name = "emu_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 189 | .prcm_offs = OMAP4430_PRM_EMU_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 190 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 191 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 192 | .pwrsts = PWRSTS_OFF_ON, |
| 193 | .banks = 1, |
| 194 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 195 | [0] = PWRSTS_OFF, /* emu_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 196 | }, |
| 197 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 198 | [0] = PWRSTS_ON, /* emu_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 199 | }, |
| 200 | }; |
| 201 | |
| 202 | /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */ |
| 203 | static struct powerdomain mpu_44xx_pwrdm = { |
| 204 | .name = "mpu_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 205 | .prcm_offs = OMAP4430_PRM_MPU_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 206 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 207 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
Santosh Shilimkar | a57341f | 2011-07-09 20:42:59 -0600 | [diff] [blame] | 208 | .pwrsts = PWRSTS_RET_ON, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 209 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 210 | .banks = 3, |
| 211 | .pwrsts_mem_ret = { |
| 212 | [0] = PWRSTS_OFF_RET, /* mpu_l1 */ |
| 213 | [1] = PWRSTS_OFF_RET, /* mpu_l2 */ |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 214 | [2] = PWRSTS_RET, /* mpu_ram */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 215 | }, |
| 216 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 217 | [0] = PWRSTS_ON, /* mpu_l1 */ |
| 218 | [1] = PWRSTS_ON, /* mpu_l2 */ |
| 219 | [2] = PWRSTS_ON, /* mpu_ram */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 220 | }, |
| 221 | }; |
| 222 | |
| 223 | /* ivahd_44xx_pwrdm: IVA-HD power domain */ |
| 224 | static struct powerdomain ivahd_44xx_pwrdm = { |
| 225 | .name = "ivahd_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 226 | .prcm_offs = OMAP4430_PRM_IVAHD_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 227 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 228 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 229 | .pwrsts = PWRSTS_OFF_RET_ON, |
Santosh Shilimkar | 3ed4566 | 2011-02-25 15:21:17 -0700 | [diff] [blame] | 230 | .pwrsts_logic_ret = PWRSTS_OFF, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 231 | .banks = 4, |
| 232 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 233 | [0] = PWRSTS_OFF, /* hwa_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 234 | [1] = PWRSTS_OFF_RET, /* sl2_mem */ |
| 235 | [2] = PWRSTS_OFF_RET, /* tcm1_mem */ |
| 236 | [3] = PWRSTS_OFF_RET, /* tcm2_mem */ |
| 237 | }, |
| 238 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 239 | [0] = PWRSTS_ON, /* hwa_mem */ |
| 240 | [1] = PWRSTS_ON, /* sl2_mem */ |
| 241 | [2] = PWRSTS_ON, /* tcm1_mem */ |
| 242 | [3] = PWRSTS_ON, /* tcm2_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 243 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 244 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 245 | }; |
| 246 | |
| 247 | /* cam_44xx_pwrdm: Camera subsystem power domain */ |
| 248 | static struct powerdomain cam_44xx_pwrdm = { |
| 249 | .name = "cam_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 250 | .prcm_offs = OMAP4430_PRM_CAM_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 251 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 252 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 253 | .pwrsts = PWRSTS_OFF_ON, |
| 254 | .banks = 1, |
| 255 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 256 | [0] = PWRSTS_OFF, /* cam_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 257 | }, |
| 258 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 259 | [0] = PWRSTS_ON, /* cam_mem */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 260 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 261 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 262 | }; |
| 263 | |
| 264 | /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ |
| 265 | static struct powerdomain l3init_44xx_pwrdm = { |
| 266 | .name = "l3init_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 267 | .prcm_offs = OMAP4430_PRM_L3INIT_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 268 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 269 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
Santosh Shilimkar | 80f09365 | 2010-12-21 22:37:28 -0700 | [diff] [blame] | 270 | .pwrsts = PWRSTS_RET_ON, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 271 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 272 | .banks = 1, |
| 273 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 274 | [0] = PWRSTS_OFF, /* l3init_bank1 */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 275 | }, |
| 276 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 277 | [0] = PWRSTS_ON, /* l3init_bank1 */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 278 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 279 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 280 | }; |
| 281 | |
| 282 | /* l4per_44xx_pwrdm: Target peripherals power domain */ |
| 283 | static struct powerdomain l4per_44xx_pwrdm = { |
| 284 | .name = "l4per_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 285 | .prcm_offs = OMAP4430_PRM_L4PER_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 286 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 287 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
Rajendra Nayak | 474e7ae | 2010-12-21 22:37:28 -0700 | [diff] [blame] | 288 | .pwrsts = PWRSTS_RET_ON, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 289 | .pwrsts_logic_ret = PWRSTS_OFF_RET, |
| 290 | .banks = 2, |
| 291 | .pwrsts_mem_ret = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 292 | [0] = PWRSTS_OFF, /* nonretained_bank */ |
| 293 | [1] = PWRSTS_RET, /* retained_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 294 | }, |
| 295 | .pwrsts_mem_on = { |
Paul Walmsley | 4cb49fe | 2011-03-07 19:28:15 -0700 | [diff] [blame] | 296 | [0] = PWRSTS_ON, /* nonretained_bank */ |
| 297 | [1] = PWRSTS_ON, /* retained_bank */ |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 298 | }, |
Benoit Cousson | 0fef658 | 2011-07-09 19:15:05 -0600 | [diff] [blame] | 299 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 300 | }; |
| 301 | |
| 302 | /* |
| 303 | * always_on_core_44xx_pwrdm: Always ON logic that sits in VDD_CORE voltage |
| 304 | * domain |
| 305 | */ |
| 306 | static struct powerdomain always_on_core_44xx_pwrdm = { |
| 307 | .name = "always_on_core_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 308 | .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 309 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 310 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
Rajendra Nayak | d3353e1 | 2010-05-18 20:24:01 -0600 | [diff] [blame] | 311 | .pwrsts = PWRSTS_ON, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 312 | }; |
| 313 | |
| 314 | /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ |
| 315 | static struct powerdomain cefuse_44xx_pwrdm = { |
| 316 | .name = "cefuse_pwrdm", |
Paul Walmsley | cdb54c4 | 2010-12-21 15:30:55 -0700 | [diff] [blame] | 317 | .prcm_offs = OMAP4430_PRM_CEFUSE_INST, |
Paul Walmsley | a64bb9c | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 318 | .prcm_partition = OMAP4430_PRM_PARTITION, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 319 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), |
| 320 | .pwrsts = PWRSTS_OFF_ON, |
Benoit Cousson | 9a2a360 | 2011-07-09 20:42:11 -0600 | [diff] [blame] | 321 | .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 322 | }; |
| 323 | |
| 324 | /* |
| 325 | * The following power domains are not under SW control |
| 326 | * |
| 327 | * always_on_iva |
| 328 | * always_on_mpu |
| 329 | * stdefuse |
| 330 | */ |
| 331 | |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 332 | /* As powerdomains are added or removed above, this list must also be changed */ |
| 333 | static struct powerdomain *powerdomains_omap44xx[] __initdata = { |
| 334 | &core_44xx_pwrdm, |
| 335 | &gfx_44xx_pwrdm, |
| 336 | &abe_44xx_pwrdm, |
| 337 | &dss_44xx_pwrdm, |
| 338 | &tesla_44xx_pwrdm, |
| 339 | &wkup_44xx_pwrdm, |
| 340 | &cpu0_44xx_pwrdm, |
| 341 | &cpu1_44xx_pwrdm, |
| 342 | &emu_44xx_pwrdm, |
| 343 | &mpu_44xx_pwrdm, |
| 344 | &ivahd_44xx_pwrdm, |
| 345 | &cam_44xx_pwrdm, |
| 346 | &l3init_44xx_pwrdm, |
| 347 | &l4per_44xx_pwrdm, |
| 348 | &always_on_core_44xx_pwrdm, |
| 349 | &cefuse_44xx_pwrdm, |
| 350 | NULL |
| 351 | }; |
Abhijit Pagare | f37c6df | 2010-01-26 20:12:52 -0700 | [diff] [blame] | 352 | |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 353 | void __init omap44xx_powerdomains_init(void) |
| 354 | { |
Paul Walmsley | 129c65e | 2011-09-14 16:01:21 -0600 | [diff] [blame^] | 355 | pwrdm_register_platform_funcs(&omap4_pwrdm_operations); |
| 356 | pwrdm_register_pwrdms(powerdomains_omap44xx); |
| 357 | pwrdm_complete_init(); |
Paul Walmsley | 6e01478 | 2010-12-21 20:01:20 -0700 | [diff] [blame] | 358 | } |