blob: d2dd90a9a10169e25df213e6ae00130b62446f26 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
Chris Wilson139467432011-02-09 20:01:16 +000049#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
Zhenyu Wang14571b42010-03-30 14:06:33 +080050#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010051#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080052
Jesse Barnes79e53942008-11-07 14:24:08 -080053
Chris Wilson2e88e402010-08-07 11:01:27 +010054static const char *tv_format_names[] = {
Zhao Yakuice6feab2009-08-24 13:50:26 +080055 "NTSC_M" , "NTSC_J" , "NTSC_443",
56 "PAL_B" , "PAL_D" , "PAL_G" ,
57 "PAL_H" , "PAL_I" , "PAL_M" ,
58 "PAL_N" , "PAL_NC" , "PAL_60" ,
59 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
60 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
61 "SECAM_60"
62};
63
64#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
65
Chris Wilsonea5b2132010-08-04 13:50:23 +010066struct intel_sdvo {
67 struct intel_encoder base;
68
Chris Wilsonf899fc62010-07-20 15:44:45 -070069 struct i2c_adapter *i2c;
Keith Packardf9c10a92009-05-30 12:16:25 -070070 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080071
Chris Wilsone957d772010-09-24 12:52:03 +010072 struct i2c_adapter ddc;
73
Jesse Barnese2f0ba92009-02-02 15:11:52 -080074 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070075 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080076
Jesse Barnese2f0ba92009-02-02 15:11:52 -080077 /* Active outputs controlled by this SDVO output */
78 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080079
Jesse Barnese2f0ba92009-02-02 15:11:52 -080080 /*
81 * Capabilities of the SDVO device returned by
82 * i830_sdvo_get_capabilities()
83 */
Jesse Barnes79e53942008-11-07 14:24:08 -080084 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080085
86 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080087 int pixel_clock_min, pixel_clock_max;
88
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080089 /*
90 * For multiple function SDVO device,
91 * this is for current attached outputs.
92 */
93 uint16_t attached_output;
94
Jesse Barnese2f0ba92009-02-02 15:11:52 -080095 /**
96 * This is set if we're going to treat the device as TV-out.
97 *
98 * While we have these nice friendly flags for output types that ought
99 * to decide this for us, the S-Video output on our HDMI+S-Video card
100 * shows up as RGB1 (VGA).
101 */
102 bool is_tv;
103
Zhao Yakuice6feab2009-08-24 13:50:26 +0800104 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100105 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800106
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800107 /**
108 * This is set if we treat the device as HDMI, instead of DVI.
109 */
110 bool is_hdmi;
Chris Wilsonda79de92010-11-22 11:12:46 +0000111 bool has_hdmi_monitor;
112 bool has_hdmi_audio;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800113
Ma Ling7086c872009-05-13 11:20:06 +0800114 /**
Chris Wilson6c9547f2010-08-25 10:05:17 +0100115 * This is set if we detect output of sdvo device as LVDS and
116 * have a valid fixed mode to use with the panel.
Ma Ling7086c872009-05-13 11:20:06 +0800117 */
118 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800119
120 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800121 * This is sdvo fixed pannel mode pointer
122 */
123 struct drm_display_mode *sdvo_lvds_fixed_mode;
124
Eric Anholtc751ce42010-03-25 11:48:48 -0700125 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800126 uint8_t ddc_bus;
127
Chris Wilson6c9547f2010-08-25 10:05:17 +0100128 /* Input timings for adjusted_mode */
129 struct intel_sdvo_dtd input_dtd;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800130};
131
132struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100133 struct intel_connector base;
134
Zhenyu Wang14571b42010-03-30 14:06:33 +0800135 /* Mark the type of connector */
136 uint16_t output_flag;
137
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100138 int force_audio;
139
Zhenyu Wang14571b42010-03-30 14:06:33 +0800140 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100141 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800142 int format_supported_num;
Chris Wilsonc5521702010-08-04 13:50:28 +0100143 struct drm_property *tv_format;
Zhenyu Wang14571b42010-03-30 14:06:33 +0800144
Chris Wilson7f36e7e2010-09-19 09:29:33 +0100145 struct drm_property *force_audio_property;
146
Zhao Yakuib9219c52009-09-10 15:45:46 +0800147 /* add the property for the SDVO-TV */
Chris Wilsonc5521702010-08-04 13:50:28 +0100148 struct drm_property *left;
149 struct drm_property *right;
150 struct drm_property *top;
151 struct drm_property *bottom;
152 struct drm_property *hpos;
153 struct drm_property *vpos;
154 struct drm_property *contrast;
155 struct drm_property *saturation;
156 struct drm_property *hue;
157 struct drm_property *sharpness;
158 struct drm_property *flicker_filter;
159 struct drm_property *flicker_filter_adaptive;
160 struct drm_property *flicker_filter_2d;
161 struct drm_property *tv_chroma_filter;
162 struct drm_property *tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100163 struct drm_property *dot_crawl;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800164
165 /* add the property for the SDVO-TV/LVDS */
Chris Wilsonc5521702010-08-04 13:50:28 +0100166 struct drm_property *brightness;
Zhao Yakuib9219c52009-09-10 15:45:46 +0800167
168 /* Add variable to record current setting for the above property */
169 u32 left_margin, right_margin, top_margin, bottom_margin;
Chris Wilsonc5521702010-08-04 13:50:28 +0100170
Zhao Yakuib9219c52009-09-10 15:45:46 +0800171 /* this is to get the range of margin.*/
172 u32 max_hscan, max_vscan;
173 u32 max_hpos, cur_hpos;
174 u32 max_vpos, cur_vpos;
175 u32 cur_brightness, max_brightness;
176 u32 cur_contrast, max_contrast;
177 u32 cur_saturation, max_saturation;
178 u32 cur_hue, max_hue;
Chris Wilsonc5521702010-08-04 13:50:28 +0100179 u32 cur_sharpness, max_sharpness;
180 u32 cur_flicker_filter, max_flicker_filter;
181 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
182 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
183 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
184 u32 cur_tv_luma_filter, max_tv_luma_filter;
Chris Wilsone0442182010-08-04 13:50:29 +0100185 u32 cur_dot_crawl, max_dot_crawl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800186};
187
Chris Wilson890f3352010-09-14 16:46:59 +0100188static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100189{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100190 return container_of(encoder, struct intel_sdvo, base.base);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100191}
192
Chris Wilsondf0e9242010-09-09 16:20:55 +0100193static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194{
195 return container_of(intel_attached_encoder(connector),
196 struct intel_sdvo, base);
197}
198
Chris Wilson615fb932010-08-04 13:50:24 +0100199static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
200{
201 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
202}
203
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800204static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100205intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100206static bool
207intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
208 struct intel_sdvo_connector *intel_sdvo_connector,
209 int type);
210static bool
211intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
212 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800213
Jesse Barnes79e53942008-11-07 14:24:08 -0800214/**
215 * Writes the SDVOB or SDVOC with the given value, but always writes both
216 * SDVOB and SDVOC to work around apparent hardware issues (according to
217 * comments in the BIOS).
218 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100219static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800220{
Chris Wilson4ef69c72010-09-09 15:14:28 +0100221 struct drm_device *dev = intel_sdvo->base.base.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800222 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800223 u32 bval = val, cval = val;
224 int i;
225
Chris Wilsonea5b2132010-08-04 13:50:23 +0100226 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
227 I915_WRITE(intel_sdvo->sdvo_reg, val);
228 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800229 return;
230 }
231
Chris Wilsonea5b2132010-08-04 13:50:23 +0100232 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800233 cval = I915_READ(SDVOC);
234 } else {
235 bval = I915_READ(SDVOB);
236 }
237 /*
238 * Write the registers twice for luck. Sometimes,
239 * writing them only once doesn't appear to 'stick'.
240 * The BIOS does this too. Yay, magic
241 */
242 for (i = 0; i < 2; i++)
243 {
244 I915_WRITE(SDVOB, bval);
245 I915_READ(SDVOB);
246 I915_WRITE(SDVOC, cval);
247 I915_READ(SDVOC);
248 }
249}
250
Chris Wilson32aad862010-08-04 13:50:25 +0100251static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800252{
Jesse Barnes79e53942008-11-07 14:24:08 -0800253 struct i2c_msg msgs[] = {
254 {
Chris Wilsone957d772010-09-24 12:52:03 +0100255 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800256 .flags = 0,
257 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100258 .buf = &addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800259 },
260 {
Chris Wilsone957d772010-09-24 12:52:03 +0100261 .addr = intel_sdvo->slave_addr,
Jesse Barnes79e53942008-11-07 14:24:08 -0800262 .flags = I2C_M_RD,
263 .len = 1,
Chris Wilsone957d772010-09-24 12:52:03 +0100264 .buf = ch,
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 }
266 };
Chris Wilson32aad862010-08-04 13:50:25 +0100267 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800268
Chris Wilsonf899fc62010-07-20 15:44:45 -0700269 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800271
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800272 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800273 return false;
274}
275
Jesse Barnes79e53942008-11-07 14:24:08 -0800276#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
277/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100278static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800279 u8 cmd;
Chris Wilson2e88e402010-08-07 11:01:27 +0100280 const char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281} sdvo_cmd_names[] = {
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Chris Wilsonc5521702010-08-04 13:50:28 +0100325
Zhao Yakuib9219c52009-09-10 15:45:46 +0800326 /* Add the op code for SDVO enhancements */
Chris Wilsonc5521702010-08-04 13:50:28 +0100327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Chris Wilsonc5521702010-08-04 13:50:28 +0100351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
371
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800372 /* HDMI op code */
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800393};
394
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800395#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100396#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800397
Chris Wilsonea5b2132010-08-04 13:50:23 +0100398static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100399 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800400{
Jesse Barnes79e53942008-11-07 14:24:08 -0800401 int i;
402
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800403 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100404 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800405 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800406 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800407 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800408 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400409 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800410 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800411 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800412 break;
413 }
414 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400415 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800416 DRM_LOG_KMS("(%02X)", cmd);
417 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800418}
Jesse Barnes79e53942008-11-07 14:24:08 -0800419
Jesse Barnes79e53942008-11-07 14:24:08 -0800420static const char *cmd_status_names[] = {
421 "Power on",
422 "Success",
423 "Not supported",
424 "Invalid arg",
425 "Pending",
426 "Target not specified",
427 "Scaling not supported"
428};
429
Chris Wilsone957d772010-09-24 12:52:03 +0100430static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
431 const void *args, int args_len)
432{
433 u8 buf[args_len*2 + 2], status;
434 struct i2c_msg msgs[args_len + 3];
435 int i, ret;
436
437 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
438
439 for (i = 0; i < args_len; i++) {
440 msgs[i].addr = intel_sdvo->slave_addr;
441 msgs[i].flags = 0;
442 msgs[i].len = 2;
443 msgs[i].buf = buf + 2 *i;
444 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
445 buf[2*i + 1] = ((u8*)args)[i];
446 }
447 msgs[i].addr = intel_sdvo->slave_addr;
448 msgs[i].flags = 0;
449 msgs[i].len = 2;
450 msgs[i].buf = buf + 2*i;
451 buf[2*i + 0] = SDVO_I2C_OPCODE;
452 buf[2*i + 1] = cmd;
453
454 /* the following two are to read the response */
455 status = SDVO_I2C_CMD_STATUS;
456 msgs[i+1].addr = intel_sdvo->slave_addr;
457 msgs[i+1].flags = 0;
458 msgs[i+1].len = 1;
459 msgs[i+1].buf = &status;
460
461 msgs[i+2].addr = intel_sdvo->slave_addr;
462 msgs[i+2].flags = I2C_M_RD;
463 msgs[i+2].len = 1;
464 msgs[i+2].buf = &status;
465
466 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
467 if (ret < 0) {
468 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
469 return false;
470 }
471 if (ret != i+3) {
472 /* failure in I2C transfer */
473 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
474 return false;
475 }
476
Chris Wilsone957d772010-09-24 12:52:03 +0100477 return true;
478}
479
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100480static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
481 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800482{
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100483 u8 retry = 5;
484 u8 status;
Zhenyu Wang33b52962009-03-24 14:02:40 +0800485 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800486
Chris Wilsond121a5d2011-01-25 15:00:01 +0000487 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
488
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100489 /*
490 * The documentation states that all commands will be
491 * processed within 15µs, and that we need only poll
492 * the status byte a maximum of 3 times in order for the
493 * command to be complete.
494 *
495 * Check 5 times in case the hardware failed to read the docs.
496 */
Chris Wilsond121a5d2011-01-25 15:00:01 +0000497 if (!intel_sdvo_read_byte(intel_sdvo,
498 SDVO_I2C_CMD_STATUS,
499 &status))
500 goto log_fail;
501
502 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
503 udelay(15);
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100504 if (!intel_sdvo_read_byte(intel_sdvo,
505 SDVO_I2C_CMD_STATUS,
506 &status))
Chris Wilsond121a5d2011-01-25 15:00:01 +0000507 goto log_fail;
508 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100509
Jesse Barnes79e53942008-11-07 14:24:08 -0800510 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800511 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800512 else
yakui_zhao342dc382009-06-02 14:12:00 +0800513 DRM_LOG_KMS("(??? %d)", status);
Jesse Barnes79e53942008-11-07 14:24:08 -0800514
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100515 if (status != SDVO_CMD_STATUS_SUCCESS)
516 goto log_fail;
Jesse Barnes79e53942008-11-07 14:24:08 -0800517
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100518 /* Read the command response */
519 for (i = 0; i < response_len; i++) {
520 if (!intel_sdvo_read_byte(intel_sdvo,
521 SDVO_I2C_RETURN_0 + i,
522 &((u8 *)response)[i]))
523 goto log_fail;
Chris Wilsone957d772010-09-24 12:52:03 +0100524 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800525 }
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100526 DRM_LOG_KMS("\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100527 return true;
528
529log_fail:
Chris Wilsond121a5d2011-01-25 15:00:01 +0000530 DRM_LOG_KMS("... failed\n");
Chris Wilsonb5c616a2010-09-09 19:06:13 +0100531 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800532}
533
Hannes Ederb358d0a2008-12-18 21:18:47 +0100534static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800535{
536 if (mode->clock >= 100000)
537 return 1;
538 else if (mode->clock >= 50000)
539 return 2;
540 else
541 return 4;
542}
543
Chris Wilsone957d772010-09-24 12:52:03 +0100544static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
545 u8 ddc_bus)
Jesse Barnes79e53942008-11-07 14:24:08 -0800546{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000547 /* This must be the immediately preceding write before the i2c xfer */
Chris Wilsone957d772010-09-24 12:52:03 +0100548 return intel_sdvo_write_cmd(intel_sdvo,
549 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
550 &ddc_bus, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800551}
552
Chris Wilson32aad862010-08-04 13:50:25 +0100553static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
554{
Chris Wilsond121a5d2011-01-25 15:00:01 +0000555 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
556 return false;
557
558 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100559}
560
561static bool
562intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
563{
564 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
565 return false;
566
567 return intel_sdvo_read_response(intel_sdvo, value, len);
568}
569
570static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800571{
572 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100573 return intel_sdvo_set_value(intel_sdvo,
574 SDVO_CMD_SET_TARGET_INPUT,
575 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800576}
577
578/**
579 * Return whether each input is trained.
580 *
581 * This function is making an assumption about the layout of the response,
582 * which should be checked against the docs.
583 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100584static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800585{
586 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800587
Chris Wilson32aad862010-08-04 13:50:25 +0100588 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
589 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800590 return false;
591
592 *input_1 = response.input0_trained;
593 *input_2 = response.input1_trained;
594 return true;
595}
596
Chris Wilsonea5b2132010-08-04 13:50:23 +0100597static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800598 u16 outputs)
599{
Chris Wilson32aad862010-08-04 13:50:25 +0100600 return intel_sdvo_set_value(intel_sdvo,
601 SDVO_CMD_SET_ACTIVE_OUTPUTS,
602 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800603}
604
Chris Wilsonea5b2132010-08-04 13:50:23 +0100605static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800606 int mode)
607{
Chris Wilson32aad862010-08-04 13:50:25 +0100608 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800609
610 switch (mode) {
611 case DRM_MODE_DPMS_ON:
612 state = SDVO_ENCODER_STATE_ON;
613 break;
614 case DRM_MODE_DPMS_STANDBY:
615 state = SDVO_ENCODER_STATE_STANDBY;
616 break;
617 case DRM_MODE_DPMS_SUSPEND:
618 state = SDVO_ENCODER_STATE_SUSPEND;
619 break;
620 case DRM_MODE_DPMS_OFF:
621 state = SDVO_ENCODER_STATE_OFF;
622 break;
623 }
624
Chris Wilson32aad862010-08-04 13:50:25 +0100625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800627}
628
Chris Wilsonea5b2132010-08-04 13:50:23 +0100629static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800630 int *clock_min,
631 int *clock_max)
632{
633 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800634
Chris Wilson32aad862010-08-04 13:50:25 +0100635 if (!intel_sdvo_get_value(intel_sdvo,
636 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
637 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800638 return false;
639
640 /* Convert the values from units of 10 kHz to kHz. */
641 *clock_min = clocks.min * 10;
642 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800643 return true;
644}
645
Chris Wilsonea5b2132010-08-04 13:50:23 +0100646static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800647 u16 outputs)
648{
Chris Wilson32aad862010-08-04 13:50:25 +0100649 return intel_sdvo_set_value(intel_sdvo,
650 SDVO_CMD_SET_TARGET_OUTPUT,
651 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800652}
653
Chris Wilsonea5b2132010-08-04 13:50:23 +0100654static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800655 struct intel_sdvo_dtd *dtd)
656{
Chris Wilson32aad862010-08-04 13:50:25 +0100657 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
658 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800659}
660
Chris Wilsonea5b2132010-08-04 13:50:23 +0100661static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 struct intel_sdvo_dtd *dtd)
663{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100664 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800665 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
666}
667
Chris Wilsonea5b2132010-08-04 13:50:23 +0100668static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800669 struct intel_sdvo_dtd *dtd)
670{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100671 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800672 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
673}
674
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800675static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100676intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800677 uint16_t clock,
678 uint16_t width,
679 uint16_t height)
680{
681 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800682
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800683 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800684 args.clock = clock;
685 args.width = width;
686 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800687 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800688
Chris Wilsonea5b2132010-08-04 13:50:23 +0100689 if (intel_sdvo->is_lvds &&
690 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
691 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800692 args.scaled = 1;
693
Chris Wilson32aad862010-08-04 13:50:25 +0100694 return intel_sdvo_set_value(intel_sdvo,
695 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
696 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800697}
698
Chris Wilsonea5b2132010-08-04 13:50:23 +0100699static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800700 struct intel_sdvo_dtd *dtd)
701{
Chris Wilson32aad862010-08-04 13:50:25 +0100702 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
703 &dtd->part1, sizeof(dtd->part1)) &&
704 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
705 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800706}
Jesse Barnes79e53942008-11-07 14:24:08 -0800707
Chris Wilsonea5b2132010-08-04 13:50:23 +0100708static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800709{
Chris Wilson32aad862010-08-04 13:50:25 +0100710 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800711}
712
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800713static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100714 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800715{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800716 uint16_t width, height;
717 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
718 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800719
720 width = mode->crtc_hdisplay;
721 height = mode->crtc_vdisplay;
722
723 /* do some mode translations */
724 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
725 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
726
727 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
728 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
729
730 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
731 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
732
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800733 dtd->part1.clock = mode->clock / 10;
734 dtd->part1.h_active = width & 0xff;
735 dtd->part1.h_blank = h_blank_len & 0xff;
736 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800737 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800738 dtd->part1.v_active = height & 0xff;
739 dtd->part1.v_blank = v_blank_len & 0xff;
740 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800741 ((v_blank_len >> 8) & 0xf);
742
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800743 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800744 dtd->part2.h_sync_width = h_sync_len & 0xff;
745 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800746 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800747 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800748 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
749 ((v_sync_len & 0x30) >> 4);
750
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800751 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800752 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800753 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800754 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800755 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800756
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800757 dtd->part2.sdvo_flags = 0;
758 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
759 dtd->part2.reserved = 0;
760}
Jesse Barnes79e53942008-11-07 14:24:08 -0800761
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100763 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800764{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800765 mode->hdisplay = dtd->part1.h_active;
766 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
767 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800768 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800769 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
770 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
771 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
772 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
773
774 mode->vdisplay = dtd->part1.v_active;
775 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
776 mode->vsync_start = mode->vdisplay;
777 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800778 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800779 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
780 mode->vsync_end = mode->vsync_start +
781 (dtd->part2.v_sync_off_width & 0xf);
782 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
783 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
784 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
785
786 mode->clock = dtd->part1.clock * 10;
787
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800788 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800789 if (dtd->part2.dtd_flags & 0x2)
790 mode->flags |= DRM_MODE_FLAG_PHSYNC;
791 if (dtd->part2.dtd_flags & 0x4)
792 mode->flags |= DRM_MODE_FLAG_PVSYNC;
793}
794
Chris Wilsone27d8532010-10-22 09:15:22 +0100795static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800796{
Chris Wilsone27d8532010-10-22 09:15:22 +0100797 struct intel_sdvo_encode encode;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800798
Chris Wilsone27d8532010-10-22 09:15:22 +0100799 return intel_sdvo_get_value(intel_sdvo,
800 SDVO_CMD_GET_SUPP_ENCODE,
801 &encode, sizeof(encode));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800802}
803
Chris Wilsonea5b2132010-08-04 13:50:23 +0100804static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700805 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800806{
Chris Wilson32aad862010-08-04 13:50:25 +0100807 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800808}
809
Chris Wilsonea5b2132010-08-04 13:50:23 +0100810static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800811 uint8_t mode)
812{
Chris Wilson32aad862010-08-04 13:50:25 +0100813 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800814}
815
816#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100817static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800818{
819 int i, j;
820 uint8_t set_buf_index[2];
821 uint8_t av_split;
822 uint8_t buf_size;
823 uint8_t buf[48];
824 uint8_t *pos;
825
Chris Wilson32aad862010-08-04 13:50:25 +0100826 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800827
828 for (i = 0; i <= av_split; i++) {
829 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700830 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800831 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700832 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
833 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800834
835 pos = buf;
836 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700837 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800838 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700839 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800840 pos += 8;
841 }
842 }
843}
844#endif
845
David Härdeman3c17fe42010-09-24 21:44:32 +0200846static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800847{
848 struct dip_infoframe avi_if = {
849 .type = DIP_TYPE_AVI,
David Härdeman3c17fe42010-09-24 21:44:32 +0200850 .ver = DIP_VERSION_AVI,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800851 .len = DIP_LEN_AVI,
852 };
David Härdeman3c17fe42010-09-24 21:44:32 +0200853 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
854 uint8_t set_buf_index[2] = { 1, 0 };
855 uint64_t *data = (uint64_t *)&avi_if;
856 unsigned i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800857
David Härdeman3c17fe42010-09-24 21:44:32 +0200858 intel_dip_infoframe_csum(&avi_if);
859
Chris Wilsond121a5d2011-01-25 15:00:01 +0000860 if (!intel_sdvo_set_value(intel_sdvo,
861 SDVO_CMD_SET_HBUF_INDEX,
David Härdeman3c17fe42010-09-24 21:44:32 +0200862 set_buf_index, 2))
863 return false;
864
865 for (i = 0; i < sizeof(avi_if); i += 8) {
Chris Wilsond121a5d2011-01-25 15:00:01 +0000866 if (!intel_sdvo_set_value(intel_sdvo,
867 SDVO_CMD_SET_HBUF_DATA,
David Härdeman3c17fe42010-09-24 21:44:32 +0200868 data, 8))
869 return false;
870 data++;
871 }
872
Chris Wilsond121a5d2011-01-25 15:00:01 +0000873 return intel_sdvo_set_value(intel_sdvo,
874 SDVO_CMD_SET_HBUF_TXRATE,
David Härdeman3c17fe42010-09-24 21:44:32 +0200875 &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800876}
877
Chris Wilson32aad862010-08-04 13:50:25 +0100878static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800879{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800880 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100881 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800882
Chris Wilson40039752010-08-04 13:50:26 +0100883 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800884 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100885 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800886
Chris Wilson32aad862010-08-04 13:50:25 +0100887 BUILD_BUG_ON(sizeof(format) != 6);
888 return intel_sdvo_set_value(intel_sdvo,
889 SDVO_CMD_SET_TV_FORMAT,
890 &format, sizeof(format));
891}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800892
Chris Wilson32aad862010-08-04 13:50:25 +0100893static bool
894intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
895 struct drm_display_mode *mode)
896{
897 struct intel_sdvo_dtd output_dtd;
898
899 if (!intel_sdvo_set_target_output(intel_sdvo,
900 intel_sdvo->attached_output))
901 return false;
902
903 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
904 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
905 return false;
906
907 return true;
908}
909
910static bool
911intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
912 struct drm_display_mode *mode,
913 struct drm_display_mode *adjusted_mode)
914{
Chris Wilson32aad862010-08-04 13:50:25 +0100915 /* Reset the input timing to the screen. Assume always input 0. */
916 if (!intel_sdvo_set_target_input(intel_sdvo))
917 return false;
918
919 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
920 mode->clock / 10,
921 mode->hdisplay,
922 mode->vdisplay))
923 return false;
924
925 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100926 &intel_sdvo->input_dtd))
Chris Wilson32aad862010-08-04 13:50:25 +0100927 return false;
928
Chris Wilson6c9547f2010-08-25 10:05:17 +0100929 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
Chris Wilson32aad862010-08-04 13:50:25 +0100930
931 drm_mode_set_crtcinfo(adjusted_mode, 0);
Chris Wilson32aad862010-08-04 13:50:25 +0100932 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800933}
934
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800935static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
936 struct drm_display_mode *mode,
937 struct drm_display_mode *adjusted_mode)
938{
Chris Wilson890f3352010-09-14 16:46:59 +0100939 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100940 int multiplier;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800941
Chris Wilson32aad862010-08-04 13:50:25 +0100942 /* We need to construct preferred input timings based on our
943 * output timings. To do that, we have to set the output
944 * timings, even though this isn't really the right place in
945 * the sequence to do it. Oh well.
946 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100947 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +0100948 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800949 return false;
Chris Wilson32aad862010-08-04 13:50:25 +0100950
Pavel Roskinc74696b2010-09-02 14:46:34 -0400951 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
952 mode,
953 adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +0100954 } else if (intel_sdvo->is_lvds) {
Chris Wilson32aad862010-08-04 13:50:25 +0100955 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
Chris Wilson6c9547f2010-08-25 10:05:17 +0100956 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800957 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800958
Pavel Roskinc74696b2010-09-02 14:46:34 -0400959 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
960 mode,
961 adjusted_mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800962 }
Chris Wilson32aad862010-08-04 13:50:25 +0100963
964 /* Make the CRTC code factor in the SDVO pixel multiplier. The
Chris Wilson6c9547f2010-08-25 10:05:17 +0100965 * SDVO device will factor out the multiplier during mode_set.
Chris Wilson32aad862010-08-04 13:50:25 +0100966 */
Chris Wilson6c9547f2010-08-25 10:05:17 +0100967 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
968 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
Chris Wilson32aad862010-08-04 13:50:25 +0100969
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800970 return true;
971}
972
973static void intel_sdvo_mode_set(struct drm_encoder *encoder,
974 struct drm_display_mode *mode,
975 struct drm_display_mode *adjusted_mode)
976{
977 struct drm_device *dev = encoder->dev;
978 struct drm_i915_private *dev_priv = dev->dev_private;
979 struct drm_crtc *crtc = encoder->crtc;
980 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilson890f3352010-09-14 16:46:59 +0100981 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Chris Wilson6c9547f2010-08-25 10:05:17 +0100982 u32 sdvox;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800983 struct intel_sdvo_in_out_map in_out;
984 struct intel_sdvo_dtd input_dtd;
Chris Wilson6c9547f2010-08-25 10:05:17 +0100985 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
986 int rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800987
988 if (!mode)
989 return;
990
991 /* First, set the input mapping for the first input to our controlled
992 * output. This is only correct if we're a single-input device, in
993 * which case the first input is the output from the appropriate SDVO
994 * channel on the motherboard. In a two-input device, the first input
995 * will be SDVOB and the second SDVOC.
996 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100997 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800998 in_out.in1 = 0;
999
Pavel Roskinc74696b2010-09-02 14:46:34 -04001000 intel_sdvo_set_value(intel_sdvo,
1001 SDVO_CMD_SET_IN_OUT_MAP,
1002 &in_out, sizeof(in_out));
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001003
Chris Wilson6c9547f2010-08-25 10:05:17 +01001004 /* Set the output timings to the screen */
1005 if (!intel_sdvo_set_target_output(intel_sdvo,
1006 intel_sdvo->attached_output))
1007 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001008
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001009 /* We have tried to get input timing in mode_fixup, and filled into
Chris Wilson6c9547f2010-08-25 10:05:17 +01001010 * adjusted_mode.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001011 */
Chris Wilson6c9547f2010-08-25 10:05:17 +01001012 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1013 input_dtd = intel_sdvo->input_dtd;
1014 } else {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001015 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001016 if (!intel_sdvo_set_target_output(intel_sdvo,
1017 intel_sdvo->attached_output))
1018 return;
1019
Chris Wilson6c9547f2010-08-25 10:05:17 +01001020 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Pavel Roskinc74696b2010-09-02 14:46:34 -04001021 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001022 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001023
1024 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001025 if (!intel_sdvo_set_target_input(intel_sdvo))
1026 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001027
Chris Wilson97aaf912011-01-04 20:10:52 +00001028 if (intel_sdvo->has_hdmi_monitor) {
1029 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1030 intel_sdvo_set_colorimetry(intel_sdvo,
1031 SDVO_COLORIMETRY_RGB256);
1032 intel_sdvo_set_avi_infoframe(intel_sdvo);
1033 } else
1034 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001035
Chris Wilson6c9547f2010-08-25 10:05:17 +01001036 if (intel_sdvo->is_tv &&
1037 !intel_sdvo_set_tv_format(intel_sdvo))
1038 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001039
Pavel Roskinc74696b2010-09-02 14:46:34 -04001040 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
Jesse Barnes79e53942008-11-07 14:24:08 -08001041
Chris Wilson6c9547f2010-08-25 10:05:17 +01001042 switch (pixel_multiplier) {
1043 default:
Chris Wilson32aad862010-08-04 13:50:25 +01001044 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1045 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1046 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001047 }
Chris Wilson32aad862010-08-04 13:50:25 +01001048 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1049 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001050
1051 /* Set the SDVO control regs. */
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001052 if (INTEL_INFO(dev)->gen >= 4) {
Chris Wilson6714afb2010-12-17 04:10:51 +00001053 sdvox = 0;
1054 if (INTEL_INFO(dev)->gen < 5)
1055 sdvox |= SDVO_BORDER_ENABLE;
Adam Jackson81a14b42010-07-16 14:46:32 -04001056 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1057 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1058 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1059 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001060 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001061 sdvox = I915_READ(intel_sdvo->sdvo_reg);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001062 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001063 case SDVOB:
1064 sdvox &= SDVOB_PRESERVE_MASK;
1065 break;
1066 case SDVOC:
1067 sdvox &= SDVOC_PRESERVE_MASK;
1068 break;
1069 }
1070 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1071 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001072 if (intel_crtc->pipe == 1)
1073 sdvox |= SDVO_PIPE_B_SELECT;
Chris Wilsonda79de92010-11-22 11:12:46 +00001074 if (intel_sdvo->has_hdmi_audio)
Chris Wilson6c9547f2010-08-25 10:05:17 +01001075 sdvox |= SDVO_AUDIO_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -08001076
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001077 if (INTEL_INFO(dev)->gen >= 4) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001078 /* done in crtc_mode_set as the dpll_md reg must be written early */
1079 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1080 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001081 } else {
Chris Wilson6c9547f2010-08-25 10:05:17 +01001082 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
Jesse Barnes79e53942008-11-07 14:24:08 -08001083 }
1084
Chris Wilson6714afb2010-12-17 04:10:51 +00001085 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1086 INTEL_INFO(dev)->gen < 5)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001087 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001088 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001089}
1090
1091static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1092{
1093 struct drm_device *dev = encoder->dev;
1094 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson890f3352010-09-14 16:46:59 +01001095 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001096 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
Jesse Barnes79e53942008-11-07 14:24:08 -08001097 u32 temp;
1098
1099 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001100 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001101 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001102 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001103
1104 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001105 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001106 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001107 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001108 }
1109 }
1110 } else {
1111 bool input1, input2;
1112 int i;
1113 u8 status;
1114
Chris Wilsonea5b2132010-08-04 13:50:23 +01001115 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001116 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001117 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001118 for (i = 0; i < 2; i++)
Jesse Barnes9d0498a2010-08-18 13:20:54 -07001119 intel_wait_for_vblank(dev, intel_crtc->pipe);
Jesse Barnes79e53942008-11-07 14:24:08 -08001120
Chris Wilson32aad862010-08-04 13:50:25 +01001121 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001122 /* Warn if the device reported failure to sync.
1123 * A lot of SDVO devices fail to notify of sync, but it's
1124 * a given it the status is a success, we succeeded.
1125 */
1126 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001127 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001128 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001129 }
1130
1131 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001132 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1133 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001134 }
1135 return;
1136}
1137
Jesse Barnes79e53942008-11-07 14:24:08 -08001138static int intel_sdvo_mode_valid(struct drm_connector *connector,
1139 struct drm_display_mode *mode)
1140{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001141 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001142
1143 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1144 return MODE_NO_DBLESCAN;
1145
Chris Wilsonea5b2132010-08-04 13:50:23 +01001146 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001147 return MODE_CLOCK_LOW;
1148
Chris Wilsonea5b2132010-08-04 13:50:23 +01001149 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001150 return MODE_CLOCK_HIGH;
1151
Chris Wilson85454232010-08-08 14:28:23 +01001152 if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001153 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001154 return MODE_PANEL;
1155
Chris Wilsonea5b2132010-08-04 13:50:23 +01001156 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001157 return MODE_PANEL;
1158 }
1159
Jesse Barnes79e53942008-11-07 14:24:08 -08001160 return MODE_OK;
1161}
1162
Chris Wilsonea5b2132010-08-04 13:50:23 +01001163static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001164{
Chris Wilsone957d772010-09-24 12:52:03 +01001165 if (!intel_sdvo_get_value(intel_sdvo,
1166 SDVO_CMD_GET_DEVICE_CAPS,
1167 caps, sizeof(*caps)))
1168 return false;
1169
1170 DRM_DEBUG_KMS("SDVO capabilities:\n"
1171 " vendor_id: %d\n"
1172 " device_id: %d\n"
1173 " device_rev_id: %d\n"
1174 " sdvo_version_major: %d\n"
1175 " sdvo_version_minor: %d\n"
1176 " sdvo_inputs_mask: %d\n"
1177 " smooth_scaling: %d\n"
1178 " sharp_scaling: %d\n"
1179 " up_scaling: %d\n"
1180 " down_scaling: %d\n"
1181 " stall_support: %d\n"
1182 " output_flags: %d\n",
1183 caps->vendor_id,
1184 caps->device_id,
1185 caps->device_rev_id,
1186 caps->sdvo_version_major,
1187 caps->sdvo_version_minor,
1188 caps->sdvo_inputs_mask,
1189 caps->smooth_scaling,
1190 caps->sharp_scaling,
1191 caps->up_scaling,
1192 caps->down_scaling,
1193 caps->stall_support,
1194 caps->output_flags);
1195
1196 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08001197}
1198
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001199/* No use! */
1200#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001201struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1202{
1203 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001204 struct intel_sdvo *iout = NULL;
1205 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001206
1207 /* find the sdvo connector */
1208 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001209 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001210
1211 if (iout->type != INTEL_OUTPUT_SDVO)
1212 continue;
1213
1214 sdvo = iout->dev_priv;
1215
Eric Anholtc751ce42010-03-25 11:48:48 -07001216 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001217 return connector;
1218
Eric Anholtc751ce42010-03-25 11:48:48 -07001219 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001220 return connector;
1221
1222 }
1223
1224 return NULL;
1225}
1226
1227int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1228{
1229 u8 response[2];
1230 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001231 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001232 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001233
1234 if (!connector)
1235 return 0;
1236
Chris Wilsonea5b2132010-08-04 13:50:23 +01001237 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001238
Chris Wilson32aad862010-08-04 13:50:25 +01001239 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1240 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001241}
1242
1243void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1244{
1245 u8 response[2];
1246 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001247 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001248
Chris Wilsonea5b2132010-08-04 13:50:23 +01001249 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1250 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001251
1252 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001253 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1254 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001255
Chris Wilsonea5b2132010-08-04 13:50:23 +01001256 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001257 } else {
1258 response[0] = 0;
1259 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001260 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001261 }
1262
Chris Wilsonea5b2132010-08-04 13:50:23 +01001263 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1264 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001265}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001266#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001267
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001268static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001269intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001270{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001271 int caps = 0;
1272
Chris Wilsonea5b2132010-08-04 13:50:23 +01001273 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001274 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1275 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001276 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001277 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1278 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001279 if (intel_sdvo->caps.output_flags &
Roel Kluin19e1f882009-08-09 13:50:53 +02001280 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001281 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001282 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001283 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1284 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001285 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001286 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1287 caps++;
1288
Chris Wilsonea5b2132010-08-04 13:50:23 +01001289 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001290 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1291 caps++;
1292
Chris Wilsonea5b2132010-08-04 13:50:23 +01001293 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001294 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1295 caps++;
1296
1297 return (caps > 1);
1298}
1299
Chris Wilsonf899fc62010-07-20 15:44:45 -07001300static struct edid *
Chris Wilsone957d772010-09-24 12:52:03 +01001301intel_sdvo_get_edid(struct drm_connector *connector)
Chris Wilsonf899fc62010-07-20 15:44:45 -07001302{
Chris Wilsone957d772010-09-24 12:52:03 +01001303 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1304 return drm_get_edid(connector, &sdvo->ddc);
Chris Wilsonf899fc62010-07-20 15:44:45 -07001305}
1306
Chris Wilsonff482d82010-09-15 10:40:38 +01001307/* Mac mini hack -- use the same DDC as the analog connector */
1308static struct edid *
1309intel_sdvo_get_analog_edid(struct drm_connector *connector)
1310{
Chris Wilsonf899fc62010-07-20 15:44:45 -07001311 struct drm_i915_private *dev_priv = connector->dev->dev_private;
Chris Wilsonff482d82010-09-15 10:40:38 +01001312
Chris Wilson0c1dab82010-11-23 22:37:01 +00001313 return drm_get_edid(connector,
1314 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
Chris Wilsonff482d82010-09-15 10:40:38 +01001315}
1316
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001317enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001318intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001319{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001320 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson9d1a9032010-09-14 17:58:19 +01001321 enum drm_connector_status status;
1322 struct edid *edid;
Ma Ling9dff6af2009-04-02 13:13:26 +08001323
Chris Wilsone957d772010-09-24 12:52:03 +01001324 edid = intel_sdvo_get_edid(connector);
Keith Packard57cdaf92009-09-04 13:07:54 +08001325
Chris Wilsonea5b2132010-08-04 13:50:23 +01001326 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Chris Wilsone957d772010-09-24 12:52:03 +01001327 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001328
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001329 /*
1330 * Don't use the 1 as the argument of DDC bus switch to get
1331 * the EDID. It is used for SDVO SPD ROM.
1332 */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001333 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
Chris Wilsone957d772010-09-24 12:52:03 +01001334 intel_sdvo->ddc_bus = ddc;
1335 edid = intel_sdvo_get_edid(connector);
1336 if (edid)
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001337 break;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001338 }
Chris Wilsone957d772010-09-24 12:52:03 +01001339 /*
1340 * If we found the EDID on the other bus,
1341 * assume that is the correct DDC bus.
1342 */
1343 if (edid == NULL)
1344 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001345 }
Chris Wilson9d1a9032010-09-14 17:58:19 +01001346
1347 /*
1348 * When there is no edid and no monitor is connected with VGA
1349 * port, try to use the CRT ddc to read the EDID for DVI-connector.
Keith Packard57cdaf92009-09-04 13:07:54 +08001350 */
Chris Wilsonff482d82010-09-15 10:40:38 +01001351 if (edid == NULL)
1352 edid = intel_sdvo_get_analog_edid(connector);
Adam Jackson149c36a2010-04-29 14:05:18 -04001353
Chris Wilson2f551c82010-09-15 10:42:50 +01001354 status = connector_status_unknown;
Ma Ling9dff6af2009-04-02 13:13:26 +08001355 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001356 /* DDC bus is shared, match EDID to connector type */
Chris Wilson9d1a9032010-09-14 17:58:19 +01001357 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1358 status = connector_status_connected;
Chris Wilsonda79de92010-11-22 11:12:46 +00001359 if (intel_sdvo->is_hdmi) {
1360 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1361 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1362 }
Chris Wilson139467432011-02-09 20:01:16 +00001363 } else
1364 status = connector_status_disconnected;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001365 connector->display_info.raw_edid = NULL;
Chris Wilson9d1a9032010-09-14 17:58:19 +01001366 kfree(edid);
1367 }
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001368
1369 if (status == connector_status_connected) {
1370 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1371 if (intel_sdvo_connector->force_audio)
Chris Wilsonda79de92010-11-22 11:12:46 +00001372 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001373 }
1374
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001375 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001376}
1377
Chris Wilson7b334fc2010-09-09 23:51:02 +01001378static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +01001379intel_sdvo_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -08001380{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001381 uint16_t response;
Chris Wilsondf0e9242010-09-09 16:20:55 +01001382 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001383 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001384 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001385
Chris Wilson32aad862010-08-04 13:50:25 +01001386 if (!intel_sdvo_write_cmd(intel_sdvo,
Chris Wilsone957d772010-09-24 12:52:03 +01001387 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
Chris Wilson32aad862010-08-04 13:50:25 +01001388 return connector_status_unknown;
Chris Wilsonba84cd12010-11-24 17:37:17 +00001389
1390 /* add 30ms delay when the output type might be TV */
1391 if (intel_sdvo->caps.output_flags &
1392 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001393 mdelay(30);
Chris Wilsonba84cd12010-11-24 17:37:17 +00001394
Chris Wilson32aad862010-08-04 13:50:25 +01001395 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1396 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001397
Chris Wilsone957d772010-09-24 12:52:03 +01001398 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1399 response & 0xff, response >> 8,
1400 intel_sdvo_connector->output_flag);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001401
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001402 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001403 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001404
Chris Wilsonea5b2132010-08-04 13:50:23 +01001405 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001406
Chris Wilson97aaf912011-01-04 20:10:52 +00001407 intel_sdvo->has_hdmi_monitor = false;
1408 intel_sdvo->has_hdmi_audio = false;
1409
Chris Wilson615fb932010-08-04 13:50:24 +01001410 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001411 ret = connector_status_disconnected;
Chris Wilson139467432011-02-09 20:01:16 +00001412 else if (IS_TMDS(intel_sdvo_connector))
Adam Jackson149c36a2010-04-29 14:05:18 -04001413 ret = intel_sdvo_hdmi_sink_detect(connector);
Chris Wilson139467432011-02-09 20:01:16 +00001414 else {
1415 struct edid *edid;
1416
1417 /* if we have an edid check it matches the connection */
1418 edid = intel_sdvo_get_edid(connector);
1419 if (edid == NULL)
1420 edid = intel_sdvo_get_analog_edid(connector);
1421 if (edid != NULL) {
1422 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1423 ret = connector_status_disconnected;
1424 else
1425 ret = connector_status_connected;
1426 connector->display_info.raw_edid = NULL;
1427 kfree(edid);
1428 } else
1429 ret = connector_status_connected;
1430 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001431
1432 /* May update encoder flag for like clock for SDVO TV, etc.*/
1433 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001434 intel_sdvo->is_tv = false;
1435 intel_sdvo->is_lvds = false;
1436 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001437
1438 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001439 intel_sdvo->is_tv = true;
1440 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001441 }
1442 if (response & SDVO_LVDS_MASK)
Chris Wilson85454232010-08-08 14:28:23 +01001443 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001444 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001445
1446 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001447}
1448
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001449static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001450{
Chris Wilsonff482d82010-09-15 10:40:38 +01001451 struct edid *edid;
Jesse Barnes79e53942008-11-07 14:24:08 -08001452
1453 /* set the bus switch and get the modes */
Chris Wilsone957d772010-09-24 12:52:03 +01001454 edid = intel_sdvo_get_edid(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001455
Keith Packard57cdaf92009-09-04 13:07:54 +08001456 /*
1457 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1458 * link between analog and digital outputs. So, if the regular SDVO
1459 * DDC fails, check to see if the analog output is disconnected, in
1460 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001461 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001462 if (edid == NULL)
1463 edid = intel_sdvo_get_analog_edid(connector);
1464
Chris Wilsonff482d82010-09-15 10:40:38 +01001465 if (edid != NULL) {
Chris Wilson139467432011-02-09 20:01:16 +00001466 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1467 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1468 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1469
1470 if (connector_is_digital == monitor_is_digital) {
Chris Wilson0c1dab82010-11-23 22:37:01 +00001471 drm_mode_connector_update_edid_property(connector, edid);
1472 drm_add_edid_modes(connector, edid);
1473 }
Chris Wilson139467432011-02-09 20:01:16 +00001474
Chris Wilsonff482d82010-09-15 10:40:38 +01001475 connector->display_info.raw_edid = NULL;
1476 kfree(edid);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001477 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001478}
1479
1480/*
1481 * Set of SDVO TV modes.
1482 * Note! This is in reply order (see loop in get_tv_modes).
1483 * XXX: all 60Hz refresh?
1484 */
1485struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001486 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1487 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001489 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1490 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001492 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1493 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001495 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1496 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001498 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1499 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001501 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1502 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001504 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1505 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001507 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1508 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001510 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1511 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001513 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1514 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001516 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1517 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001519 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1520 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001522 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1523 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001525 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1526 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001528 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1529 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001531 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1532 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001534 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1535 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001537 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1538 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001540 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1541 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001542 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1543};
1544
1545static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1546{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001547 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001548 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001549 uint32_t reply = 0, format_map = 0;
1550 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001551
1552 /* Read the list of supported input resolutions for the selected TV
1553 * format.
1554 */
Chris Wilson40039752010-08-04 13:50:26 +01001555 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001556 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001557 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001558
Chris Wilson32aad862010-08-04 13:50:25 +01001559 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1560 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001561
Chris Wilson32aad862010-08-04 13:50:25 +01001562 BUILD_BUG_ON(sizeof(tv_res) != 3);
Chris Wilsone957d772010-09-24 12:52:03 +01001563 if (!intel_sdvo_write_cmd(intel_sdvo,
1564 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
Chris Wilson32aad862010-08-04 13:50:25 +01001565 &tv_res, sizeof(tv_res)))
1566 return;
1567 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001568 return;
1569
1570 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001571 if (reply & (1 << i)) {
1572 struct drm_display_mode *nmode;
1573 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001574 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001575 if (nmode)
1576 drm_mode_probed_add(connector, nmode);
1577 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001578}
1579
Ma Ling7086c872009-05-13 11:20:06 +08001580static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1581{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001582 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Ma Ling7086c872009-05-13 11:20:06 +08001583 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001584 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001585
1586 /*
1587 * Attempt to get the mode list from DDC.
1588 * Assume that the preferred modes are
1589 * arranged in priority order.
1590 */
Chris Wilsonf899fc62010-07-20 15:44:45 -07001591 intel_ddc_get_modes(connector, intel_sdvo->i2c);
Ma Ling7086c872009-05-13 11:20:06 +08001592 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001593 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001594
1595 /* Fetch modes from VBT */
1596 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001597 newmode = drm_mode_duplicate(connector->dev,
1598 dev_priv->sdvo_lvds_vbt_mode);
1599 if (newmode != NULL) {
1600 /* Guarantee the mode is preferred */
1601 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1602 DRM_MODE_TYPE_DRIVER);
1603 drm_mode_probed_add(connector, newmode);
1604 }
1605 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001606
1607end:
1608 list_for_each_entry(newmode, &connector->probed_modes, head) {
1609 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001610 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001611 drm_mode_duplicate(connector->dev, newmode);
Chris Wilson6c9547f2010-08-25 10:05:17 +01001612
1613 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1614 0);
1615
Chris Wilson85454232010-08-08 14:28:23 +01001616 intel_sdvo->is_lvds = true;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001617 break;
1618 }
1619 }
1620
Ma Ling7086c872009-05-13 11:20:06 +08001621}
1622
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001623static int intel_sdvo_get_modes(struct drm_connector *connector)
1624{
Chris Wilson615fb932010-08-04 13:50:24 +01001625 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001626
Chris Wilson615fb932010-08-04 13:50:24 +01001627 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001628 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001629 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001630 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001631 else
1632 intel_sdvo_get_ddc_modes(connector);
1633
Chris Wilson32aad862010-08-04 13:50:25 +01001634 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001635}
1636
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001637static void
1638intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001639{
Chris Wilson615fb932010-08-04 13:50:24 +01001640 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001641 struct drm_device *dev = connector->dev;
1642
Chris Wilsonc5521702010-08-04 13:50:28 +01001643 if (intel_sdvo_connector->left)
1644 drm_property_destroy(dev, intel_sdvo_connector->left);
1645 if (intel_sdvo_connector->right)
1646 drm_property_destroy(dev, intel_sdvo_connector->right);
1647 if (intel_sdvo_connector->top)
1648 drm_property_destroy(dev, intel_sdvo_connector->top);
1649 if (intel_sdvo_connector->bottom)
1650 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1651 if (intel_sdvo_connector->hpos)
1652 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1653 if (intel_sdvo_connector->vpos)
1654 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1655 if (intel_sdvo_connector->saturation)
1656 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1657 if (intel_sdvo_connector->contrast)
1658 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1659 if (intel_sdvo_connector->hue)
1660 drm_property_destroy(dev, intel_sdvo_connector->hue);
1661 if (intel_sdvo_connector->sharpness)
1662 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1663 if (intel_sdvo_connector->flicker_filter)
1664 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1665 if (intel_sdvo_connector->flicker_filter_2d)
1666 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1667 if (intel_sdvo_connector->flicker_filter_adaptive)
1668 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1669 if (intel_sdvo_connector->tv_luma_filter)
1670 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1671 if (intel_sdvo_connector->tv_chroma_filter)
1672 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
Chris Wilsone0442182010-08-04 13:50:29 +01001673 if (intel_sdvo_connector->dot_crawl)
1674 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
Chris Wilsonc5521702010-08-04 13:50:28 +01001675 if (intel_sdvo_connector->brightness)
1676 drm_property_destroy(dev, intel_sdvo_connector->brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001677}
1678
Jesse Barnes79e53942008-11-07 14:24:08 -08001679static void intel_sdvo_destroy(struct drm_connector *connector)
1680{
Chris Wilson615fb932010-08-04 13:50:24 +01001681 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001682
Chris Wilsonc5521702010-08-04 13:50:28 +01001683 if (intel_sdvo_connector->tv_format)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001684 drm_property_destroy(connector->dev,
Chris Wilsonc5521702010-08-04 13:50:28 +01001685 intel_sdvo_connector->tv_format);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001686
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001687 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001688 drm_sysfs_connector_remove(connector);
1689 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001690 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001691}
1692
Zhao Yakuice6feab2009-08-24 13:50:26 +08001693static int
1694intel_sdvo_set_property(struct drm_connector *connector,
1695 struct drm_property *property,
1696 uint64_t val)
1697{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001698 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001699 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001700 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001701 uint8_t cmd;
1702 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001703
1704 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001705 if (ret)
1706 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001707
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001708 if (property == intel_sdvo_connector->force_audio_property) {
1709 if (val == intel_sdvo_connector->force_audio)
1710 return 0;
1711
1712 intel_sdvo_connector->force_audio = val;
1713
Chris Wilsonda79de92010-11-22 11:12:46 +00001714 if (val > 0 && intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001715 return 0;
Chris Wilsonda79de92010-11-22 11:12:46 +00001716 if (val < 0 && !intel_sdvo->has_hdmi_audio)
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001717 return 0;
1718
Chris Wilsonda79de92010-11-22 11:12:46 +00001719 intel_sdvo->has_hdmi_audio = val > 0;
Chris Wilson7f36e7e2010-09-19 09:29:33 +01001720 goto done;
1721 }
1722
Chris Wilsonc5521702010-08-04 13:50:28 +01001723#define CHECK_PROPERTY(name, NAME) \
1724 if (intel_sdvo_connector->name == property) { \
1725 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1726 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1727 cmd = SDVO_CMD_SET_##NAME; \
1728 intel_sdvo_connector->cur_##name = temp_value; \
1729 goto set_value; \
1730 }
1731
1732 if (property == intel_sdvo_connector->tv_format) {
Chris Wilson32aad862010-08-04 13:50:25 +01001733 if (val >= TV_FORMAT_NUM)
1734 return -EINVAL;
1735
Chris Wilson40039752010-08-04 13:50:26 +01001736 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001737 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001738 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001739
Chris Wilson40039752010-08-04 13:50:26 +01001740 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Chris Wilsonc5521702010-08-04 13:50:28 +01001741 goto done;
Chris Wilson32aad862010-08-04 13:50:25 +01001742 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001743 temp_value = val;
Chris Wilsonc5521702010-08-04 13:50:28 +01001744 if (intel_sdvo_connector->left == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001745 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001746 intel_sdvo_connector->right, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001747 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001748 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001749
Chris Wilson615fb932010-08-04 13:50:24 +01001750 intel_sdvo_connector->left_margin = temp_value;
1751 intel_sdvo_connector->right_margin = temp_value;
1752 temp_value = intel_sdvo_connector->max_hscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001753 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001754 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001755 goto set_value;
1756 } else if (intel_sdvo_connector->right == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001757 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001758 intel_sdvo_connector->left, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001759 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001760 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001761
Chris Wilson615fb932010-08-04 13:50:24 +01001762 intel_sdvo_connector->left_margin = temp_value;
1763 intel_sdvo_connector->right_margin = temp_value;
1764 temp_value = intel_sdvo_connector->max_hscan -
1765 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001766 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilsonc5521702010-08-04 13:50:28 +01001767 goto set_value;
1768 } else if (intel_sdvo_connector->top == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001769 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001770 intel_sdvo_connector->bottom, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001771 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001772 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001773
Chris Wilson615fb932010-08-04 13:50:24 +01001774 intel_sdvo_connector->top_margin = temp_value;
1775 intel_sdvo_connector->bottom_margin = temp_value;
1776 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001777 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001778 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001779 goto set_value;
1780 } else if (intel_sdvo_connector->bottom == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001781 drm_connector_property_set_value(connector,
Chris Wilsonc5521702010-08-04 13:50:28 +01001782 intel_sdvo_connector->top, val);
Chris Wilson615fb932010-08-04 13:50:24 +01001783 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001784 return 0;
1785
Chris Wilson615fb932010-08-04 13:50:24 +01001786 intel_sdvo_connector->top_margin = temp_value;
1787 intel_sdvo_connector->bottom_margin = temp_value;
1788 temp_value = intel_sdvo_connector->max_vscan -
Chris Wilsonc5521702010-08-04 13:50:28 +01001789 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001790 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilsonc5521702010-08-04 13:50:28 +01001791 goto set_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001792 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001793 CHECK_PROPERTY(hpos, HPOS)
1794 CHECK_PROPERTY(vpos, VPOS)
1795 CHECK_PROPERTY(saturation, SATURATION)
1796 CHECK_PROPERTY(contrast, CONTRAST)
1797 CHECK_PROPERTY(hue, HUE)
1798 CHECK_PROPERTY(brightness, BRIGHTNESS)
1799 CHECK_PROPERTY(sharpness, SHARPNESS)
1800 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1801 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1802 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1803 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1804 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
Chris Wilsone0442182010-08-04 13:50:29 +01001805 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001806 }
Chris Wilsonc5521702010-08-04 13:50:28 +01001807
1808 return -EINVAL; /* unknown property */
1809
1810set_value:
1811 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1812 return -EIO;
1813
1814
1815done:
Chris Wilsondf0e9242010-09-09 16:20:55 +01001816 if (intel_sdvo->base.base.crtc) {
1817 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001818 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
Chris Wilsonc5521702010-08-04 13:50:28 +01001819 crtc->y, crtc->fb);
1820 }
1821
Chris Wilson32aad862010-08-04 13:50:25 +01001822 return 0;
Chris Wilsonc5521702010-08-04 13:50:28 +01001823#undef CHECK_PROPERTY
Zhao Yakuice6feab2009-08-24 13:50:26 +08001824}
1825
Jesse Barnes79e53942008-11-07 14:24:08 -08001826static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1827 .dpms = intel_sdvo_dpms,
1828 .mode_fixup = intel_sdvo_mode_fixup,
1829 .prepare = intel_encoder_prepare,
1830 .mode_set = intel_sdvo_mode_set,
1831 .commit = intel_encoder_commit,
1832};
1833
1834static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001835 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001836 .detect = intel_sdvo_detect,
1837 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001838 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001839 .destroy = intel_sdvo_destroy,
1840};
1841
1842static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1843 .get_modes = intel_sdvo_get_modes,
1844 .mode_valid = intel_sdvo_mode_valid,
Chris Wilsondf0e9242010-09-09 16:20:55 +01001845 .best_encoder = intel_best_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001846};
1847
Hannes Ederb358d0a2008-12-18 21:18:47 +01001848static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001849{
Chris Wilson890f3352010-09-14 16:46:59 +01001850 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001851
Chris Wilsonea5b2132010-08-04 13:50:23 +01001852 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001853 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001854 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001855
Chris Wilsone957d772010-09-24 12:52:03 +01001856 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001857 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001858}
1859
1860static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1861 .destroy = intel_sdvo_enc_destroy,
1862};
1863
Chris Wilsonb66d8422010-08-12 15:26:41 +01001864static void
1865intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1866{
1867 uint16_t mask = 0;
1868 unsigned int num_bits;
1869
1870 /* Make a mask of outputs less than or equal to our own priority in the
1871 * list.
1872 */
1873 switch (sdvo->controlled_output) {
1874 case SDVO_OUTPUT_LVDS1:
1875 mask |= SDVO_OUTPUT_LVDS1;
1876 case SDVO_OUTPUT_LVDS0:
1877 mask |= SDVO_OUTPUT_LVDS0;
1878 case SDVO_OUTPUT_TMDS1:
1879 mask |= SDVO_OUTPUT_TMDS1;
1880 case SDVO_OUTPUT_TMDS0:
1881 mask |= SDVO_OUTPUT_TMDS0;
1882 case SDVO_OUTPUT_RGB1:
1883 mask |= SDVO_OUTPUT_RGB1;
1884 case SDVO_OUTPUT_RGB0:
1885 mask |= SDVO_OUTPUT_RGB0;
1886 break;
1887 }
1888
1889 /* Count bits to find what number we are in the priority list. */
1890 mask &= sdvo->caps.output_flags;
1891 num_bits = hweight16(mask);
1892 /* If more than 3 outputs, default to DDC bus 3 for now. */
1893 if (num_bits > 3)
1894 num_bits = 3;
1895
1896 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1897 sdvo->ddc_bus = 1 << num_bits;
1898}
Jesse Barnes79e53942008-11-07 14:24:08 -08001899
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001900/**
1901 * Choose the appropriate DDC bus for control bus switch command for this
1902 * SDVO output based on the controlled output.
1903 *
1904 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1905 * outputs, then LVDS outputs.
1906 */
1907static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001908intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001909 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001910{
Adam Jacksonb1083332010-04-23 16:07:40 -04001911 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001912
Adam Jacksonb1083332010-04-23 16:07:40 -04001913 if (IS_SDVOB(reg))
1914 mapping = &(dev_priv->sdvo_mappings[0]);
1915 else
1916 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001917
Chris Wilsonb66d8422010-08-12 15:26:41 +01001918 if (mapping->initialized)
1919 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1920 else
1921 intel_sdvo_guess_ddc_bus(sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001922}
1923
Chris Wilsone957d772010-09-24 12:52:03 +01001924static void
1925intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1926 struct intel_sdvo *sdvo, u32 reg)
1927{
1928 struct sdvo_device_mapping *mapping;
1929 u8 pin, speed;
1930
1931 if (IS_SDVOB(reg))
1932 mapping = &dev_priv->sdvo_mappings[0];
1933 else
1934 mapping = &dev_priv->sdvo_mappings[1];
1935
1936 pin = GMBUS_PORT_DPB;
1937 speed = GMBUS_RATE_1MHZ >> 8;
1938 if (mapping->initialized) {
1939 pin = mapping->i2c_pin;
1940 speed = mapping->i2c_speed;
1941 }
1942
Chris Wilson63abf3e2010-12-08 16:48:21 +00001943 if (pin < GMBUS_NUM_PORTS) {
1944 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1945 intel_gmbus_set_speed(sdvo->i2c, speed);
1946 intel_gmbus_force_bit(sdvo->i2c, true);
1947 } else
1948 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
Chris Wilsone957d772010-09-24 12:52:03 +01001949}
1950
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001951static bool
Chris Wilsone27d8532010-10-22 09:15:22 +01001952intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001953{
Chris Wilson97aaf912011-01-04 20:10:52 +00001954 return intel_sdvo_check_supp_encode(intel_sdvo);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001955}
1956
yakui_zhao714605e2009-05-31 17:18:07 +08001957static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001958intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001959{
1960 struct drm_i915_private *dev_priv = dev->dev_private;
1961 struct sdvo_device_mapping *my_mapping, *other_mapping;
1962
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001963 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001964 my_mapping = &dev_priv->sdvo_mappings[0];
1965 other_mapping = &dev_priv->sdvo_mappings[1];
1966 } else {
1967 my_mapping = &dev_priv->sdvo_mappings[1];
1968 other_mapping = &dev_priv->sdvo_mappings[0];
1969 }
1970
1971 /* If the BIOS described our SDVO device, take advantage of it. */
1972 if (my_mapping->slave_addr)
1973 return my_mapping->slave_addr;
1974
1975 /* If the BIOS only described a different SDVO device, use the
1976 * address that it isn't using.
1977 */
1978 if (other_mapping->slave_addr) {
1979 if (other_mapping->slave_addr == 0x70)
1980 return 0x72;
1981 else
1982 return 0x70;
1983 }
1984
1985 /* No SDVO device info is found for another DVO port,
1986 * so use mapping assumption we had before BIOS parsing.
1987 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001988 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08001989 return 0x70;
1990 else
1991 return 0x72;
1992}
1993
Zhenyu Wang14571b42010-03-30 14:06:33 +08001994static void
Chris Wilsondf0e9242010-09-09 16:20:55 +01001995intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1996 struct intel_sdvo *encoder)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001997{
Chris Wilsondf0e9242010-09-09 16:20:55 +01001998 drm_connector_init(encoder->base.base.dev,
1999 &connector->base.base,
2000 &intel_sdvo_connector_funcs,
2001 connector->base.base.connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002002
Chris Wilsondf0e9242010-09-09 16:20:55 +01002003 drm_connector_helper_add(&connector->base.base,
2004 &intel_sdvo_connector_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002005
Chris Wilsondf0e9242010-09-09 16:20:55 +01002006 connector->base.base.interlace_allowed = 0;
2007 connector->base.base.doublescan_allowed = 0;
2008 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002009
Chris Wilsondf0e9242010-09-09 16:20:55 +01002010 intel_connector_attach_encoder(&connector->base, &encoder->base);
2011 drm_sysfs_connector_add(&connector->base.base);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002012}
2013
Chris Wilson7f36e7e2010-09-19 09:29:33 +01002014static void
2015intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2016{
2017 struct drm_device *dev = connector->base.base.dev;
2018
2019 connector->force_audio_property =
2020 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2021 if (connector->force_audio_property) {
2022 connector->force_audio_property->values[0] = -1;
2023 connector->force_audio_property->values[1] = 1;
2024 drm_connector_attach_property(&connector->base.base,
2025 connector->force_audio_property, 0);
2026 }
2027}
2028
Zhenyu Wang14571b42010-03-30 14:06:33 +08002029static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002030intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002031{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002032 struct drm_encoder *encoder = &intel_sdvo->base.base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002033 struct drm_connector *connector;
2034 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002035 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002036
Chris Wilson615fb932010-08-04 13:50:24 +01002037 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2038 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002039 return false;
2040
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002042 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002043 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002044 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002047 }
2048
Chris Wilson615fb932010-08-04 13:50:24 +01002049 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002051 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002052 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2053 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2054
Chris Wilsone27d8532010-10-22 09:15:22 +01002055 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002056 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
Chris Wilsone27d8532010-10-22 09:15:22 +01002057 intel_sdvo->is_hdmi = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002058 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002059 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2060 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002061
Chris Wilsondf0e9242010-09-09 16:20:55 +01002062 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilsonf797d222010-12-23 09:43:48 +00002063 if (intel_sdvo->is_hdmi)
2064 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002065
2066 return true;
2067}
2068
2069static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002070intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002071{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002072 struct drm_encoder *encoder = &intel_sdvo->base.base;
2073 struct drm_connector *connector;
2074 struct intel_connector *intel_connector;
2075 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002076
Chris Wilson615fb932010-08-04 13:50:24 +01002077 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2078 if (!intel_sdvo_connector)
2079 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002080
Chris Wilson615fb932010-08-04 13:50:24 +01002081 intel_connector = &intel_sdvo_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002082 connector = &intel_connector->base;
2083 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2084 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002085
Chris Wilson4ef69c72010-09-09 15:14:28 +01002086 intel_sdvo->controlled_output |= type;
2087 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088
Chris Wilson4ef69c72010-09-09 15:14:28 +01002089 intel_sdvo->is_tv = true;
2090 intel_sdvo->base.needs_tv_clock = true;
2091 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002092
Chris Wilsondf0e9242010-09-09 16:20:55 +01002093 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002094
Chris Wilson4ef69c72010-09-09 15:14:28 +01002095 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
Chris Wilson32aad862010-08-04 13:50:25 +01002096 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097
Chris Wilson4ef69c72010-09-09 15:14:28 +01002098 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002099 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002100
Chris Wilson4ef69c72010-09-09 15:14:28 +01002101 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002102
2103err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002104 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002105 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002106}
2107
2108static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002109intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002110{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002111 struct drm_encoder *encoder = &intel_sdvo->base.base;
2112 struct drm_connector *connector;
2113 struct intel_connector *intel_connector;
2114 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002115
Chris Wilson615fb932010-08-04 13:50:24 +01002116 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2117 if (!intel_sdvo_connector)
2118 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002119
Chris Wilson615fb932010-08-04 13:50:24 +01002120 intel_connector = &intel_sdvo_connector->base;
2121 connector = &intel_connector->base;
Chris Wilson4ef69c72010-09-09 15:14:28 +01002122 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2123 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2124 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002125
Chris Wilson4ef69c72010-09-09 15:14:28 +01002126 if (device == 0) {
2127 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2128 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2129 } else if (device == 1) {
2130 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2131 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2132 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08002133
Chris Wilson4ef69c72010-09-09 15:14:28 +01002134 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2135 (1 << INTEL_ANALOG_CLONE_BIT));
2136
Chris Wilsondf0e9242010-09-09 16:20:55 +01002137 intel_sdvo_connector_init(intel_sdvo_connector,
2138 intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002139 return true;
2140}
2141
2142static bool
2143intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2144{
2145 struct drm_encoder *encoder = &intel_sdvo->base.base;
2146 struct drm_connector *connector;
2147 struct intel_connector *intel_connector;
2148 struct intel_sdvo_connector *intel_sdvo_connector;
2149
2150 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2151 if (!intel_sdvo_connector)
2152 return false;
2153
2154 intel_connector = &intel_sdvo_connector->base;
2155 connector = &intel_connector->base;
2156 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2157 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2158
2159 if (device == 0) {
2160 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2161 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2162 } else if (device == 1) {
2163 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2164 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2165 }
2166
2167 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
Chris Wilsonea5b2132010-08-04 13:50:23 +01002168 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002169
Chris Wilsondf0e9242010-09-09 16:20:55 +01002170 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
Chris Wilson4ef69c72010-09-09 15:14:28 +01002171 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
Chris Wilson32aad862010-08-04 13:50:25 +01002172 goto err;
2173
2174 return true;
2175
2176err:
Chris Wilson123d5c02010-09-23 16:15:21 +01002177 intel_sdvo_destroy(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002178 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002179}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002180
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002181static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002182intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002183{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002184 intel_sdvo->is_tv = false;
2185 intel_sdvo->base.needs_tv_clock = false;
2186 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002187
Zhenyu Wang14571b42010-03-30 14:06:33 +08002188 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002189
Zhenyu Wang14571b42010-03-30 14:06:33 +08002190 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002191 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002192 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002193
Zhenyu Wang14571b42010-03-30 14:06:33 +08002194 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002195 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002196 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002197
Zhenyu Wang14571b42010-03-30 14:06:33 +08002198 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002199 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002200 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002201 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002202
Zhenyu Wang14571b42010-03-30 14:06:33 +08002203 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002204 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002205 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002206
Zhenyu Wang14571b42010-03-30 14:06:33 +08002207 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002208 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002210
Zhenyu Wang14571b42010-03-30 14:06:33 +08002211 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002212 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002214
Zhenyu Wang14571b42010-03-30 14:06:33 +08002215 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002216 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002217 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002218
Zhenyu Wang14571b42010-03-30 14:06:33 +08002219 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002220 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002221 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002222
Zhenyu Wang14571b42010-03-30 14:06:33 +08002223 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002224 unsigned char bytes[2];
2225
Chris Wilsonea5b2132010-08-04 13:50:23 +01002226 intel_sdvo->controlled_output = 0;
2227 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002228 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002229 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002230 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002231 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002232 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002233 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002234
Zhenyu Wang14571b42010-03-30 14:06:33 +08002235 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002236}
2237
Chris Wilson32aad862010-08-04 13:50:25 +01002238static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2239 struct intel_sdvo_connector *intel_sdvo_connector,
2240 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002241{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002242 struct drm_device *dev = intel_sdvo->base.base.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002243 struct intel_sdvo_tv_format format;
2244 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002245
Chris Wilson32aad862010-08-04 13:50:25 +01002246 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2247 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002248
Chris Wilson32aad862010-08-04 13:50:25 +01002249 if (!intel_sdvo_get_value(intel_sdvo,
2250 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2251 &format, sizeof(format)))
2252 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002253
Chris Wilson32aad862010-08-04 13:50:25 +01002254 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002255
2256 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002257 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002258
Chris Wilson615fb932010-08-04 13:50:24 +01002259 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002260 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002261 if (format_map & (1 << i))
2262 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002263
2264
Chris Wilsonc5521702010-08-04 13:50:28 +01002265 intel_sdvo_connector->tv_format =
Chris Wilson32aad862010-08-04 13:50:25 +01002266 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2267 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonc5521702010-08-04 13:50:28 +01002268 if (!intel_sdvo_connector->tv_format)
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002269 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002270
Chris Wilson615fb932010-08-04 13:50:24 +01002271 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002272 drm_property_add_enum(
Chris Wilsonc5521702010-08-04 13:50:28 +01002273 intel_sdvo_connector->tv_format, i,
Chris Wilson40039752010-08-04 13:50:26 +01002274 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002275
Chris Wilson40039752010-08-04 13:50:26 +01002276 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002277 drm_connector_attach_property(&intel_sdvo_connector->base.base,
Chris Wilsonc5521702010-08-04 13:50:28 +01002278 intel_sdvo_connector->tv_format, 0);
Chris Wilson32aad862010-08-04 13:50:25 +01002279 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002280
2281}
2282
Chris Wilsonc5521702010-08-04 13:50:28 +01002283#define ENHANCEMENT(name, NAME) do { \
2284 if (enhancements.name) { \
2285 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2286 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2287 return false; \
2288 intel_sdvo_connector->max_##name = data_value[0]; \
2289 intel_sdvo_connector->cur_##name = response; \
2290 intel_sdvo_connector->name = \
2291 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2292 if (!intel_sdvo_connector->name) return false; \
2293 intel_sdvo_connector->name->values[0] = 0; \
2294 intel_sdvo_connector->name->values[1] = data_value[0]; \
2295 drm_connector_attach_property(connector, \
2296 intel_sdvo_connector->name, \
2297 intel_sdvo_connector->cur_##name); \
2298 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2299 data_value[0], data_value[1], response); \
2300 } \
2301} while(0)
2302
2303static bool
2304intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2305 struct intel_sdvo_connector *intel_sdvo_connector,
2306 struct intel_sdvo_enhancements_reply enhancements)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002307{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002308 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilson32aad862010-08-04 13:50:25 +01002309 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002310 uint16_t response, data_value[2];
2311
Chris Wilsonc5521702010-08-04 13:50:28 +01002312 /* when horizontal overscan is supported, Add the left/right property */
2313 if (enhancements.overscan_h) {
2314 if (!intel_sdvo_get_value(intel_sdvo,
2315 SDVO_CMD_GET_MAX_OVERSCAN_H,
2316 &data_value, 4))
2317 return false;
2318
2319 if (!intel_sdvo_get_value(intel_sdvo,
2320 SDVO_CMD_GET_OVERSCAN_H,
2321 &response, 2))
2322 return false;
2323
2324 intel_sdvo_connector->max_hscan = data_value[0];
2325 intel_sdvo_connector->left_margin = data_value[0] - response;
2326 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2327 intel_sdvo_connector->left =
2328 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2329 "left_margin", 2);
2330 if (!intel_sdvo_connector->left)
2331 return false;
2332
2333 intel_sdvo_connector->left->values[0] = 0;
2334 intel_sdvo_connector->left->values[1] = data_value[0];
2335 drm_connector_attach_property(connector,
2336 intel_sdvo_connector->left,
2337 intel_sdvo_connector->left_margin);
2338
2339 intel_sdvo_connector->right =
2340 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2341 "right_margin", 2);
2342 if (!intel_sdvo_connector->right)
2343 return false;
2344
2345 intel_sdvo_connector->right->values[0] = 0;
2346 intel_sdvo_connector->right->values[1] = data_value[0];
2347 drm_connector_attach_property(connector,
2348 intel_sdvo_connector->right,
2349 intel_sdvo_connector->right_margin);
2350 DRM_DEBUG_KMS("h_overscan: max %d, "
2351 "default %d, current %d\n",
2352 data_value[0], data_value[1], response);
2353 }
2354
2355 if (enhancements.overscan_v) {
2356 if (!intel_sdvo_get_value(intel_sdvo,
2357 SDVO_CMD_GET_MAX_OVERSCAN_V,
2358 &data_value, 4))
2359 return false;
2360
2361 if (!intel_sdvo_get_value(intel_sdvo,
2362 SDVO_CMD_GET_OVERSCAN_V,
2363 &response, 2))
2364 return false;
2365
2366 intel_sdvo_connector->max_vscan = data_value[0];
2367 intel_sdvo_connector->top_margin = data_value[0] - response;
2368 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2369 intel_sdvo_connector->top =
2370 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2371 "top_margin", 2);
2372 if (!intel_sdvo_connector->top)
2373 return false;
2374
2375 intel_sdvo_connector->top->values[0] = 0;
2376 intel_sdvo_connector->top->values[1] = data_value[0];
2377 drm_connector_attach_property(connector,
2378 intel_sdvo_connector->top,
2379 intel_sdvo_connector->top_margin);
2380
2381 intel_sdvo_connector->bottom =
2382 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2383 "bottom_margin", 2);
2384 if (!intel_sdvo_connector->bottom)
2385 return false;
2386
2387 intel_sdvo_connector->bottom->values[0] = 0;
2388 intel_sdvo_connector->bottom->values[1] = data_value[0];
2389 drm_connector_attach_property(connector,
2390 intel_sdvo_connector->bottom,
2391 intel_sdvo_connector->bottom_margin);
2392 DRM_DEBUG_KMS("v_overscan: max %d, "
2393 "default %d, current %d\n",
2394 data_value[0], data_value[1], response);
2395 }
2396
2397 ENHANCEMENT(hpos, HPOS);
2398 ENHANCEMENT(vpos, VPOS);
2399 ENHANCEMENT(saturation, SATURATION);
2400 ENHANCEMENT(contrast, CONTRAST);
2401 ENHANCEMENT(hue, HUE);
2402 ENHANCEMENT(sharpness, SHARPNESS);
2403 ENHANCEMENT(brightness, BRIGHTNESS);
2404 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2405 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2406 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2407 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2408 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2409
Chris Wilsone0442182010-08-04 13:50:29 +01002410 if (enhancements.dot_crawl) {
2411 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2412 return false;
2413
2414 intel_sdvo_connector->max_dot_crawl = 1;
2415 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2416 intel_sdvo_connector->dot_crawl =
2417 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2418 if (!intel_sdvo_connector->dot_crawl)
2419 return false;
2420
2421 intel_sdvo_connector->dot_crawl->values[0] = 0;
2422 intel_sdvo_connector->dot_crawl->values[1] = 1;
2423 drm_connector_attach_property(connector,
2424 intel_sdvo_connector->dot_crawl,
2425 intel_sdvo_connector->cur_dot_crawl);
2426 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2427 }
2428
Chris Wilsonc5521702010-08-04 13:50:28 +01002429 return true;
2430}
2431
2432static bool
2433intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2434 struct intel_sdvo_connector *intel_sdvo_connector,
2435 struct intel_sdvo_enhancements_reply enhancements)
2436{
Chris Wilson4ef69c72010-09-09 15:14:28 +01002437 struct drm_device *dev = intel_sdvo->base.base.dev;
Chris Wilsonc5521702010-08-04 13:50:28 +01002438 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2439 uint16_t response, data_value[2];
2440
2441 ENHANCEMENT(brightness, BRIGHTNESS);
2442
2443 return true;
2444}
2445#undef ENHANCEMENT
2446
2447static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2448 struct intel_sdvo_connector *intel_sdvo_connector)
2449{
2450 union {
2451 struct intel_sdvo_enhancements_reply reply;
2452 uint16_t response;
2453 } enhancements;
2454
Chris Wilsoncf9a2f32010-09-23 16:17:33 +01002455 enhancements.response = 0;
2456 intel_sdvo_get_value(intel_sdvo,
2457 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2458 &enhancements, sizeof(enhancements));
Chris Wilsonc5521702010-08-04 13:50:28 +01002459 if (enhancements.response == 0) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002460 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002461 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002462 }
Chris Wilson32aad862010-08-04 13:50:25 +01002463
Chris Wilsonc5521702010-08-04 13:50:28 +01002464 if (IS_TV(intel_sdvo_connector))
2465 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2466 else if(IS_LVDS(intel_sdvo_connector))
2467 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2468 else
2469 return true;
Chris Wilsone957d772010-09-24 12:52:03 +01002470}
Chris Wilson32aad862010-08-04 13:50:25 +01002471
Chris Wilsone957d772010-09-24 12:52:03 +01002472static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2473 struct i2c_msg *msgs,
2474 int num)
2475{
2476 struct intel_sdvo *sdvo = adapter->algo_data;
2477
2478 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2479 return -EIO;
2480
2481 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2482}
2483
2484static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2485{
2486 struct intel_sdvo *sdvo = adapter->algo_data;
2487 return sdvo->i2c->algo->functionality(sdvo->i2c);
2488}
2489
2490static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2491 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2492 .functionality = intel_sdvo_ddc_proxy_func
2493};
2494
2495static bool
2496intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2497 struct drm_device *dev)
2498{
2499 sdvo->ddc.owner = THIS_MODULE;
2500 sdvo->ddc.class = I2C_CLASS_DDC;
2501 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2502 sdvo->ddc.dev.parent = &dev->pdev->dev;
2503 sdvo->ddc.algo_data = sdvo;
2504 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2505
2506 return i2c_add_adapter(&sdvo->ddc) == 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002507}
2508
Eric Anholtc751ce42010-03-25 11:48:48 -07002509bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002510{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002511 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002512 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002513 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002514 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -08002515
Chris Wilsonea5b2132010-08-04 13:50:23 +01002516 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2517 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002518 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002519
Chris Wilsone957d772010-09-24 12:52:03 +01002520 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2521 kfree(intel_sdvo);
2522 return false;
2523 }
2524
Chris Wilsonea5b2132010-08-04 13:50:23 +01002525 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002526
Chris Wilsonea5b2132010-08-04 13:50:23 +01002527 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002528 intel_encoder->type = INTEL_OUTPUT_SDVO;
Chris Wilson373a3cf2010-09-15 12:03:59 +01002529 /* encoder type will be decided later */
2530 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08002531
Chris Wilsone957d772010-09-24 12:52:03 +01002532 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2533 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002534
Jesse Barnes79e53942008-11-07 14:24:08 -08002535 /* Read the regs to test if we can talk to the device */
2536 for (i = 0; i < 0x40; i++) {
Chris Wilsonf899fc62010-07-20 15:44:45 -07002537 u8 byte;
2538
2539 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002540 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002541 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002542 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002543 }
2544 }
2545
Chris Wilsonf899fc62010-07-20 15:44:45 -07002546 if (IS_SDVOB(sdvo_reg))
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002547 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Chris Wilsonf899fc62010-07-20 15:44:45 -07002548 else
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002549 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Ma Ling619ac3b2009-05-18 16:12:46 +08002550
Chris Wilson4ef69c72010-09-09 15:14:28 +01002551 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002552
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002553 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002554 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002555 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002556
Chris Wilsonea5b2132010-08-04 13:50:23 +01002557 if (intel_sdvo_output_setup(intel_sdvo,
2558 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002559 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002560 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilsonf899fc62010-07-20 15:44:45 -07002561 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002562 }
2563
Chris Wilsonea5b2132010-08-04 13:50:23 +01002564 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002565
Jesse Barnes79e53942008-11-07 14:24:08 -08002566 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002567 if (!intel_sdvo_set_target_input(intel_sdvo))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002568 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002569
Chris Wilson32aad862010-08-04 13:50:25 +01002570 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2571 &intel_sdvo->pixel_clock_min,
2572 &intel_sdvo->pixel_clock_max))
Chris Wilsonf899fc62010-07-20 15:44:45 -07002573 goto err;
Jesse Barnes79e53942008-11-07 14:24:08 -08002574
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002575 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002576 "clock range %dMHz - %dMHz, "
2577 "input 1: %c, input 2: %c, "
2578 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002579 SDVO_NAME(intel_sdvo),
2580 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2581 intel_sdvo->caps.device_rev_id,
2582 intel_sdvo->pixel_clock_min / 1000,
2583 intel_sdvo->pixel_clock_max / 1000,
2584 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2585 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002586 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002587 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002588 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002589 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002590 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002591 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002592
Chris Wilsonf899fc62010-07-20 15:44:45 -07002593err:
Chris Wilson373a3cf2010-09-15 12:03:59 +01002594 drm_encoder_cleanup(&intel_encoder->base);
Chris Wilsone957d772010-09-24 12:52:03 +01002595 i2c_del_adapter(&intel_sdvo->ddc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01002596 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002597
Eric Anholt7d573822009-01-02 13:33:00 -08002598 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002599}