Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_sis.c - SiS ATA driver |
| 3 | * |
| 4 | * (C) 2005 Red Hat <alan@redhat.com> |
| 5 | * |
| 6 | * Based upon linux/drivers/ide/pci/sis5513.c |
| 7 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> |
| 8 | * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer |
| 9 | * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz> |
| 10 | * SiS Taiwan : for direct support and hardware. |
| 11 | * Daniela Engert : for initial ATA100 advices and numerous others. |
| 12 | * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt : |
| 13 | * for checking code correctness, providing patches. |
| 14 | * Original tests and design on the SiS620 chipset. |
| 15 | * ATA100 tests and design on the SiS735 chipset. |
| 16 | * ATA16/33 support from specs |
| 17 | * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw> |
| 18 | * |
| 19 | * |
| 20 | * TODO |
| 21 | * Check MWDMA on drives that don't support MWDMA speed pio cycles ? |
| 22 | * More Testing |
| 23 | */ |
| 24 | |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/pci.h> |
| 28 | #include <linux/init.h> |
| 29 | #include <linux/blkdev.h> |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/device.h> |
| 32 | #include <scsi/scsi_host.h> |
| 33 | #include <linux/libata.h> |
| 34 | #include <linux/ata.h> |
| 35 | |
| 36 | #define DRV_NAME "pata_sis" |
Alan | 62d64ae | 2006-11-27 16:27:20 +0000 | [diff] [blame] | 37 | #define DRV_VERSION "0.4.5" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 38 | |
| 39 | struct sis_chipset { |
| 40 | u16 device; /* PCI host ID */ |
| 41 | struct ata_port_info *info; /* Info block */ |
| 42 | /* Probably add family, cable detect type etc here to clean |
| 43 | up code later */ |
| 44 | }; |
| 45 | |
| 46 | /** |
| 47 | * sis_port_base - return PCI configuration base for dev |
| 48 | * @adev: device |
| 49 | * |
| 50 | * Returns the base of the PCI configuration registers for this port |
| 51 | * number. |
| 52 | */ |
| 53 | |
| 54 | static int sis_port_base(struct ata_device *adev) |
| 55 | { |
| 56 | return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno); |
| 57 | } |
| 58 | |
| 59 | /** |
| 60 | * sis_133_pre_reset - check for 40/80 pin |
| 61 | * @ap: Port |
| 62 | * |
| 63 | * Perform cable detection for the later UDMA133 capable |
| 64 | * SiS chipset. |
| 65 | */ |
| 66 | |
| 67 | static int sis_133_pre_reset(struct ata_port *ap) |
| 68 | { |
| 69 | static const struct pci_bits sis_enable_bits[] = { |
| 70 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 71 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 72 | }; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 73 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 74 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 75 | u16 tmp; |
| 76 | |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 77 | if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) |
| 78 | return -ENOENT; |
| 79 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 80 | /* The top bit of this register is the cable detect bit */ |
| 81 | pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); |
| 82 | if (tmp & 0x8000) |
| 83 | ap->cbl = ATA_CBL_PATA40; |
| 84 | else |
| 85 | ap->cbl = ATA_CBL_PATA80; |
| 86 | |
| 87 | return ata_std_prereset(ap); |
| 88 | } |
| 89 | |
| 90 | /** |
| 91 | * sis_error_handler - Probe specified port on PATA host controller |
| 92 | * @ap: Port to probe |
| 93 | * |
| 94 | * LOCKING: |
| 95 | * None (inherited from caller). |
| 96 | */ |
| 97 | |
| 98 | static void sis_133_error_handler(struct ata_port *ap) |
| 99 | { |
| 100 | ata_bmdma_drive_eh(ap, sis_133_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 101 | } |
| 102 | |
| 103 | |
| 104 | /** |
| 105 | * sis_66_pre_reset - check for 40/80 pin |
| 106 | * @ap: Port |
| 107 | * |
| 108 | * Perform cable detection on the UDMA66, UDMA100 and early UDMA133 |
| 109 | * SiS IDE controllers. |
| 110 | */ |
| 111 | |
| 112 | static int sis_66_pre_reset(struct ata_port *ap) |
| 113 | { |
| 114 | static const struct pci_bits sis_enable_bits[] = { |
| 115 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 116 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 117 | }; |
| 118 | |
| 119 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 120 | u8 tmp; |
| 121 | |
| 122 | if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { |
| 123 | ata_port_disable(ap); |
| 124 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
| 125 | return 0; |
| 126 | } |
| 127 | /* Older chips keep cable detect in bits 4/5 of reg 0x48 */ |
| 128 | pci_read_config_byte(pdev, 0x48, &tmp); |
| 129 | tmp >>= ap->port_no; |
| 130 | if (tmp & 0x10) |
| 131 | ap->cbl = ATA_CBL_PATA40; |
| 132 | else |
| 133 | ap->cbl = ATA_CBL_PATA80; |
| 134 | |
| 135 | return ata_std_prereset(ap); |
| 136 | } |
| 137 | |
| 138 | /** |
| 139 | * sis_66_error_handler - Probe specified port on PATA host controller |
| 140 | * @ap: Port to probe |
| 141 | * @classes: |
| 142 | * |
| 143 | * LOCKING: |
| 144 | * None (inherited from caller). |
| 145 | */ |
| 146 | |
| 147 | static void sis_66_error_handler(struct ata_port *ap) |
| 148 | { |
| 149 | ata_bmdma_drive_eh(ap, sis_66_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 150 | } |
| 151 | |
| 152 | /** |
| 153 | * sis_old_pre_reset - probe begin |
| 154 | * @ap: ATA port |
| 155 | * |
| 156 | * Set up cable type and use generic probe init |
| 157 | */ |
| 158 | |
| 159 | static int sis_old_pre_reset(struct ata_port *ap) |
| 160 | { |
| 161 | static const struct pci_bits sis_enable_bits[] = { |
| 162 | { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 163 | { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 164 | }; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 165 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 166 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 167 | |
| 168 | if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) { |
| 169 | ata_port_disable(ap); |
| 170 | printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id); |
| 171 | return 0; |
| 172 | } |
| 173 | ap->cbl = ATA_CBL_PATA40; |
| 174 | return ata_std_prereset(ap); |
| 175 | } |
| 176 | |
| 177 | |
| 178 | /** |
| 179 | * sis_old_error_handler - Probe specified port on PATA host controller |
| 180 | * @ap: Port to probe |
| 181 | * |
| 182 | * LOCKING: |
| 183 | * None (inherited from caller). |
| 184 | */ |
| 185 | |
| 186 | static void sis_old_error_handler(struct ata_port *ap) |
| 187 | { |
| 188 | ata_bmdma_drive_eh(ap, sis_old_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 189 | } |
| 190 | |
| 191 | /** |
| 192 | * sis_set_fifo - Set RWP fifo bits for this device |
| 193 | * @ap: Port |
| 194 | * @adev: Device |
| 195 | * |
| 196 | * SIS chipsets implement prefetch/postwrite bits for each device |
| 197 | * on both channels. This functionality is not ATAPI compatible and |
| 198 | * must be configured according to the class of device present |
| 199 | */ |
| 200 | |
| 201 | static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev) |
| 202 | { |
| 203 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 204 | u8 fifoctrl; |
| 205 | u8 mask = 0x11; |
| 206 | |
| 207 | mask <<= (2 * ap->port_no); |
| 208 | mask <<= adev->devno; |
| 209 | |
| 210 | /* This holds various bits including the FIFO control */ |
| 211 | pci_read_config_byte(pdev, 0x4B, &fifoctrl); |
| 212 | fifoctrl &= ~mask; |
| 213 | |
| 214 | /* Enable for ATA (disk) only */ |
| 215 | if (adev->class == ATA_DEV_ATA) |
| 216 | fifoctrl |= mask; |
| 217 | pci_write_config_byte(pdev, 0x4B, fifoctrl); |
| 218 | } |
| 219 | |
| 220 | /** |
| 221 | * sis_old_set_piomode - Initialize host controller PATA PIO timings |
| 222 | * @ap: Port whose timings we are configuring |
| 223 | * @adev: Device we are configuring for. |
| 224 | * |
| 225 | * Set PIO mode for device, in host controller PCI config space. This |
| 226 | * function handles PIO set up for all chips that are pre ATA100 and |
| 227 | * also early ATA100 devices. |
| 228 | * |
| 229 | * LOCKING: |
| 230 | * None (inherited from caller). |
| 231 | */ |
| 232 | |
| 233 | static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev) |
| 234 | { |
| 235 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 236 | int port = sis_port_base(adev); |
| 237 | u8 t1, t2; |
| 238 | int speed = adev->pio_mode - XFER_PIO_0; |
| 239 | |
| 240 | const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 }; |
| 241 | const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 }; |
| 242 | |
| 243 | sis_set_fifo(ap, adev); |
| 244 | |
| 245 | pci_read_config_byte(pdev, port, &t1); |
| 246 | pci_read_config_byte(pdev, port + 1, &t2); |
| 247 | |
| 248 | t1 &= ~0x0F; /* Clear active/recovery timings */ |
| 249 | t2 &= ~0x07; |
| 250 | |
| 251 | t1 |= active[speed]; |
| 252 | t2 |= recovery[speed]; |
| 253 | |
| 254 | pci_write_config_byte(pdev, port, t1); |
| 255 | pci_write_config_byte(pdev, port + 1, t2); |
| 256 | } |
| 257 | |
| 258 | /** |
| 259 | * sis_100_set_pioode - Initialize host controller PATA PIO timings |
| 260 | * @ap: Port whose timings we are configuring |
| 261 | * @adev: Device we are configuring for. |
| 262 | * |
| 263 | * Set PIO mode for device, in host controller PCI config space. This |
| 264 | * function handles PIO set up for ATA100 devices and early ATA133. |
| 265 | * |
| 266 | * LOCKING: |
| 267 | * None (inherited from caller). |
| 268 | */ |
| 269 | |
| 270 | static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev) |
| 271 | { |
| 272 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 273 | int port = sis_port_base(adev); |
| 274 | int speed = adev->pio_mode - XFER_PIO_0; |
| 275 | |
| 276 | const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 }; |
| 277 | |
| 278 | sis_set_fifo(ap, adev); |
| 279 | |
| 280 | pci_write_config_byte(pdev, port, actrec[speed]); |
| 281 | } |
| 282 | |
| 283 | /** |
| 284 | * sis_133_set_pioode - Initialize host controller PATA PIO timings |
| 285 | * @ap: Port whose timings we are configuring |
| 286 | * @adev: Device we are configuring for. |
| 287 | * |
| 288 | * Set PIO mode for device, in host controller PCI config space. This |
| 289 | * function handles PIO set up for the later ATA133 devices. |
| 290 | * |
| 291 | * LOCKING: |
| 292 | * None (inherited from caller). |
| 293 | */ |
| 294 | |
| 295 | static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev) |
| 296 | { |
| 297 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 298 | int port = 0x40; |
| 299 | u32 t1; |
| 300 | u32 reg54; |
| 301 | int speed = adev->pio_mode - XFER_PIO_0; |
| 302 | |
| 303 | const u32 timing133[] = { |
| 304 | 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */ |
| 305 | 0x0C266000, |
| 306 | 0x04263000, |
| 307 | 0x0C0A3000, |
| 308 | 0x05093000 |
| 309 | }; |
| 310 | const u32 timing100[] = { |
| 311 | 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */ |
| 312 | 0x091C4000, |
| 313 | 0x031C2000, |
| 314 | 0x09072000, |
| 315 | 0x04062000 |
| 316 | }; |
| 317 | |
| 318 | sis_set_fifo(ap, adev); |
| 319 | |
| 320 | /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ |
| 321 | pci_read_config_dword(pdev, 0x54, ®54); |
| 322 | if (reg54 & 0x40000000) |
| 323 | port = 0x70; |
| 324 | port += 8 * ap->port_no + 4 * adev->devno; |
| 325 | |
| 326 | pci_read_config_dword(pdev, port, &t1); |
| 327 | t1 &= 0xC0C00FFF; /* Mask out timing */ |
| 328 | |
| 329 | if (t1 & 0x08) /* 100 or 133 ? */ |
| 330 | t1 |= timing133[speed]; |
| 331 | else |
| 332 | t1 |= timing100[speed]; |
| 333 | pci_write_config_byte(pdev, port, t1); |
| 334 | } |
| 335 | |
| 336 | /** |
| 337 | * sis_old_set_dmamode - Initialize host controller PATA DMA timings |
| 338 | * @ap: Port whose timings we are configuring |
| 339 | * @adev: Device to program |
| 340 | * |
| 341 | * Set UDMA/MWDMA mode for device, in host controller PCI config space. |
| 342 | * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike |
| 343 | * the old ide/pci driver. |
| 344 | * |
| 345 | * LOCKING: |
| 346 | * None (inherited from caller). |
| 347 | */ |
| 348 | |
| 349 | static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 350 | { |
| 351 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 352 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 353 | int drive_pci = sis_port_base(adev); |
| 354 | u16 timing; |
| 355 | |
| 356 | const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; |
| 357 | const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; |
| 358 | |
| 359 | pci_read_config_word(pdev, drive_pci, &timing); |
| 360 | |
| 361 | if (adev->dma_mode < XFER_UDMA_0) { |
| 362 | /* bits 3-0 hold recovery timing bits 8-10 active timing and |
| 363 | the higer bits are dependant on the device */ |
| 364 | timing &= ~ 0x870F; |
| 365 | timing |= mwdma_bits[speed]; |
| 366 | pci_write_config_word(pdev, drive_pci, timing); |
| 367 | } else { |
| 368 | /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ |
| 369 | speed = adev->dma_mode - XFER_UDMA_0; |
| 370 | timing &= ~0x6000; |
| 371 | timing |= udma_bits[speed]; |
| 372 | } |
| 373 | } |
| 374 | |
| 375 | /** |
| 376 | * sis_66_set_dmamode - Initialize host controller PATA DMA timings |
| 377 | * @ap: Port whose timings we are configuring |
| 378 | * @adev: Device to program |
| 379 | * |
| 380 | * Set UDMA/MWDMA mode for device, in host controller PCI config space. |
| 381 | * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike |
| 382 | * the old ide/pci driver. |
| 383 | * |
| 384 | * LOCKING: |
| 385 | * None (inherited from caller). |
| 386 | */ |
| 387 | |
| 388 | static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 389 | { |
| 390 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 391 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 392 | int drive_pci = sis_port_base(adev); |
| 393 | u16 timing; |
| 394 | |
| 395 | const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; |
| 396 | const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; |
| 397 | |
| 398 | pci_read_config_word(pdev, drive_pci, &timing); |
| 399 | |
| 400 | if (adev->dma_mode < XFER_UDMA_0) { |
| 401 | /* bits 3-0 hold recovery timing bits 8-10 active timing and |
| 402 | the higer bits are dependant on the device, bit 15 udma */ |
| 403 | timing &= ~ 0x870F; |
| 404 | timing |= mwdma_bits[speed]; |
| 405 | } else { |
| 406 | /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ |
| 407 | speed = adev->dma_mode - XFER_UDMA_0; |
| 408 | timing &= ~0x6000; |
| 409 | timing |= udma_bits[speed]; |
| 410 | } |
| 411 | pci_write_config_word(pdev, drive_pci, timing); |
| 412 | } |
| 413 | |
| 414 | /** |
| 415 | * sis_100_set_dmamode - Initialize host controller PATA DMA timings |
| 416 | * @ap: Port whose timings we are configuring |
| 417 | * @adev: Device to program |
| 418 | * |
| 419 | * Set UDMA/MWDMA mode for device, in host controller PCI config space. |
| 420 | * Handles UDMA66 and early UDMA100 devices. |
| 421 | * |
| 422 | * LOCKING: |
| 423 | * None (inherited from caller). |
| 424 | */ |
| 425 | |
| 426 | static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 427 | { |
| 428 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 429 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 430 | int drive_pci = sis_port_base(adev); |
| 431 | u16 timing; |
| 432 | |
| 433 | const u16 udma_bits[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; |
| 434 | |
| 435 | pci_read_config_word(pdev, drive_pci, &timing); |
| 436 | |
| 437 | if (adev->dma_mode < XFER_UDMA_0) { |
| 438 | /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ |
| 439 | } else { |
| 440 | /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ |
| 441 | speed = adev->dma_mode - XFER_UDMA_0; |
| 442 | timing &= ~0x0F00; |
| 443 | timing |= udma_bits[speed]; |
| 444 | } |
| 445 | pci_write_config_word(pdev, drive_pci, timing); |
| 446 | } |
| 447 | |
| 448 | /** |
| 449 | * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings |
| 450 | * @ap: Port whose timings we are configuring |
| 451 | * @adev: Device to program |
| 452 | * |
| 453 | * Set UDMA/MWDMA mode for device, in host controller PCI config space. |
| 454 | * Handles early SiS 961 bridges. Supports MWDMA as well unlike |
| 455 | * the old ide/pci driver. |
| 456 | * |
| 457 | * LOCKING: |
| 458 | * None (inherited from caller). |
| 459 | */ |
| 460 | |
| 461 | static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 462 | { |
| 463 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 464 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 465 | int drive_pci = sis_port_base(adev); |
| 466 | u16 timing; |
| 467 | |
| 468 | const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100}; |
| 469 | |
| 470 | pci_read_config_word(pdev, drive_pci, &timing); |
| 471 | |
| 472 | if (adev->dma_mode < XFER_UDMA_0) { |
| 473 | /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */ |
| 474 | } else { |
| 475 | /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */ |
| 476 | speed = adev->dma_mode - XFER_UDMA_0; |
| 477 | timing &= ~0x0F00; |
| 478 | timing |= udma_bits[speed]; |
| 479 | } |
| 480 | pci_write_config_word(pdev, drive_pci, timing); |
| 481 | } |
| 482 | |
| 483 | /** |
| 484 | * sis_133_set_dmamode - Initialize host controller PATA DMA timings |
| 485 | * @ap: Port whose timings we are configuring |
| 486 | * @adev: Device to program |
| 487 | * |
| 488 | * Set UDMA/MWDMA mode for device, in host controller PCI config space. |
| 489 | * Handles early SiS 961 bridges. Supports MWDMA as well unlike |
| 490 | * the old ide/pci driver. |
| 491 | * |
| 492 | * LOCKING: |
| 493 | * None (inherited from caller). |
| 494 | */ |
| 495 | |
| 496 | static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 497 | { |
| 498 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 499 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 500 | int port = 0x40; |
| 501 | u32 t1; |
| 502 | u32 reg54; |
| 503 | |
| 504 | /* bits 4- cycle time 8 - cvs time */ |
| 505 | const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 }; |
| 506 | const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 }; |
| 507 | |
| 508 | /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */ |
| 509 | pci_read_config_dword(pdev, 0x54, ®54); |
| 510 | if (reg54 & 0x40000000) |
| 511 | port = 0x70; |
| 512 | port += (8 * ap->port_no) + (4 * adev->devno); |
| 513 | |
| 514 | pci_read_config_dword(pdev, port, &t1); |
| 515 | |
| 516 | if (adev->dma_mode < XFER_UDMA_0) { |
| 517 | t1 &= ~0x00000004; |
| 518 | /* FIXME: need data sheet to add MWDMA here. Also lacking on |
| 519 | ide/pci driver */ |
| 520 | } else { |
| 521 | speed = adev->dma_mode - XFER_UDMA_0; |
| 522 | /* if & 8 no UDMA133 - need info for ... */ |
| 523 | t1 &= ~0x00000FF0; |
| 524 | t1 |= 0x00000004; |
| 525 | if (t1 & 0x08) |
| 526 | t1 |= timing_u133[speed]; |
| 527 | else |
| 528 | t1 |= timing_u100[speed]; |
| 529 | } |
| 530 | pci_write_config_dword(pdev, port, t1); |
| 531 | } |
| 532 | |
| 533 | static struct scsi_host_template sis_sht = { |
| 534 | .module = THIS_MODULE, |
| 535 | .name = DRV_NAME, |
| 536 | .ioctl = ata_scsi_ioctl, |
| 537 | .queuecommand = ata_scsi_queuecmd, |
| 538 | .can_queue = ATA_DEF_QUEUE, |
| 539 | .this_id = ATA_SHT_THIS_ID, |
| 540 | .sg_tablesize = LIBATA_MAX_PRD, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 541 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 542 | .emulated = ATA_SHT_EMULATED, |
| 543 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 544 | .proc_name = DRV_NAME, |
| 545 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 546 | .slave_configure = ata_scsi_slave_config, |
Tejun Heo | afdfe89 | 2006-11-29 11:26:47 +0900 | [diff] [blame] | 547 | .slave_destroy = ata_scsi_slave_destroy, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 548 | .bios_param = ata_std_bios_param, |
Alan | 62d64ae | 2006-11-27 16:27:20 +0000 | [diff] [blame] | 549 | .resume = ata_scsi_device_resume, |
| 550 | .suspend = ata_scsi_device_suspend, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 551 | }; |
| 552 | |
| 553 | static const struct ata_port_operations sis_133_ops = { |
| 554 | .port_disable = ata_port_disable, |
| 555 | .set_piomode = sis_133_set_piomode, |
| 556 | .set_dmamode = sis_133_set_dmamode, |
| 557 | .mode_filter = ata_pci_default_filter, |
| 558 | |
| 559 | .tf_load = ata_tf_load, |
| 560 | .tf_read = ata_tf_read, |
| 561 | .check_status = ata_check_status, |
| 562 | .exec_command = ata_exec_command, |
| 563 | .dev_select = ata_std_dev_select, |
| 564 | |
| 565 | .freeze = ata_bmdma_freeze, |
| 566 | .thaw = ata_bmdma_thaw, |
| 567 | .error_handler = sis_133_error_handler, |
| 568 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 569 | |
| 570 | .bmdma_setup = ata_bmdma_setup, |
| 571 | .bmdma_start = ata_bmdma_start, |
| 572 | .bmdma_stop = ata_bmdma_stop, |
| 573 | .bmdma_status = ata_bmdma_status, |
| 574 | .qc_prep = ata_qc_prep, |
| 575 | .qc_issue = ata_qc_issue_prot, |
| 576 | .data_xfer = ata_pio_data_xfer, |
| 577 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 578 | .irq_handler = ata_interrupt, |
| 579 | .irq_clear = ata_bmdma_irq_clear, |
| 580 | |
| 581 | .port_start = ata_port_start, |
| 582 | .port_stop = ata_port_stop, |
| 583 | .host_stop = ata_host_stop, |
| 584 | }; |
| 585 | |
| 586 | static const struct ata_port_operations sis_133_early_ops = { |
| 587 | .port_disable = ata_port_disable, |
| 588 | .set_piomode = sis_100_set_piomode, |
| 589 | .set_dmamode = sis_133_early_set_dmamode, |
| 590 | .mode_filter = ata_pci_default_filter, |
| 591 | |
| 592 | .tf_load = ata_tf_load, |
| 593 | .tf_read = ata_tf_read, |
| 594 | .check_status = ata_check_status, |
| 595 | .exec_command = ata_exec_command, |
| 596 | .dev_select = ata_std_dev_select, |
| 597 | |
| 598 | .freeze = ata_bmdma_freeze, |
| 599 | .thaw = ata_bmdma_thaw, |
| 600 | .error_handler = sis_66_error_handler, |
| 601 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 602 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 603 | .bmdma_setup = ata_bmdma_setup, |
| 604 | .bmdma_start = ata_bmdma_start, |
| 605 | .bmdma_stop = ata_bmdma_stop, |
| 606 | .bmdma_status = ata_bmdma_status, |
| 607 | .qc_prep = ata_qc_prep, |
| 608 | .qc_issue = ata_qc_issue_prot, |
| 609 | .data_xfer = ata_pio_data_xfer, |
| 610 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 611 | .irq_handler = ata_interrupt, |
| 612 | .irq_clear = ata_bmdma_irq_clear, |
| 613 | |
| 614 | .port_start = ata_port_start, |
| 615 | .port_stop = ata_port_stop, |
| 616 | .host_stop = ata_host_stop, |
| 617 | }; |
| 618 | |
| 619 | static const struct ata_port_operations sis_100_ops = { |
| 620 | .port_disable = ata_port_disable, |
| 621 | .set_piomode = sis_100_set_piomode, |
| 622 | .set_dmamode = sis_100_set_dmamode, |
| 623 | .mode_filter = ata_pci_default_filter, |
| 624 | |
| 625 | .tf_load = ata_tf_load, |
| 626 | .tf_read = ata_tf_read, |
| 627 | .check_status = ata_check_status, |
| 628 | .exec_command = ata_exec_command, |
| 629 | .dev_select = ata_std_dev_select, |
| 630 | |
| 631 | .freeze = ata_bmdma_freeze, |
| 632 | .thaw = ata_bmdma_thaw, |
| 633 | .error_handler = sis_66_error_handler, |
| 634 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 635 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 636 | |
| 637 | .bmdma_setup = ata_bmdma_setup, |
| 638 | .bmdma_start = ata_bmdma_start, |
| 639 | .bmdma_stop = ata_bmdma_stop, |
| 640 | .bmdma_status = ata_bmdma_status, |
| 641 | .qc_prep = ata_qc_prep, |
| 642 | .qc_issue = ata_qc_issue_prot, |
| 643 | .data_xfer = ata_pio_data_xfer, |
| 644 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 645 | .irq_handler = ata_interrupt, |
| 646 | .irq_clear = ata_bmdma_irq_clear, |
| 647 | |
| 648 | .port_start = ata_port_start, |
| 649 | .port_stop = ata_port_stop, |
| 650 | .host_stop = ata_host_stop, |
| 651 | }; |
| 652 | |
| 653 | static const struct ata_port_operations sis_66_ops = { |
| 654 | .port_disable = ata_port_disable, |
| 655 | .set_piomode = sis_old_set_piomode, |
| 656 | .set_dmamode = sis_66_set_dmamode, |
| 657 | .mode_filter = ata_pci_default_filter, |
| 658 | |
| 659 | .tf_load = ata_tf_load, |
| 660 | .tf_read = ata_tf_read, |
| 661 | .check_status = ata_check_status, |
| 662 | .exec_command = ata_exec_command, |
| 663 | .dev_select = ata_std_dev_select, |
| 664 | |
| 665 | .freeze = ata_bmdma_freeze, |
| 666 | .thaw = ata_bmdma_thaw, |
| 667 | .error_handler = sis_66_error_handler, |
| 668 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 669 | |
| 670 | .bmdma_setup = ata_bmdma_setup, |
| 671 | .bmdma_start = ata_bmdma_start, |
| 672 | .bmdma_stop = ata_bmdma_stop, |
| 673 | .bmdma_status = ata_bmdma_status, |
| 674 | .qc_prep = ata_qc_prep, |
| 675 | .qc_issue = ata_qc_issue_prot, |
| 676 | .data_xfer = ata_pio_data_xfer, |
| 677 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 678 | .irq_handler = ata_interrupt, |
| 679 | .irq_clear = ata_bmdma_irq_clear, |
| 680 | |
| 681 | .port_start = ata_port_start, |
| 682 | .port_stop = ata_port_stop, |
| 683 | .host_stop = ata_host_stop, |
| 684 | }; |
| 685 | |
| 686 | static const struct ata_port_operations sis_old_ops = { |
| 687 | .port_disable = ata_port_disable, |
| 688 | .set_piomode = sis_old_set_piomode, |
| 689 | .set_dmamode = sis_old_set_dmamode, |
| 690 | .mode_filter = ata_pci_default_filter, |
| 691 | |
| 692 | .tf_load = ata_tf_load, |
| 693 | .tf_read = ata_tf_read, |
| 694 | .check_status = ata_check_status, |
| 695 | .exec_command = ata_exec_command, |
| 696 | .dev_select = ata_std_dev_select, |
| 697 | |
| 698 | .freeze = ata_bmdma_freeze, |
| 699 | .thaw = ata_bmdma_thaw, |
| 700 | .error_handler = sis_old_error_handler, |
| 701 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 702 | |
| 703 | .bmdma_setup = ata_bmdma_setup, |
| 704 | .bmdma_start = ata_bmdma_start, |
| 705 | .bmdma_stop = ata_bmdma_stop, |
| 706 | .bmdma_status = ata_bmdma_status, |
| 707 | .qc_prep = ata_qc_prep, |
| 708 | .qc_issue = ata_qc_issue_prot, |
| 709 | .data_xfer = ata_pio_data_xfer, |
| 710 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 711 | .irq_handler = ata_interrupt, |
| 712 | .irq_clear = ata_bmdma_irq_clear, |
| 713 | |
| 714 | .port_start = ata_port_start, |
| 715 | .port_stop = ata_port_stop, |
| 716 | .host_stop = ata_host_stop, |
| 717 | }; |
| 718 | |
| 719 | static struct ata_port_info sis_info = { |
| 720 | .sht = &sis_sht, |
| 721 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 722 | .pio_mask = 0x1f, /* pio0-4 */ |
| 723 | .mwdma_mask = 0x07, |
| 724 | .udma_mask = 0, |
| 725 | .port_ops = &sis_old_ops, |
| 726 | }; |
| 727 | static struct ata_port_info sis_info33 = { |
| 728 | .sht = &sis_sht, |
| 729 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 730 | .pio_mask = 0x1f, /* pio0-4 */ |
| 731 | .mwdma_mask = 0x07, |
| 732 | .udma_mask = ATA_UDMA2, /* UDMA 33 */ |
| 733 | .port_ops = &sis_old_ops, |
| 734 | }; |
| 735 | static struct ata_port_info sis_info66 = { |
| 736 | .sht = &sis_sht, |
| 737 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 738 | .pio_mask = 0x1f, /* pio0-4 */ |
| 739 | .udma_mask = ATA_UDMA4, /* UDMA 66 */ |
| 740 | .port_ops = &sis_66_ops, |
| 741 | }; |
| 742 | static struct ata_port_info sis_info100 = { |
| 743 | .sht = &sis_sht, |
| 744 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 745 | .pio_mask = 0x1f, /* pio0-4 */ |
| 746 | .udma_mask = ATA_UDMA5, |
| 747 | .port_ops = &sis_100_ops, |
| 748 | }; |
| 749 | static struct ata_port_info sis_info100_early = { |
| 750 | .sht = &sis_sht, |
| 751 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 752 | .udma_mask = ATA_UDMA5, |
| 753 | .pio_mask = 0x1f, /* pio0-4 */ |
| 754 | .port_ops = &sis_66_ops, |
| 755 | }; |
| 756 | static struct ata_port_info sis_info133 = { |
| 757 | .sht = &sis_sht, |
| 758 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 759 | .pio_mask = 0x1f, /* pio0-4 */ |
| 760 | .udma_mask = ATA_UDMA6, |
| 761 | .port_ops = &sis_133_ops, |
| 762 | }; |
| 763 | static struct ata_port_info sis_info133_early = { |
| 764 | .sht = &sis_sht, |
| 765 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 766 | .pio_mask = 0x1f, /* pio0-4 */ |
| 767 | .udma_mask = ATA_UDMA6, |
| 768 | .port_ops = &sis_133_early_ops, |
| 769 | }; |
| 770 | |
| 771 | |
| 772 | static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis) |
| 773 | { |
| 774 | u16 regw; |
| 775 | u8 reg; |
| 776 | |
| 777 | if (sis->info == &sis_info133) { |
| 778 | pci_read_config_word(pdev, 0x50, ®w); |
| 779 | if (regw & 0x08) |
| 780 | pci_write_config_word(pdev, 0x50, regw & ~0x08); |
| 781 | pci_read_config_word(pdev, 0x52, ®w); |
| 782 | if (regw & 0x08) |
| 783 | pci_write_config_word(pdev, 0x52, regw & ~0x08); |
| 784 | return; |
| 785 | } |
| 786 | |
| 787 | if (sis->info == &sis_info133_early || sis->info == &sis_info100) { |
| 788 | /* Fix up latency */ |
| 789 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); |
| 790 | /* Set compatibility bit */ |
| 791 | pci_read_config_byte(pdev, 0x49, ®); |
| 792 | if (!(reg & 0x01)) |
| 793 | pci_write_config_byte(pdev, 0x49, reg | 0x01); |
| 794 | return; |
| 795 | } |
| 796 | |
| 797 | if (sis->info == &sis_info66 || sis->info == &sis_info100_early) { |
| 798 | /* Fix up latency */ |
| 799 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80); |
| 800 | /* Set compatibility bit */ |
| 801 | pci_read_config_byte(pdev, 0x52, ®); |
| 802 | if (!(reg & 0x04)) |
| 803 | pci_write_config_byte(pdev, 0x52, reg | 0x04); |
| 804 | return; |
| 805 | } |
| 806 | |
| 807 | if (sis->info == &sis_info33) { |
| 808 | pci_read_config_byte(pdev, PCI_CLASS_PROG, ®); |
| 809 | if (( reg & 0x0F ) != 0x00) |
| 810 | pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0); |
| 811 | /* Fall through to ATA16 fixup below */ |
| 812 | } |
| 813 | |
| 814 | if (sis->info == &sis_info || sis->info == &sis_info33) { |
| 815 | /* force per drive recovery and active timings |
| 816 | needed on ATA_33 and below chips */ |
| 817 | pci_read_config_byte(pdev, 0x52, ®); |
| 818 | if (!(reg & 0x08)) |
| 819 | pci_write_config_byte(pdev, 0x52, reg|0x08); |
| 820 | return; |
| 821 | } |
| 822 | |
| 823 | BUG(); |
| 824 | } |
| 825 | |
| 826 | /** |
| 827 | * sis_init_one - Register SiS ATA PCI device with kernel services |
| 828 | * @pdev: PCI device to register |
| 829 | * @ent: Entry in sis_pci_tbl matching with @pdev |
| 830 | * |
| 831 | * Called from kernel PCI layer. We probe for combined mode (sigh), |
| 832 | * and then hand over control to libata, for it to do the rest. |
| 833 | * |
| 834 | * LOCKING: |
| 835 | * Inherited from PCI layer (may sleep). |
| 836 | * |
| 837 | * RETURNS: |
| 838 | * Zero on success, or -ERRNO value. |
| 839 | */ |
| 840 | |
| 841 | static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
| 842 | { |
| 843 | static int printed_version; |
| 844 | static struct ata_port_info *port_info[2]; |
| 845 | struct ata_port_info *port; |
| 846 | struct pci_dev *host = NULL; |
| 847 | struct sis_chipset *chipset = NULL; |
| 848 | |
| 849 | static struct sis_chipset sis_chipsets[] = { |
Alan Cox | af323a2 | 2006-09-12 17:15:12 +0100 | [diff] [blame] | 850 | |
| 851 | { 0x0968, &sis_info133 }, |
| 852 | { 0x0966, &sis_info133 }, |
| 853 | { 0x0965, &sis_info133 }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 854 | { 0x0745, &sis_info100 }, |
| 855 | { 0x0735, &sis_info100 }, |
| 856 | { 0x0733, &sis_info100 }, |
| 857 | { 0x0635, &sis_info100 }, |
| 858 | { 0x0633, &sis_info100 }, |
| 859 | |
| 860 | { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */ |
| 861 | { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */ |
| 862 | |
| 863 | { 0x0640, &sis_info66 }, |
| 864 | { 0x0630, &sis_info66 }, |
| 865 | { 0x0620, &sis_info66 }, |
| 866 | { 0x0540, &sis_info66 }, |
| 867 | { 0x0530, &sis_info66 }, |
| 868 | |
| 869 | { 0x5600, &sis_info33 }, |
| 870 | { 0x5598, &sis_info33 }, |
| 871 | { 0x5597, &sis_info33 }, |
| 872 | { 0x5591, &sis_info33 }, |
| 873 | { 0x5582, &sis_info33 }, |
| 874 | { 0x5581, &sis_info33 }, |
| 875 | |
| 876 | { 0x5596, &sis_info }, |
| 877 | { 0x5571, &sis_info }, |
| 878 | { 0x5517, &sis_info }, |
| 879 | { 0x5511, &sis_info }, |
| 880 | |
| 881 | {0} |
| 882 | }; |
| 883 | static struct sis_chipset sis133_early = { |
| 884 | 0x0, &sis_info133_early |
| 885 | }; |
| 886 | static struct sis_chipset sis133 = { |
| 887 | 0x0, &sis_info133 |
| 888 | }; |
| 889 | static struct sis_chipset sis100_early = { |
| 890 | 0x0, &sis_info100_early |
| 891 | }; |
| 892 | static struct sis_chipset sis100 = { |
| 893 | 0x0, &sis_info100 |
| 894 | }; |
| 895 | |
| 896 | if (!printed_version++) |
| 897 | dev_printk(KERN_DEBUG, &pdev->dev, |
| 898 | "version " DRV_VERSION "\n"); |
| 899 | |
| 900 | /* We have to find the bridge first */ |
| 901 | |
| 902 | for (chipset = &sis_chipsets[0]; chipset->device; chipset++) { |
| 903 | host = pci_get_device(PCI_VENDOR_ID_SI, chipset->device, NULL); |
| 904 | if (host != NULL) { |
| 905 | if (chipset->device == 0x630) { /* SIS630 */ |
| 906 | u8 host_rev; |
| 907 | pci_read_config_byte(host, PCI_REVISION_ID, &host_rev); |
| 908 | if (host_rev >= 0x30) /* 630 ET */ |
| 909 | chipset = &sis100_early; |
| 910 | } |
| 911 | break; |
| 912 | } |
| 913 | } |
| 914 | |
| 915 | /* Look for concealed bridges */ |
| 916 | if (host == NULL) { |
| 917 | /* Second check */ |
| 918 | u32 idemisc; |
| 919 | u16 trueid; |
| 920 | |
| 921 | /* Disable ID masking and register remapping then |
| 922 | see what the real ID is */ |
| 923 | |
| 924 | pci_read_config_dword(pdev, 0x54, &idemisc); |
| 925 | pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff); |
| 926 | pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); |
| 927 | pci_write_config_dword(pdev, 0x54, idemisc); |
| 928 | |
| 929 | switch(trueid) { |
| 930 | case 0x5518: /* SIS 962/963 */ |
| 931 | chipset = &sis133; |
| 932 | if ((idemisc & 0x40000000) == 0) { |
| 933 | pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000); |
| 934 | printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n"); |
| 935 | } |
| 936 | break; |
| 937 | case 0x0180: /* SIS 965/965L */ |
| 938 | chipset = &sis133; |
| 939 | break; |
| 940 | case 0x1180: /* SIS 966/966L */ |
| 941 | chipset = &sis133; |
| 942 | break; |
| 943 | } |
| 944 | } |
| 945 | |
| 946 | /* Further check */ |
| 947 | if (chipset == NULL) { |
| 948 | struct pci_dev *lpc_bridge; |
| 949 | u16 trueid; |
| 950 | u8 prefctl; |
| 951 | u8 idecfg; |
| 952 | u8 sbrev; |
| 953 | |
| 954 | /* Try the second unmasking technique */ |
| 955 | pci_read_config_byte(pdev, 0x4a, &idecfg); |
| 956 | pci_write_config_byte(pdev, 0x4a, idecfg | 0x10); |
| 957 | pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid); |
| 958 | pci_write_config_byte(pdev, 0x4a, idecfg); |
| 959 | |
| 960 | switch(trueid) { |
| 961 | case 0x5517: |
| 962 | lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */ |
| 963 | if (lpc_bridge == NULL) |
| 964 | break; |
| 965 | pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); |
| 966 | pci_read_config_byte(pdev, 0x49, &prefctl); |
| 967 | pci_dev_put(lpc_bridge); |
| 968 | |
| 969 | if (sbrev == 0x10 && (prefctl & 0x80)) { |
| 970 | chipset = &sis133_early; |
| 971 | break; |
| 972 | } |
| 973 | chipset = &sis100; |
| 974 | break; |
| 975 | } |
| 976 | } |
| 977 | pci_dev_put(host); |
| 978 | |
| 979 | /* No chipset info, no support */ |
| 980 | if (chipset == NULL) |
| 981 | return -ENODEV; |
| 982 | |
| 983 | port = chipset->info; |
| 984 | port->private_data = chipset; |
| 985 | |
| 986 | sis_fixup(pdev, chipset); |
| 987 | |
| 988 | port_info[0] = port_info[1] = port; |
| 989 | return ata_pci_init_one(pdev, port_info, 2); |
| 990 | } |
| 991 | |
| 992 | static const struct pci_device_id sis_pci_tbl[] = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 993 | { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */ |
| 994 | { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */ |
| 995 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 996 | { } |
| 997 | }; |
| 998 | |
| 999 | static struct pci_driver sis_pci_driver = { |
| 1000 | .name = DRV_NAME, |
| 1001 | .id_table = sis_pci_tbl, |
| 1002 | .probe = sis_init_one, |
| 1003 | .remove = ata_pci_remove_one, |
Alan | 62d64ae | 2006-11-27 16:27:20 +0000 | [diff] [blame] | 1004 | .suspend = ata_pci_device_suspend, |
| 1005 | .resume = ata_pci_device_resume, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1006 | }; |
| 1007 | |
| 1008 | static int __init sis_init(void) |
| 1009 | { |
| 1010 | return pci_register_driver(&sis_pci_driver); |
| 1011 | } |
| 1012 | |
| 1013 | static void __exit sis_exit(void) |
| 1014 | { |
| 1015 | pci_unregister_driver(&sis_pci_driver); |
| 1016 | } |
| 1017 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1018 | module_init(sis_init); |
| 1019 | module_exit(sis_exit); |
| 1020 | |
| 1021 | MODULE_AUTHOR("Alan Cox"); |
| 1022 | MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA"); |
| 1023 | MODULE_LICENSE("GPL"); |
| 1024 | MODULE_DEVICE_TABLE(pci, sis_pci_tbl); |
| 1025 | MODULE_VERSION(DRV_VERSION); |
| 1026 | |