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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003/*
4 * Convention:
Paul Mundt14866542008-10-04 05:25:52 +09005 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * while in{b,w,l}/out{b,w,l} are for ISA
Paul Mundt14866542008-10-04 05:25:52 +09007 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
9 * and 'string' versions: ins{b,w,l}/outs{b,w,l}
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
Paul Mundt14866542008-10-04 05:25:52 +090011 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
12 * automatically, there are also __raw versions, which do not.
13 *
14 * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
15 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
16 * these have the same semantics as the __raw variants, and as such, all
17 * new code should be using the __raw versions.
18 *
19 * All ISA I/O routines are wrapped through the machine vector. If a
20 * board does not provide overrides, a generic set that are copied in
21 * from the default machine vector are used instead. These are largely
22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days.
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/cache.h>
26#include <asm/system.h>
27#include <asm/addrspace.h>
28#include <asm/machvec.h>
Paul Mundtb66c1a32006-01-16 22:14:15 -080029#include <asm/pgtable.h>
30#include <asm-generic/iomap.h>
31
32#ifdef __KERNEL__
Linus Torvalds1da177e2005-04-16 15:20:36 -070033/*
34 * Depending on which platform we are running on, we need different
35 * I/O functions.
36 */
Paul Mundtb66c1a32006-01-16 22:14:15 -080037#define __IO_PREFIX generic
38#include <asm/io_generic.h>
Magnus Damme7cc9a72008-02-07 20:18:21 +090039#include <asm/io_trapped.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
Paul Mundt14866542008-10-04 05:25:52 +090041#define inb(p) sh_mv.mv_inb((p))
42#define inw(p) sh_mv.mv_inw((p))
43#define inl(p) sh_mv.mv_inl((p))
44#define outb(x,p) sh_mv.mv_outb((x),(p))
45#define outw(x,p) sh_mv.mv_outw((x),(p))
46#define outl(x,p) sh_mv.mv_outl((x),(p))
Paul Mundtb66c1a32006-01-16 22:14:15 -080047
Paul Mundt14866542008-10-04 05:25:52 +090048#define inb_p(p) sh_mv.mv_inb_p((p))
49#define inw_p(p) sh_mv.mv_inw_p((p))
50#define inl_p(p) sh_mv.mv_inl_p((p))
51#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
52#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
53#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Paul Mundt14866542008-10-04 05:25:52 +090055#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
56#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
57#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
58#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
59#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
60#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
Paul Mundt14866542008-10-04 05:25:52 +090062#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
63#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
64#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
65#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
Linus Torvalds1da177e2005-04-16 15:20:36 -070066
Paul Mundt14866542008-10-04 05:25:52 +090067#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
68#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
69#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
70#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
Paul Mundt14866542008-10-04 05:25:52 +090072#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; })
73#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; })
74#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; })
75#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; })
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
Paul Mundt14866542008-10-04 05:25:52 +090077#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
78#define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
Paul Mundt14866542008-10-04 05:25:52 +090082/* SuperH on-chip I/O functions */
83#define ctrl_inb __raw_readb
84#define ctrl_inw __raw_readw
85#define ctrl_inl __raw_readl
86#define ctrl_inq __raw_readq
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
Paul Mundt14866542008-10-04 05:25:52 +090088#define ctrl_outb __raw_writeb
89#define ctrl_outw __raw_writew
90#define ctrl_outl __raw_writel
91#define ctrl_outq __raw_writeq
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
Paul Mundt14866542008-10-04 05:25:52 +090093static inline void ctrl_delay(void)
94{
95#ifdef P2SEG
96 __raw_readw(P2SEG);
97#endif
98}
Linus Torvalds1da177e2005-04-16 15:20:36 -070099
Magnus Dammda6b0032007-09-10 12:08:42 +0900100#define __BUILD_MEMORY_STRING(bwlq, type) \
101 \
Paul Mundt64c96272008-10-01 15:12:27 +0900102static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
Magnus Dammda6b0032007-09-10 12:08:42 +0900103 const void *addr, unsigned int count) \
104{ \
105 const volatile type *__addr = addr; \
106 \
107 while (count--) { \
108 __raw_write##bwlq(*__addr, mem); \
109 __addr++; \
110 } \
111} \
112 \
Paul Mundt64c96272008-10-01 15:12:27 +0900113static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
114 void *addr, unsigned int count) \
Magnus Dammda6b0032007-09-10 12:08:42 +0900115{ \
116 volatile type *__addr = addr; \
117 \
118 while (count--) { \
119 *__addr = __raw_read##bwlq(mem); \
120 __addr++; \
121 } \
122}
123
124__BUILD_MEMORY_STRING(b, u8)
125__BUILD_MEMORY_STRING(w, u16)
Paul Mundt14866542008-10-04 05:25:52 +0900126__BUILD_MEMORY_STRING(q, u64)
Paul Mundt64c96272008-10-01 15:12:27 +0900127
Paul Mundt14866542008-10-04 05:25:52 +0900128void __raw_writesl(void __iomem *addr, const void *data, int longlen);
129void __raw_readsl(const void __iomem *addr, void *data, int longlen);
Paul Mundt64c96272008-10-01 15:12:27 +0900130
Paul Mundt14866542008-10-04 05:25:52 +0900131#define writesb __raw_writesb
132#define writesw __raw_writesw
133#define writesl __raw_writesl
Paul Mundt05ae9152006-09-27 18:25:24 +0900134
Paul Mundt14866542008-10-04 05:25:52 +0900135#define readsb __raw_readsb
136#define readsw __raw_readsw
137#define readsl __raw_readsl
138
139#define readb_relaxed(a) readb(a)
140#define readw_relaxed(a) readw(a)
141#define readl_relaxed(a) readl(a)
142#define readq_relaxed(a) readq(a)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143
Paul Mundtb66c1a32006-01-16 22:14:15 -0800144/* Simple MMIO */
Paul Mundt64c96272008-10-01 15:12:27 +0900145#define ioread8(a) __raw_readb(a)
146#define ioread16(a) __raw_readw(a)
Paul Mundtb66c1a32006-01-16 22:14:15 -0800147#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
Paul Mundt64c96272008-10-01 15:12:27 +0900148#define ioread32(a) __raw_readl(a)
Paul Mundtb66c1a32006-01-16 22:14:15 -0800149#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
Paul Mundt64c96272008-10-01 15:12:27 +0900151#define iowrite8(v,a) __raw_writeb((v),(a))
152#define iowrite16(v,a) __raw_writew((v),(a))
Paul Mundtb66c1a32006-01-16 22:14:15 -0800153#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
Paul Mundt64c96272008-10-01 15:12:27 +0900154#define iowrite32(v,a) __raw_writel((v),(a))
Paul Mundtb66c1a32006-01-16 22:14:15 -0800155#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
156
Paul Mundt64c96272008-10-01 15:12:27 +0900157#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
158#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
159#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
Paul Mundtb66c1a32006-01-16 22:14:15 -0800160
Paul Mundt64c96272008-10-01 15:12:27 +0900161#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
162#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
163#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
Paul Mundtb66c1a32006-01-16 22:14:15 -0800164
Paul Mundt14866542008-10-04 05:25:52 +0900165/* synco on SH-4A, otherwise a nop */
166#define mmiowb() wmb()
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167
Paul Mundt0f2c15c2007-11-21 18:06:34 +0900168#define IO_SPACE_LIMIT 0xffffffff
169
Paul Mundtfa439722008-09-04 18:53:58 +0900170extern unsigned long generic_io_base;
171
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172/*
Paul Mundt14866542008-10-04 05:25:52 +0900173 * This function provides a method for the generic case where a
174 * board-specific ioport_map simply needs to return the port + some
175 * arbitrary port base.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 *
177 * We use this at board setup time to implicitly set the port base, and
Paul Mundtb66c1a32006-01-16 22:14:15 -0800178 * as a result, we can use the generic ioport_map.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 */
180static inline void __set_io_port_base(unsigned long pbase)
181{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 generic_io_base = pbase;
183}
184
Magnus Damme7cc9a72008-02-07 20:18:21 +0900185#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187/* We really want to try and get these to memcpy etc */
Paul Mundt14866542008-10-04 05:25:52 +0900188void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
189void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
190void memset_io(volatile void __iomem *, int, unsigned long);
Paul Mundt959f85f2006-09-27 16:43:28 +0900191
Paul Mundtac490a42007-11-20 18:26:28 +0900192/* Quad-word real-mode I/O, don't ask.. */
193unsigned long long peek_real_address_q(unsigned long long addr);
194unsigned long long poke_real_address_q(unsigned long long addr,
195 unsigned long long val);
196
Paul Mundtda06b8d2007-11-09 12:58:12 +0900197#if !defined(CONFIG_MMU)
198#define virt_to_phys(address) ((unsigned long)(address))
199#define phys_to_virt(address) ((void *)(address))
Stuart Menefyd02b08f2007-11-30 17:52:53 +0900200#else
Paul Mundtda06b8d2007-11-09 12:58:12 +0900201#define virt_to_phys(address) (__pa(address))
202#define phys_to_virt(address) (__va(address))
Yoshinori Satoa2d1a5f2006-09-27 17:25:07 +0900203#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204
Linus Torvalds1da177e2005-04-16 15:20:36 -0700205/*
Paul Mundtda06b8d2007-11-09 12:58:12 +0900206 * On 32-bit SH, we traditionally have the whole physical address space
207 * mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do
208 * not need to do anything but place the address in the proper segment.
209 * This is true for P1 and P2 addresses, as well as some P3 ones.
210 * However, most of the P3 addresses and newer cores using extended
211 * addressing need to map through page tables, so the ioremap()
212 * implementation becomes a bit more complicated.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 *
Paul Mundtda06b8d2007-11-09 12:58:12 +0900214 * See arch/sh/mm/ioremap.c for additional notes on this.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 *
216 * We cheat a bit and always return uncachable areas until we've fixed
Paul Mundtb66c1a32006-01-16 22:14:15 -0800217 * the drivers to handle caching properly.
Paul Mundtda06b8d2007-11-09 12:58:12 +0900218 *
219 * On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply
220 * doesn't exist, so everything must go through page tables.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221 */
Paul Mundtb66c1a32006-01-16 22:14:15 -0800222#ifdef CONFIG_MMU
223void __iomem *__ioremap(unsigned long offset, unsigned long size,
224 unsigned long flags);
225void __iounmap(void __iomem *addr);
Paul Mundtccd80582008-04-25 12:58:40 +0900226
227/* arch/sh/mm/ioremap_64.c */
228unsigned long onchip_remap(unsigned long addr, unsigned long size,
229 const char *name);
230extern void onchip_unmap(unsigned long vaddr);
Paul Mundtb66c1a32006-01-16 22:14:15 -0800231#else
232#define __ioremap(offset, size, flags) ((void __iomem *)(offset))
233#define __iounmap(addr) do { } while (0)
Paul Mundtccd80582008-04-25 12:58:40 +0900234#define onchip_remap(addr, size, name) (addr)
235#define onchip_unmap(addr) do { } while (0)
Paul Mundtb66c1a32006-01-16 22:14:15 -0800236#endif /* CONFIG_MMU */
237
238static inline void __iomem *
239__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240{
Paul Mundtda06b8d2007-11-09 12:58:12 +0900241#ifdef CONFIG_SUPERH32
Paul Mundtb66c1a32006-01-16 22:14:15 -0800242 unsigned long last_addr = offset + size - 1;
Magnus Damme7cc9a72008-02-07 20:18:21 +0900243#endif
244 void __iomem *ret;
Paul Mundtb66c1a32006-01-16 22:14:15 -0800245
Magnus Damme7cc9a72008-02-07 20:18:21 +0900246 ret = __ioremap_trapped(offset, size);
247 if (ret)
248 return ret;
249
250#ifdef CONFIG_SUPERH32
Paul Mundtb66c1a32006-01-16 22:14:15 -0800251 /*
252 * For P1 and P2 space this is trivial, as everything is already
253 * mapped. Uncached access for P1 addresses are done through P2.
254 * In the P3 case or for addresses outside of the 29-bit space,
255 * mapping must be done by the PMB or by using page tables.
256 */
257 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
258 if (unlikely(flags & _PAGE_CACHABLE))
259 return (void __iomem *)P1SEGADDR(offset);
260
261 return (void __iomem *)P2SEGADDR(offset);
262 }
Paul Mundtda06b8d2007-11-09 12:58:12 +0900263#endif
Paul Mundtb66c1a32006-01-16 22:14:15 -0800264
265 return __ioremap(offset, size, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266}
267
Paul Mundtb66c1a32006-01-16 22:14:15 -0800268#define ioremap(offset, size) \
269 __ioremap_mode((offset), (size), 0)
270#define ioremap_nocache(offset, size) \
271 __ioremap_mode((offset), (size), 0)
272#define ioremap_cache(offset, size) \
273 __ioremap_mode((offset), (size), _PAGE_CACHABLE)
274#define p3_ioremap(offset, size, flags) \
275 __ioremap((offset), (size), (flags))
Paul Mundtcb700aa2008-09-12 20:41:05 +0900276#define ioremap_prot(offset, size, flags) \
277 __ioremap_mode((offset), (size), (flags))
Paul Mundtb66c1a32006-01-16 22:14:15 -0800278#define iounmap(addr) \
279 __iounmap((addr))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280
Paul Mundt14866542008-10-04 05:25:52 +0900281#define maybebadio(port) \
282 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
283 __func__, __LINE__, (port), (u32)__builtin_return_address(0))
284
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
287 * access
288 */
289#define xlate_dev_mem_ptr(p) __va(p)
290
291/*
292 * Convert a virtual cached pointer to an uncached pointer
293 */
294#define xlate_dev_kmem_ptr(p) p
295
296#endif /* __KERNEL__ */
297
298#endif /* __ASM_SH_IO_H */