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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_sis.c - Silicon Integrated Systems SATA
3 *
4 * Maintained by: Uwe Koziolek
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2004 Uwe Koziolek
9 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040011 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 *
26 * libata documentation is available via 'make {ps|pdf}docs',
27 * as Documentation/DocBook/libata.*
28 *
29 * Hardware documentation available under NDA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 *
31 */
32
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/kernel.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/init.h>
37#include <linux/blkdev.h>
38#include <linux/delay.h>
39#include <linux/interrupt.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050040#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#include <scsi/scsi_host.h>
42#include <linux/libata.h>
Alan4bb64fb2007-02-16 01:40:04 -080043#include "sis.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070044
45#define DRV_NAME "sata_sis"
Jeff Garzik2a3103c2007-08-31 04:54:06 -040046#define DRV_VERSION "1.0"
Linus Torvalds1da177e2005-04-16 15:20:36 -070047
48enum {
49 sis_180 = 0,
50 SIS_SCR_PCI_BAR = 5,
51
52 /* PCI configuration registers */
53 SIS_GENCTL = 0x54, /* IDE General Control register */
54 SIS_SCR_BASE = 0xc0, /* sata0 phy SCR registers */
Arnaud Patardf2c853b2005-09-07 22:44:48 +020055 SIS180_SATA1_OFS = 0x10, /* offset from sata0->sata1 phy regs */
56 SIS182_SATA1_OFS = 0x20, /* offset from sata0->sata1 phy regs */
57 SIS_PMR = 0x90, /* port mapping register */
Jeff Garzik8add7882005-09-08 23:07:29 -040058 SIS_PMR_COMBINED = 0x30,
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
60 /* random bits */
61 SIS_FLAG_CFGSCR = (1 << 30), /* host flag: SCRs via PCI cfg */
62
63 GENCTL_IOMAPPED_SCR = (1 << 26), /* if set, SCRs are in IO space */
64};
65
Jeff Garzik5796d1c2007-10-26 00:03:37 -040066static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
Tejun Heo82ef04f2008-07-31 17:02:40 +090067static int sis_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
68static int sis_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Jeff Garzik3b7d6972005-11-10 11:04:11 -050070static const struct pci_device_id sis_pci_tbl[] = {
Jeff Garzik5796d1c2007-10-26 00:03:37 -040071 { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */
72 { PCI_VDEVICE(SI, 0x0181), sis_180 }, /* SiS 964/180 */
73 { PCI_VDEVICE(SI, 0x0182), sis_180 }, /* SiS 965/965L */
74 { PCI_VDEVICE(SI, 0x0183), sis_180 }, /* SiS 965/965L */
75 { PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/680 */
76 { PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L/968/680 */
Jeff Garzik2d2744f2006-09-28 20:21:59 -040077
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 { } /* terminate list */
79};
80
Linus Torvalds1da177e2005-04-16 15:20:36 -070081static struct pci_driver sis_pci_driver = {
82 .name = DRV_NAME,
83 .id_table = sis_pci_tbl,
84 .probe = sis_init_one,
85 .remove = ata_pci_remove_one,
86};
87
Jeff Garzik193515d2005-11-07 00:59:37 -050088static struct scsi_host_template sis_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +090089 ATA_BMDMA_SHT(DRV_NAME),
Linus Torvalds1da177e2005-04-16 15:20:36 -070090};
91
Tejun Heo029cfd62008-03-25 12:22:49 +090092static struct ata_port_operations sis_ops = {
93 .inherits = &ata_bmdma_port_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 .scr_read = sis_scr_read,
95 .scr_write = sis_scr_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -070096};
97
Tejun Heo1626aeb2007-05-04 12:43:58 +020098static const struct ata_port_info sis_port_info = {
Jeff Garzikcca39742006-08-24 03:19:22 -040099 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100100 .pio_mask = ATA_PIO4,
101 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400102 .udma_mask = ATA_UDMA6,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 .port_ops = &sis_ops,
104};
105
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106MODULE_AUTHOR("Uwe Koziolek");
107MODULE_DESCRIPTION("low-level driver for Silicon Integratad Systems SATA controller");
108MODULE_LICENSE("GPL");
109MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
110MODULE_VERSION(DRV_VERSION);
111
Alan9b14dec2007-01-08 16:11:07 +0000112static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113{
Alan9b14dec2007-01-08 16:11:07 +0000114 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 unsigned int addr = SIS_SCR_BASE + (4 * sc_reg);
Alan9b14dec2007-01-08 16:11:07 +0000116 u8 pmr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117
Alan9b14dec2007-01-08 16:11:07 +0000118 if (ap->port_no) {
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100119 switch (pdev->device) {
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400120 case 0x0180:
121 case 0x0181:
122 pci_read_config_byte(pdev, SIS_PMR, &pmr);
123 if ((pmr & SIS_PMR_COMBINED) == 0)
124 addr += SIS180_SATA1_OFS;
125 break;
Jeff Garzik8add7882005-09-08 23:07:29 -0400126
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400127 case 0x0182:
128 case 0x0183:
129 case 0x1182:
130 addr += SIS182_SATA1_OFS;
131 break;
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100132 }
133 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 return addr;
135}
136
Tejun Heo82ef04f2008-07-31 17:02:40 +0900137static u32 sis_scr_cfg_read(struct ata_link *link,
138 unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
Tejun Heo82ef04f2008-07-31 17:02:40 +0900140 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
141 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
Tejun Heoaaa092a2007-10-18 11:53:39 +0900142 u32 val2 = 0;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200143 u8 pmr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144
145 if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */
Tejun Heo8e5443a2008-04-24 10:52:44 +0900146 return -EINVAL;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200147
148 pci_read_config_byte(pdev, SIS_PMR, &pmr);
Jeff Garzik8add7882005-09-08 23:07:29 -0400149
Tejun Heoaaa092a2007-10-18 11:53:39 +0900150 pci_read_config_dword(pdev, cfg_addr, val);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200151
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200152 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
153 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200154 pci_read_config_dword(pdev, cfg_addr+0x10, &val2);
155
Tejun Heoaaa092a2007-10-18 11:53:39 +0900156 *val |= val2;
157 *val &= 0xfffffffb; /* avoid problems with powerdowned ports */
158
159 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160}
161
Tejun Heo82ef04f2008-07-31 17:02:40 +0900162static int sis_scr_cfg_write(struct ata_link *link,
163 unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164{
Tejun Heo82ef04f2008-07-31 17:02:40 +0900165 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
166 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200167 u8 pmr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168
Alan9b14dec2007-01-08 16:11:07 +0000169 if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */
Tejun Heo8e5443a2008-04-24 10:52:44 +0900170 return -EINVAL;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200171
172 pci_read_config_byte(pdev, SIS_PMR, &pmr);
Jeff Garzik8add7882005-09-08 23:07:29 -0400173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 pci_write_config_dword(pdev, cfg_addr, val);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200175
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200176 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
177 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200178 pci_write_config_dword(pdev, cfg_addr+0x10, val);
Tejun Heo8e5443a2008-04-24 10:52:44 +0900179
180 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181}
182
Tejun Heo82ef04f2008-07-31 17:02:40 +0900183static int sis_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184{
Tejun Heo82ef04f2008-07-31 17:02:40 +0900185 struct ata_port *ap = link->ap;
Jeff Garzikcca39742006-08-24 03:19:22 -0400186 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200187 u8 pmr;
188
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900190 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
192 if (ap->flags & SIS_FLAG_CFGSCR)
Tejun Heo82ef04f2008-07-31 17:02:40 +0900193 return sis_scr_cfg_read(link, sc_reg, val);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200194
195 pci_read_config_byte(pdev, SIS_PMR, &pmr);
196
Tejun Heoda3dbb12007-07-16 14:29:40 +0900197 *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4));
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200198
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200199 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
200 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
Tejun Heoda3dbb12007-07-16 14:29:40 +0900201 *val |= ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200202
Tejun Heoda3dbb12007-07-16 14:29:40 +0900203 *val &= 0xfffffffb;
204
205 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206}
207
Tejun Heo82ef04f2008-07-31 17:02:40 +0900208static int sis_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209{
Tejun Heo82ef04f2008-07-31 17:02:40 +0900210 struct ata_port *ap = link->ap;
Jeff Garzikcca39742006-08-24 03:19:22 -0400211 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200212 u8 pmr;
213
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900215 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200217 pci_read_config_byte(pdev, SIS_PMR, &pmr);
Jeff Garzik8add7882005-09-08 23:07:29 -0400218
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 if (ap->flags & SIS_FLAG_CFGSCR)
Tejun Heo82ef04f2008-07-31 17:02:40 +0900220 return sis_scr_cfg_write(link, sc_reg, val);
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200221 else {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900222 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4));
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200223 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
224 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
Tejun Heo0d5ff562007-02-01 15:06:36 +0900225 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
Tejun Heo8e5443a2008-04-24 10:52:44 +0900226 return 0;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200227 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228}
229
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400230static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231{
Jeff Garzika9524a72005-10-30 14:39:11 -0500232 static int printed_version;
Tejun Heo9a829cc2007-04-17 23:44:08 +0900233 struct ata_port_info pi = sis_port_info;
Uwe Koziolekddfc87a2007-05-25 09:48:52 +0200234 const struct ata_port_info *ppi[] = { &pi, &pi };
Tejun Heo9a829cc2007-04-17 23:44:08 +0900235 struct ata_host *host;
Uwe Koziolek4adccf62006-11-08 09:57:00 +0100236 u32 genctl, val;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200237 u8 pmr;
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100238 u8 port2_start = 0x20;
Tejun Heo9a829cc2007-04-17 23:44:08 +0900239 int rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240
Jeff Garzika9524a72005-10-30 14:39:11 -0500241 if (!printed_version++)
242 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
243
Tejun Heo24dc5f32007-01-20 16:00:28 +0900244 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 if (rc)
246 return rc;
247
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 /* check and see if the SCRs are in IO space or PCI cfg space */
249 pci_read_config_dword(pdev, SIS_GENCTL, &genctl);
250 if ((genctl & GENCTL_IOMAPPED_SCR) == 0)
Tejun Heocf0e8122006-10-27 19:08:47 -0700251 pi.flags |= SIS_FLAG_CFGSCR;
Jeff Garzik8a60a072005-07-31 13:13:24 -0400252
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253 /* if hardware thinks SCRs are in IO space, but there are
254 * no IO resources assigned, change to PCI cfg space.
255 */
Tejun Heocf0e8122006-10-27 19:08:47 -0700256 if ((!(pi.flags & SIS_FLAG_CFGSCR)) &&
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 ((pci_resource_start(pdev, SIS_SCR_PCI_BAR) == 0) ||
258 (pci_resource_len(pdev, SIS_SCR_PCI_BAR) < 128))) {
259 genctl &= ~GENCTL_IOMAPPED_SCR;
260 pci_write_config_dword(pdev, SIS_GENCTL, genctl);
Tejun Heocf0e8122006-10-27 19:08:47 -0700261 pi.flags |= SIS_FLAG_CFGSCR;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262 }
263
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200264 pci_read_config_byte(pdev, SIS_PMR, &pmr);
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100265 switch (ent->device) {
266 case 0x0180:
267 case 0x0181:
Alan9b14dec2007-01-08 16:11:07 +0000268
269 /* The PATA-handling is provided by pata_sis */
270 switch (pmr & 0x30) {
271 case 0x10:
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200272 ppi[1] = &sis_info133_for_sata;
Alan9b14dec2007-01-08 16:11:07 +0000273 break;
Jeff Garzika84471f2007-02-26 05:51:33 -0500274
Alan9b14dec2007-01-08 16:11:07 +0000275 case 0x30:
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200276 ppi[0] = &sis_info133_for_sata;
Alan9b14dec2007-01-08 16:11:07 +0000277 break;
278 }
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200279 if ((pmr & SIS_PMR_COMBINED) == 0) {
Jeff Garzika9524a72005-10-30 14:39:11 -0500280 dev_printk(KERN_INFO, &pdev->dev,
Uwe Koziolek4adccf62006-11-08 09:57:00 +0100281 "Detected SiS 180/181/964 chipset in SATA mode\n");
Arnaud Patard39eb9362005-09-13 00:36:45 +0200282 port2_start = 64;
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100283 } else {
Jeff Garzika9524a72005-10-30 14:39:11 -0500284 dev_printk(KERN_INFO, &pdev->dev,
285 "Detected SiS 180/181 chipset in combined mode\n");
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400286 port2_start = 0;
Uwe Koziolek4adccf62006-11-08 09:57:00 +0100287 pi.flags |= ATA_FLAG_SLAVE_POSS;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200288 }
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100289 break;
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500290
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100291 case 0x0182:
292 case 0x0183:
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400293 pci_read_config_dword(pdev, 0x6C, &val);
Uwe Koziolek4adccf62006-11-08 09:57:00 +0100294 if (val & (1L << 31)) {
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400295 dev_printk(KERN_INFO, &pdev->dev,
296 "Detected SiS 182/965 chipset\n");
Uwe Koziolek4adccf62006-11-08 09:57:00 +0100297 pi.flags |= ATA_FLAG_SLAVE_POSS;
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100298 } else {
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400299 dev_printk(KERN_INFO, &pdev->dev,
300 "Detected SiS 182/965L chipset\n");
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100301 }
302 break;
303
304 case 0x1182:
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400305 dev_printk(KERN_INFO, &pdev->dev,
306 "Detected SiS 1182/966/680 SATA controller\n");
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200307 pi.flags |= ATA_FLAG_SLAVE_POSS;
308 break;
309
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100310 case 0x1183:
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400311 dev_printk(KERN_INFO, &pdev->dev,
312 "Detected SiS 1183/966/966L/968/680 controller in PATA mode\n");
Uwe Kozioleka3cabb22007-06-14 23:40:43 +0200313 ppi[0] = &sis_info133_for_sata;
314 ppi[1] = &sis_info133_for_sata;
Uwe Koziolek3f3e7312006-12-04 01:34:42 +0100315 break;
Arnaud Patardf2c853b2005-09-07 22:44:48 +0200316 }
317
Tejun Heo9363c382008-04-07 22:47:16 +0900318 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heo9a829cc2007-04-17 23:44:08 +0900319 if (rc)
320 return rc;
Tejun Heocf0e8122006-10-27 19:08:47 -0700321
Tejun Heo9a829cc2007-04-17 23:44:08 +0900322 if (!(pi.flags & SIS_FLAG_CFGSCR)) {
Al Viroedceec32007-03-14 09:19:00 +0000323 void __iomem *mmio;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900324
Tejun Heo9a829cc2007-04-17 23:44:08 +0900325 rc = pcim_iomap_regions(pdev, 1 << SIS_SCR_PCI_BAR, DRV_NAME);
326 if (rc)
327 return rc;
328 mmio = host->iomap[SIS_SCR_PCI_BAR];
Tejun Heo0d5ff562007-02-01 15:06:36 +0900329
Tejun Heo9a829cc2007-04-17 23:44:08 +0900330 host->ports[0]->ioaddr.scr_addr = mmio;
331 host->ports[1]->ioaddr.scr_addr = mmio + port2_start;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 }
333
334 pci_set_master(pdev);
Brett M Russa04ce0f2005-08-15 15:23:41 -0400335 pci_intx(pdev, 1);
Tejun Heo9363c382008-04-07 22:47:16 +0900336 return ata_host_activate(host, pdev->irq, ata_sff_interrupt,
337 IRQF_SHARED, &sis_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338}
339
340static int __init sis_init(void)
341{
Pavel Roskinb7887192006-08-10 18:13:18 +0900342 return pci_register_driver(&sis_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343}
344
345static void __exit sis_exit(void)
346{
347 pci_unregister_driver(&sis_pci_driver);
348}
349
350module_init(sis_init);
351module_exit(sis_exit);